aic.h

minitos是一个实时的嵌入式操作系统

//;------------------------------------------
//;- AIC User Interface Structure Definition
//;------------------------------------------
#define AIC_OFF       0

#define AIC_SMR                   (AIC_OFF + 32*4)        //;- Source Mode Register
#define AIC_SVR                   (AIC_SMR + 32*4 )       //;- Source Vector Register
#define AIC_IVR                   (AIC_SVR + 4 )          //;- IRQ Vector Register
#define AIC_FVR                   (AIC_IVR + 4 )          //;- FIQ Vector Register
#define AIC_ISR                   (AIC_FVR + 4 )          //;- Interrupt Status Register
#define AIC_IPR                   (AIC_ISR + 4 )          //;- Interrupt Pending Register
#define AIC_IMR                   (AIC_IPR + 4 )          //;- Interrupt Mask Register
#define AIC_CISR                  (AIC_IMR + 4 )          //;- Core Interrupt Status Register
#define AIC_RES1                  (AIC_CISR + 4 )          //;- Reserved 0
#define AIC_RES2                  (AIC_RES1 + 4 )          //;- Reserved 1
#define AIC_IECR                  (AIC_RES2 +4  )         //;- Interrupt Enable Command Register
#define AIC_IDCR                  (AIC_IECR +4  )         //;- Interrupt Disable Command Register
#define AIC_ICCR                  (AIC_IDCR +4  )         //;- Interrupt Clear Command Register
#define AIC_ISCR                  (AIC_ICCR +4  )         //;- Interrupt Set Command Register
#define AIC_EOICR                 (AIC_ISCR +4  )         //;-  of Interrupt Command Register
#define AIC_SPU                   (AIC_EOICR +4 )          //;- Spurious Vector Register

//;---------------------------------------------
//;- AIC_SMR[]: Interrupt Source Mode Registers
//;---------------------------------------------

#define AIC_PRIOR                            0x07    //;- Priority

#define AIC_SRCTYPE                          0x60    //;- Source Type Definition
#define AIC_SRCTYPE_INT_LEVEL_SENSITIVE      0x00    //;- Level Sensitive
#define AIC_SRCTYPE_INT_EDGE_TRIGGERED       0x20    //;- Edge Triggered
#define AIC_SRCTYPE_EXT_LOW_LEVEL            0x00    //;- Low Level
#define AIC_SRCTYPE_EXT_NEGATIVE_EDGE        0x20    //;- Negative Edge
#define AIC_SRCTYPE_EXT_HIGH_LEVEL           0x40    //;- High Level
#define AIC_SRCTYPE_EXT_POSITIVE_EDGE        0x60    //;- Positive Edge

//;--------------------------------------
//;-  AIC_ISR: Interrupt Status Register
//;--------------------------------------

#define AIC_IRQID                    0x1F            //;- Current source interrupt

//;-------------------------------------------
//;- AIC_CISR: Interrupt Core Status Register
//;-------------------------------------------

#define AIC_NFIQ                     0x01            //;- Core FIQ Status
#define AIC_NIRQ                     0x02            //;- Core IRQ Status

//;--------------------------------------------
//;- Advanced Interrupt COntroller BAse Address
//;--------------------------------------------

#define AIC_BASE                     0xFFFFF000