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<P align=left><BIG><STRONG>FAQ-03: Where should I enable the 'tick'
interrupt?</STRONG></BIG><A
name=FAQ-03></A></P></TD></TR></TBODY></TABLE></BIG></BIG>
<P align=left><FONT size=4>You should enable the tick interrupt AFTER you
have started 礐/OS (or 礐/OS-II) in a 'startup' task as shown in the
example code provided with the book. This way, the OS is in a state ready
to accept interrupts and can thus process interrupts.</FONT></P>
<P align=left><A
href="http://www.ucos-ii.com/contents/support/faqs-test1.html#TOP"><IMG
height=30 src="" width=67 border=0></A></P>
<P align=left> </P><BIG><BIG>
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<P align=left><STRONG><BIG>FAQ-04: Does 礐/OS and 礐/OS-II work with
Microsoft C/C++?<A
name=FAQ-04></A></BIG></STRONG></P></TD></TR></TBODY></TABLE></BIG></BIG>
<P align=left><FONT size=4>Yes, you will have to adjust the SP offset
constant (see item 1)) and disable stack checking. Others have used the
Microsoft compiler without too many problems.</FONT></P>
<P align=left><FONT size=4>See also </FONT><A
href="http://www.ucos-ii.com/contents/support/faqs-test1.html#FAQ-06"><B><FONT
color=#ff0000 size=5>FAQ-06</FONT></B></A><FONT size=4>.<BR></FONT></P>
<P align=left><A
href="http://www.ucos-ii.com/contents/support/faqs-test1.html#TOP"><IMG
height=30 src="" width=67 border=0></A></P>
<P align=left> </P><BIG><BIG>
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<P align=left><STRONG><BIG>FAQ-05: Are there other ports available
for 礐/OS and 礐/OS-II?<A
name=FAQ-05></A></BIG></STRONG></P></TD></TR></TBODY></TABLE></BIG></BIG>
<P align=left><FONT size=4>There are currently a large number of ports
available for 礐/OS and 礐/OS-II. I am planning on making a number
of ports available on this WEB site as they become available.
<BR><BR>A port to 礐/OS can easily be ported to 礐/OS-II in about an hour
or so. This assumes that you are familiar with the target processor
and it's compiler. This means that if a port for 礐/OS-II is not
currently available but a port for 礐/OS exist then you could modify the
礐/OS port to work with 礐/OS-II. Chapter 10 in the book (礐/OS-II)
describes the steps. </FONT>
<P align=left><A
href="http://www.ucos-ii.com/contents/support/faqs-test1.html#TOP"><IMG
height=30 src="" width=67 border=0></A>
<P align=left><A
href="http://www.ucos-ii.com/contents/support/faqs-test1.html#TOP"><BR></A><BIG><BIG>
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<P align=left><STRONG><BIG>FAQ-06: Is there a better way to
implement OSIntCtxSw() and ISRs?<A
name=FAQ-06></A></BIG></STRONG></P></TD></TR></TBODY></TABLE></BIG></BIG>
<P align=left><FONT size=4>As you probably know, 礐/OS-II has a function
that is dependent on compiler options (<FONT
face="Courier New">OSIntCtxSw()</FONT>) and, the port designer HAS to
adjust the Stack Pointer based on the code generation of the compiler.
</FONT></P>
<P align=left><FONT size=4>On certain processors (e.g. 80x86) you can
</FONT><FONT size=4>simply write ISRs so that you SAVE the Stack Pointer
(<FONT face="Courier New">SS:SP</FONT> for the 80x86) into the current
task's <FONT face="Courier New">OS_TCB</FONT> after incrementing <FONT
face="Courier New">OSIntNesting</FONT>. This way, we save the PROPER
pointer to the ISR stack frame in case we don't actually return to the
interrupted task. If we DO return to the interrupted task then,
there is no harm and all we did was waste a little bit of CPU time!
Of course, we eliminate the code at the beginning of <FONT
face="Courier New">OSIntCtxSw()</FONT> to adjust the Stack Pointer (<FONT
face="Courier New">SP</FONT> for the 80x86) and the code to save the Stack
Pointer into the <FONT face="Courier New">OS_TCB</FONT>!</FONT></P>
<P align=left><FONT size=4>The new pseudo code for an ISR and <FONT
face="Courier New">OSIntCtxSw()</FONT> is now:</FONT></P>
<P><FONT face="Courier New" size=2>MyISR:<BR> Save ALL
registers;<BR> OSIntNesting++;<BR></FONT><FONT
face="Courier New"> </FONT><FONT face="Courier New"><FONT
size=2>OSTCBCur->OSTCBStkPtr = SP;
<<<< NEW<BR></FONT></FONT><FONT face="Courier New"
size=2> /* Handle ISR */<BR>
OSIntExit();<BR> Restore ALL
registers;<BR> Return from Interrupt;</FONT></P>
<P><FONT face="Courier New" size=2>OSIntCtxSw:<BR>
OSTaskSwHook();<BR> OSTCBCur =
OSTCBHighRdy;<BR> SP =
OSTCBHighRdy->OSTCBStkPtr;<BR> Restore ALL
registers;<BR> Return from Interrupt;</FONT></P>
<P align=left><FONT size=4>In assembly language for the 80x86 (Large
model), this becomes:</FONT></P><FONT size=2>
<P><FONT face="Courier New">_MyISR PROC FAR<BR>;<BR>
PUSHA
; Save interrupted task's context<BR> PUSH
ES<BR> PUSH DS<BR>;<BR> MOV AX,
SEG(_OSIntNesting) ; Reload
DS<BR> MOV DS, AX<BR> INC BYTE PTR
_OSIntNesting ; Notify uC/OS-II of
ISR<BR>;<BR> LES BX, DWORD PTR DS:_OSTCBCur ;
OSTCBCur->OSTCBStkPtr = SS:SP<BR> MOV ES:[BX+2],
SS<BR> MOV ES:[BX+0], SP<BR> CALL FAR
PTR _MyISRHandler ; Process the
Interrupt<BR>;<BR> CALL FAR PTR
_OSIntExit ; Notify uC/OS-II of
end of ISR<BR>;<BR> POP
DS
; Restore interrupted task's context<BR> POP
ES<BR> POPA<BR>;<BR>
IRET
; Return to interrupted task<BR>;<BR>_MyISR ENDP</FONT></P>
<P> </P>
<P><FONT face="Courier New" size=2>_OSIntCtxSw PROC
FAR<BR>;<BR> CALL FAR PTR
_OSTaskSwHook ; Call user defined task
switch hook<BR>;<BR> MOV AX, WORD PTR DS:_OSTCBHighRdy+2
; OSTCBCur = OSTCBHighRdy<BR> MOV DX, WORD PTR
DS:_OSTCBHighRdy <BR> MOV WORD PTR DS:_OSTCBCur+2,
AX<BR> MOV WORD PTR DS:_OSTCBCur, DX
<BR>;<BR> MOV AL, BYTE PTR DS:_OSPrioHighRdy ; OSPrioCur
= OSPrioHighRdy<BR> MOV BYTE PTR DS:_OSPrioCur,
AL<BR>;<BR> LES BX, DWORD PTR DS:_OSTCBHighRdy ; SS:SP =
OSTCBHighRdy->OSTCBStkPtr<BR> MOV SS,
ES:[BX+2]<BR> MOV SP, ES:[BX]<BR>;<BR>
POP
DS
; Load new task's context<BR> POP
ES<BR> POPA<BR>;<BR>
IRET
; Return to new task<BR>;<BR>_OSIntCtxSw ENDP</FONT></P></FONT>
<P></P>
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