unaligned.cc

一个mips虚拟机非常好代码,使用C++来编写的,希望大家多学学,

#include <assert.hh>
#include "koala.hh"

// Process the MIPS64 ``unaligned'' load and stores LDL, LDR, LWR, LWR, SDL,
// SDR, SWL and SWR. There is no need to have separate versions for words and
// doublewords, as the correct size will be specified by (syscmd) in either
// case. Because I wanted to optimize loads and stores for the common case
// when (syscmd) is known in advance, the functions in this file select the
// appropriate load<> or store<> template using a large(ish) switch statement.
// This has an additional advantage of avoiding expensive set_bits() on
// non-constant ranges. (reg) is the content of the target register, (va) is
// the virtual address of the load and (syscmd) is the size of the load
// computed from the virtual address and the actual invoking instruction.
//
// WARNING: There is a slight problem with those: these interface rather
// strangely with the byte order flags, and would brake swizzle<> when syscmd
// is not a power of two. Rather than complicating everything else, I always
// load a whole doubleword or word around the point and extract the required
// portion from it. This must be fixed in the future if we are to have an
// accurate simulator. The memory controller never sees syscmd's other than 0,
// 1, 3 and 7, plus don't tell me that this code is seedy -- I know. Oh, and
// one more thing: this hackery is most accute when it comes to the store
// instructions: in my code they generate a memory load access (including all
// associated cache pollution), which doesn't happen on a real CPU.
//
// WARNING #2: these functions are not currently used: all the hackery
// is done directly in decoder.cc.

UInt64
Koala::load_left(UInt64 reg, VA va, int syscmd)
{
    assert(TODO);
//      PA pa = translate_vaddr(va);
//      if (!big_endian_mem())
//  	pa = clear_bits(pa, 2, 0);
//      switch (syscmd) {
//      case byte:
//  	return set_bits(reg, load<byte>(va, pa), 63, 56 - 8*byte);
//      case halfword:
//  	return set_bits(reg, load<halfword>(va, pa), 63, 56 - 8*halfword);
//      case triplebyte:
//  	return set_bits(reg, load<triplebyte>(va, pa), 63, 56 - 8*triplebyte);
//      case word:
//  	return set_bits(reg, load<word>(va, pa), 63, 56 - 8*word);
//      case quintibyte:
//  	return set_bits(reg, load<quintibyte>(va, pa), 63, 56 - 8*quintibyte);
//      case sextibyte:
//  	return set_bits(reg, load<sextibyte>(va, pa), 63, 56 - 8*sextibyte);
//      case septibyte:
//  	return set_bits(reg, load<septibyte>(va, pa), 63, 56 - 8*septibyte);
//      default: // doubleword
//  	return load<doubleword>(va, pa);
//      }
    return 0;
}

UInt64
Koala::load_right(UInt64 reg, VA va, int syscmd)
{
    assert(TODO);
//      UInt64 mem;
//      switch (syscmd) {
//      case byte:
//  	mem = load<byte>(va) >> 56 - 8 * byte;
//  	return set_bits(reg, mem, 7 + 8 * byte, 0);
//      case halfword:
//  	mem = load<halfword>(va) >> 56 - 8 * halfword;
//  	return set_bits(reg, mem, 7 + 8 * halfword, 0);
//      case triplebyte:
//  	mem = load<triplebyte>(va) >> 56 - 8 * triplebyte;
//  	return set_bits(reg, mem, 7 + 8 * triplebyte, 0);
//      case word:
//  	mem = load<word>(va) >> 56 - 8 * word;
//  	return set_bits(reg, mem, 7 + 8 * word, 0);
//      case quintibyte:
//  	mem = load<quintibyte>(va) >> 56 - 8 * quintibyte;
//  	return set_bits(reg, mem, 7 + 8 * quintibyte, 0);
//      case sextibyte:
//  	mem = load<sextibyte>(va) >> 56 - 8 * sextibyte;
//  	return set_bits(reg, mem, 7 + 8 * sextibyte, 0);
//      case septibyte:
//  	mem = load<septibyte>(va) >> 56 - 8 * septibyte;
//  	return set_bits(reg, mem, 7 + 8 * septibyte, 0);
//      default: // doubleword
//  	return load<doubleword>(va);
//      }
    return 0;
}

void
Koala::store_left(UInt64 reg, VA va, int syscmd)
{
    assert(TODO);
}

void
Koala::store_right(UInt64 reg, VA va, int syscmd)
{
    assert(TODO);
}