cache.hh

一个mips虚拟机非常好代码,使用C++来编写的,希望大家多学学,

#ifndef mips64_cache_included
#define mips64_cache_included

#include <mips64/types.hh>
#include <inttypes.hh>

// This header describes a virtually-indexed, physically-taged MIPS cache.
// Both direct mapped and n-way set-associative caches are supported. The only
// restriction is that all geometry parameters must be integer powers of 2.
// Each line includes 32 bits of uninterpreted cache state.

// Cache line.

template <int log2_line_size>
struct MIPS64CacheLine {
    UInt32 tag;
    UInt32 state;
    UInt64 data[(1 << log2_line_size) / 8];
};

// Cache set.

template <int log2_line_size, int log2_assoc>
struct MIPS64CacheSet {
    UInt8 lru[1 << log2_assoc];
    MIPS64CacheLine<log2_line_size> line[1 << log2_assoc];
    enum { assoc = 1 << log2_assoc };

    // Initialize the LRU data.
    void lru_init()
    {
	for (int i = 0; i < assoc; ++i)
	    lru[i] = i;
    }

    // Select a candinate to replace.
    int lru_replace() const
    {
	return lru[assoc - 1];
    }

    // Touch a cache line (mark it as most-recently used.)
    void lru_touch(int n)
    {
	// Set lru[0] to n and shift the other values accordingly.
	if (lru[0] != n) {
	    for (unsigned i = n; i; --i)
		lru[i] = lru[i - 1];
	    lru[0] = n;
	}
    }
};

// MIPS64CacheSet specialization for a direct-mapped caches.
    
template<int log2_line_size>
struct MIPS64CacheSet<log2_line_size, 0> {

    MIPS64CacheLine<log2_line_size> line[1];

    // LRU operations
    void lru_init()
	{ }
    int lru_replace() const
	{ return 0; }
    void lru_touch(int n)
	{ }
};

// MIPS64CacheSet specialization for a two-way set-associative caches.
    
template <int log2_line_size>
struct MIPS64CacheSet<log2_line_size, 1> {

    UInt8 lru;
    MIPS64CacheLine<log2_line_size> line[2];

    // LRU operations.
    void lru_init()
	{ lru = 0; }
    int lru_replace() const
	{ return lru; }
    void lru_touch(int n)
	{ lru = !n; }
};

// A whole cache.

template <int log2_size, int log2_line_size, int log2_assoc>
struct MIPS64Cache {

    // Shortcut to generic MIPS64 parameters and types.
    typedef MIPS64Types::VA VA;
    typedef MIPS64Types::PA PA;
    static const int paddr_width = MIPS64Types::paddr_width;

    // Number of sets in the cache.
    static const int log2_sets = log2_size - log2_line_size - log2_assoc;

    // More convinient geometry constants.
    static const int size       = 1 << log2_size;
    static const int assoc      = 1 << log2_assoc;
    static const int line_size  = 1 << log2_line_size;
    static const int sets	= 1 << log2_sets;

    // The index field from the virtual address.
    static const int index_first = log2_line_size;
    static const int index_last  = log2_sets - 1 + index_first;

    // A cache line and set types.
    typedef MIPS64CacheLine<log2_line_size> Line;
    typedef MIPS64CacheSet<log2_line_size, log2_assoc> Set;

    // Actual cache data itself.
    Set set[sets];

    // Extract an index from a virtual address.
    static VA index(VA va)
	{ return bits(va, index_last, index_first); }
    static VA block(VA va)
	{ return bits(va, index_last + log2_assoc, index_last + 1); }
    static PA tag(PA pa)
	{ return bits(pa, paddr_width - 1, index_last + 1); }
};


#endif // mips64_cache_included