📄 ide.hh
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#ifndef ide_hh_included#define ide_hh_included#include <pcidevice.hh>#include "ide_types.hh"/* FIXME: Set these correctly !! */#define PCI_VENDOR_ID_DEC_IDE 0x0037 ///syt---IDE //#define PCI_DEVICE_ID_DEC_IDE 0x0069#define PCI_CLASS_IDE 0x0101//#define USER_SECTOR_NUM 0x4000 //16K//class IDE : public Module, public PCIDevice, public IOListener {private: static SerialType<IDE> type; //256 words for device info // UInt32 dev_words[256]; UInt16 words_counter; //registers data // union dide_data dide_data; union dide_err dide_err; union dide_feature dide_feature; union dide_sectorcount dide_sectorcount; union dide_lbal dide_lbal; union dide_lbam dide_lbam; union dide_lbah dide_lbah; union dide_dev dide_dev; union dide_comm dide_comm; union dide_stat dide_stat; union dide_astat dide_astat; union dide_devcon dide_devcon; union bmide_comm bmide_comm; union bmide_stat bmide_stat; union bmide_dtpr bmide_dtpr; union idedma_descriptor idedma_descriptor; void do_command(UInt16 code); void set_interrupt(); void clear_interrupt(); void dma_transfer(); struct features features; // Configuration parameter cache. const char* file_name; ClockValue read_latency, write_latency; // The clock frequency for which the cached values are valid. ClockValue freq; // Actual data array. UInt32 size; UInt64* data; // Configuration data. struct { char* file_name; int size; int read_latency, write_latency; } conf;public: void io_poll(); // Constructors, etc. IDE(const SimArgs& args); IDE(Checkpoint& cp); ~IDE(); // Module interfaces. void reset(bool warm); // Serialization information. void checkpoint(Checkpoint& cp, bool parent = false) const; // Device access interfaces ClockValue read(UInt64 addr, UInt64* buf, int size); ClockValue write(UInt64 addr, const UInt64* buf, int size); void init(Bus *bus, InterruptSink *intctrl, UInt64 base_address, UInt64 size, int base_irq);};#endif // ide_hh_included
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