📄 rom.hh
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#ifndef rom_hh_included#define rom_hh_included#include <clock.hh>#include <checkpoint.hh>#include <cpu.hh>#include <device.hh>#include <inttypes.hh>#include <module.hh>#include <serial.hh>#include <simarg.hh>class ROM : public Module, public Device{private: static SerialType<ROM> type; // Configuration parameter cache. const char* file_name; ClockValue read_latency, write_latency; // The clock frequency for which the cached values are valid. ClockValue freq; // Actual data array. UInt32 size; UInt64* data;public: // Constructors, etc. ROM(const SimArgs& args); ROM(Checkpoint& cp); ~ROM(); // Module interfaces. void reset(bool warm); // Serialization information. void checkpoint(Checkpoint& cp, bool parent = false) const; // Device access. ClockValue read(UInt64 addr, UInt64* buf, int size); ClockValue write(UInt64 addr, const UInt64* buf, int size);private: // Conviguration data. struct { char* file_name; int size; int read_latency, write_latency; } conf;};#endif // rom_hh_included
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