📄 sine.txt
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*********************************************************************
; File Name: dac.asm
; Originator: Digital Control systems Apps group - Houston
; Target System: 'C24x Evaluation Board
;
; Description: Outputs a Sine Waves on the EVM DAC - DAC0
;
; By entering the following commands in the debugger
; environment, one can view the values loaded in the
; registers corresponding to each sine wave and the
; values can be manipulated.
;
; wa *FREQSTEP,,u
; wa *MODREG,,x
; wa *MAG,,x
; FREQSTEP - will modify the frequency of the
; corresponding sine wave on the DAC output channels
;
; MODREG - will modify the starting point of the
; wave, thus if two sine waves have the same
; frequency, then the phase difference between the
; two waveforms can be set
;
; MAG - will modify the peak to peak voltage of the
; sine wave output on the corresponding DAC channel
;
; Last Updated: 09 November 2005
;
;*******************************************************************
.include f240regs.h
;-------------------------------------------------------------------
; Variables Declaration for B2
;-------------------------------------------------------------------
.bss GPR0,1 ;General Purpose Register
.bss DACVAL,1
.bss MID,1
.bss MID1,1
.bss COUNT,1
;-------------------------------------------------------------------
; Vector address declarations
;-------------------------------------------------------------------
.sect ".vectors"
RSVECT B START ; Reset Vector
INT1 B PHANTOM ; Interrupt Level 1
INT2 B SINE ; Interrupt Level 2
INT3 B PHANTOM ; Interrupt Level 3
INT4 B PHANTOM ; Interrupt Level 4
INT5 B SCI_RX ; Interrupt Level 5
INT6 B PHANTOM; Interrupt Level 6
RESERVED B PHANTOM ; Reserved
SW_INT8 B PHANTOM ; User S/W Interrupt
SW_INT9 B PHANTOM ; User S/W Interrupt
SW_INT10 B PHANTOM ; User S/W Interrupt
SW_INT11 B PHANTOM ; User S/W Interrupt
SW_INT12 B PHANTOM ; User S/W Interrupt
SW_INT13 B PHANTOM ; User S/W Interrupt
SW_INT14 B PHANTOM ; User S/W Interrupt
SW_INT15 B PHANTOM ; User S/W Interrupt
SW_INT16 B PHANTOM ; User S/W Interrupt
TRAP B PHANTOM ; Trap vector
NMINT B PHANTOM ; Non-maskable Interrupt
EMU_TRAP B PHANTOM ; Emulator Trap
SW_INT20 B PHANTOM ; User S/W Interrupt
SW_INT21 B PHANTOM ; User S/W Interrupt
SW_INT22 B PHANTOM ; User S/W Interrupt
SW_INT23 B PHANTOM ; User S/W Interrupt
;===================================================================
; M A I N C O D E - starts here
;===================================================================
.text
NOP
START: SETC INTM ;Disable interrupts
SPLK #0012h,IMR ;Mask all core interrupts except INT2
LACC IFR ;Read Interrupt flags
SACL IFR ;Clear all interrupt flags
CLRC SXM ;Clear Sign Extension Mode
CLRC OVM ;Reset Overflow Mode
CLRC CNF ;Config Block B0 to Data mem
;-----------------------------------
; Set up PLL Module
;-----------------------------------
LDP #00E0h
SPLK #0000000001000001b,CKCR0 ;CLKMD=PLL Disable,SYSCLK=CPUCLK/2
SPLK #0000000010111011b,CKCR1 ;CLKIN(OSC)=10MHz,CPUCLK=20MHz
SPLK #0000000011000001b,CKCR0 ;CLKMD=PLL Enable,SYSCLK=CPUCLK/2
SPLK #0100000011000000b,SYSCR ;CLKOUT=CPUCLK
SPLK #006Fh, WDCR ;Disable WD if VCCP=5V (JP5 in pos. 2-3)
KICK_DOG ;Reset Watchdog
;-----------------------------------
; Set up digital I/O Port
;-----------------------------------
LDP #225 ;Date page to Configure ocrx
SPLK #000Fh,OCRA ;0000 0000 0000 1111 port B ok
SPLK #00FFh,OCRB
SPLK #0FFFFh,PBDATDIR ;B is out port
;=================================================================
SCI_INIT:LDP #00E0H
SPLK #0037H,SCICCR ;1 stop bit,odd parity,8 char bits,async mode,line pro
SPLK #0011H,SCICTL1 ;enable RX,interal SCICLK, disable rx err,sleep,txwake
SPLK #0002H,SCICTL2 ;enable RX INT,disable TX INT
SPLK #0000H,SCIHBAUD
SPLK #0040H,SCILBAUD ;Baud Rate=19200(10MHz SYSCLK)
SPLK #0022H,SCIPC2
SPLK #0020H,SCIPRI ;SCI low priority
SPLK #0031H,SCICTL1
;=================================================================
;*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
;- Event Manager Module Reset
;*
;- This section resets all of the Event Manager Module
;* Registers. This is necessary for silicon revision
;- 1.1; however, for silicon revisions 2.0 and later,
;* this is not necessary.
;-
;*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
LDP #232 ;DP=232 Data Page for the Event Manager
SPLK #0000h,GPTCON ;Clear General Purpose Timer Control
SPLK #0000h,T1CON ;Clear GP Timer 1 Control
SPLK #0000h,T2CON ;Clear GP Timer 2 Control
SPLK #0000h,T3CON ;Clear GP Timer 3 Control
SPLK #0000h,COMCON ;Clear Compare Control
SPLK #0000h,ACTR ;Clear Full Compare Action Control Register
SPLK #0000h,SACTR ;Clear Simple Compare Action Control Register
SPLK #0000h,DBTCON ;Clear Dead-Band Timer Control Register
SPLK #0000h,CAPCON ;Clear Capture Control
SPLK #0FFFFh,EVIFRA;Clear Interrupt Flag Register A
SPLK #0FFFFh,EVIFRB;Clear Interrupt Flag Register B
SPLK #0FFFFh,EVIFRC;Clear Interrupt Flag Register C
SPLK #0000h,EVIMRA ;Clear Event Manager Mask Register A
SPLK #0000h,EVIMRB ;Clear Event Manager Mask Register B
SPLK #0000h,EVIMRC ;Clear Event Manager Mask Register C
;*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
;- End of RESET section for silicon revision 1.1 *
;*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
;-----------------------------------
; Set up Event Manager Module
;-----------------------------------
T1COMPARE .set 0 ;Compare value not necessary
T1PERIOD .set 610 ;T1PERIOD set to value equivalent to
;32.768kHz with CPULCLK =20MHz
.text
LDP #232 ;DP=232, Data Page for Event Manage Addresses
SPLK #T1COMPARE,T1CMPR
SPLK #0000001010101b,GPTCON
SPLK #T1PERIOD,T1PR
SPLK #0000h,T1CNT
SPLK #0000h,T2CNT
SPLK #0000h,T3CNT
SPLK #0001000000000100b,T1CON
SPLK #0000000000000000b,T2CON
SPLK #0000000000000000b,T3CON
SBIT1 T1CON,B6_MSK ;Sets Bit 6 of T1CON
SPLK #0080h,EVIMRA ;Enable Timer 1 Period Interrupt
;-------------------------------------------------------------------
; Initialize Variables for Generation of Sine Wave on DAC
;-------------------------------------------------------------------
;The DAC module requires that wait states be generated for proper operation.
LDP #0000h ;Set Data Page Pointer to 0000h, Block B2
SPLK #4h,GPR0 ;Set Wait State Generator for
OUT GPR0,WSGR ;Program Space, 0WS
;Date Space, 0WS
;I/O Space, 1WS
.bss TABLE,1 ;Keeps address of the pointer in the SINE Table
.bss TOPTABLE,1 ;Keeps the reset value for the pointer
.bss COMPARET,1 ;A register to do calculations
;since the T1CMPR register is double buffered.
.bss REMAINDER,1 ;Remainder of the MODREGx values
.bss VALUE,1 ;SINE Table Value
.bss NEXTVALUE,1 ;Next entry in the SINE Table
.bss DIFFERENCE,1 ;Difference between Entries
.bss FREQSTEP,1 ;Frequency modulation of the 1st sine wave
.bss MODREG,1 ;Rolling Modulo Register for 1st sine wave
.bss MAG,1 ;Magnitude of the frequency for 1st sine wave
.text
SPLK #0000h,TABLE
SPLK #STABLE,TOPTABLE
SPLK #500,FREQSTEP ;Controls the frequency for
SPLK #0000h,MODREG ;Sets the starting point
SPLK #7FFFh,MAG ;Maximum value, Q15
SPLK #0,MID
SPLK #0,MID1
SPLK #1,COUNT
CLRC INTM
END B END
;=================================================================
; Generate SCI ISR
;=================================================================
SCI_RX:
LDP #0
SACL MID ;save ACC
LAR AR4,#SCIRXBUF ;load AR4 with SCI-TX-BUF address
MAR *,AR4
LACL *
LAR AR0,#1
LAR AR1,COUNT
MAR *,AR1
CMPR 1
BCND b,TC
BCND a,NTC
;change the value of magnitude register
b: LDP #0
RPT #6
SFL
SACL MAG
LACL #1
SACL COUNT
CLRC INTM
LACL MID
RET
;change the value of frequency register
a: LDP #0
SACL MID1
LACL COUNT
SUB #1
SACL COUNT
LACL MID1
SACL FREQSTEP ;save in RXDATA with SCIRXBUF
CLRC INTM
LACL MID
RET
;-------------------------------------------------------------------
; Generate Sine Wave ISR
;-------------------------------------------------------------------
;The following section performs the necessary calculations for the sine wave
SINE LDP #0
LACC MODREG ;ACC loaded with the counting register
ADD FREQSTEP ;Counting Register increased by specific step
SACL MODREG ;Store the updated the counter value
LACC MODREG,8;Reload the new cntr val, shift left by 8 bits
SACH TABLE ;Store the high bit into the TABLE as pointer
SFR ;Shift the value to the right convert to Q15
AND #07FFFh ;Make sure the Q15 value is positive
SACL REMAINDER ;Store the frac value of the counting reg.
LACC TABLE ;Load the acc with the proper index value
ADD TOPTABLE ;Displace the ACC with the starting address
TBLR VALUE ;Read the value from the table and store
ADD #1 ;Increment the ACC to the next address
TBLR NEXTVALUE ;Read the next val from the table and store
LACC NEXTVALUE ;Load the ACC with NEXTVALUE
SUB VALUE ;Subtract the previous value
SACL DIFFERENCE ;Store the difference between the values
LT DIFFERENCE ;Load the TREG with DIFFERENCE
MPY REMAINDER ;Multiply the DIFFERENCE REMAINDER
PAC ;Move the product to the ACC
SACH REMAINDER,1 ;Store the upper byte and shift left by 1, Q15
LACC REMAINDER ;Load ACC with new REMAINDER
ADD VALUE ;Add VALUE to get the new interpolated value
SACL VALUE ;Store the interpolated value into VALUE
LT VALUE ;Load the TREG with the new interpolated VALUE
MPY MAG ;Multiply VALUE by a magnitude
PAC ;Move the product to ACC
SACH DACVAL,1 ;Store the new value, shift to get Q15
;This section outputs the SINE wave
LACC DACVAL ;ACC = DACVAL - entry from the lookup table
ADD #8000h
RPT #8
SFR
OR #0000FF00h
LDP #225 ;Date page to Configure ocrx
SACL PBDATDIR ;store the high 8 bit value into port B
RESUME LDP #232 ;DP = 232 - DP for Event Manager
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