gen_sram.txt

来自「有用的单片机程序,包括8279和E2ROM的读写」· 文本 代码 · 共 36 行

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

--  Uncomment the following lines to use the declarations that are
--  provided for instantiating Xilinx primitive components.
--library UNISIM;
--use UNISIM.VComponents.all;

entity gen_sram is
    generic(width:integer:=8;  --数据位数
            depth:integer:=8;	 --总共的存储容量
		  addr:integer:=3);	 --地址位数
    Port ( datain:in std_logic_vector(width-1 downto 0);
          dataout:out std_logic_vector(width-1 downto 0);
		wr,rd,clk:in std_logic;
	   waddr,raddr:in std_logic_vector(addr-1 downto 0));
end gen_sram;

architecture Behavioral of gen_sram is
type mem is array(0 to depth-1) of std_logic_vector(width-1 downto 0);
signal tmp:mem;   --mem是内部的存储字节
begin
  process(clk) is
   begin
   if rising_edge(clk) then
    if(wr='0' and rd='1') then tmp(conv_integer(waddr))<=datain;	dataout<="ZZZZZZZZ";
    elsif(wr='1' and rd='0') then dataout<=tmp(conv_integer(raddr));
    else dataout<="ZZZZZZZZ"; 
    end if;
   end if;
  end process;
  
end Behavioral;