📄 stm32f10x_gpio.lst
字号:
\ GPIO_ResetBits:
\ 00000000 89B2 UXTH R1,R1 ;; ZeroExt R1,R1,#+16,#+16
\ 00000002 4161 STR R1,[R0, #+20]
380 }
\ 00000004 7047 BX LR ;; return
381
382 /**
383 * @brief Sets or clears the selected data port bit.
384 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
385 * @param GPIO_Pin: specifies the port bit to be written.
386 * This parameter can be one of GPIO_Pin_x where x can be (0..15).
387 * @param BitVal: specifies the value to be written to the selected bit.
388 * This parameter can be one of the BitAction enum values:
389 * @arg Bit_RESET: to clear the port pin
390 * @arg Bit_SET: to set the port pin
391 * @retval None
392 */
\ In section .text, align 2, keep-with-next
393 void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
394 {
395 /* Check the parameters */
396 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
397 assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
398 assert_param(IS_GPIO_BIT_ACTION(BitVal));
399
400 if (BitVal != Bit_RESET)
\ GPIO_WriteBit:
\ 00000000 D2B2 UXTB R2,R2 ;; ZeroExt R2,R2,#+24,#+24
\ 00000002 002A CMP R2,#+0
\ 00000004 02D0 BEQ.N ??GPIO_WriteBit_0
401 {
402 GPIOx->BSRR = GPIO_Pin;
\ 00000006 89B2 UXTH R1,R1 ;; ZeroExt R1,R1,#+16,#+16
\ 00000008 0161 STR R1,[R0, #+16]
\ 0000000A 01E0 B.N ??GPIO_WriteBit_1
403 }
404 else
405 {
406 GPIOx->BRR = GPIO_Pin;
\ ??GPIO_WriteBit_0:
\ 0000000C 89B2 UXTH R1,R1 ;; ZeroExt R1,R1,#+16,#+16
\ 0000000E 4161 STR R1,[R0, #+20]
407 }
408 }
\ ??GPIO_WriteBit_1:
\ 00000010 7047 BX LR ;; return
409
410 /**
411 * @brief Writes data to the specified GPIO data port.
412 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
413 * @param PortVal: specifies the value to be written to the port output data register.
414 * @retval None
415 */
\ In section .text, align 2, keep-with-next
416 void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
417 {
418 /* Check the parameters */
419 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
420
421 GPIOx->ODR = PortVal;
\ GPIO_Write:
\ 00000000 89B2 UXTH R1,R1 ;; ZeroExt R1,R1,#+16,#+16
\ 00000002 C160 STR R1,[R0, #+12]
422 }
\ 00000004 7047 BX LR ;; return
423
424 /**
425 * @brief Locks GPIO Pins configuration registers.
426 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
427 * @param GPIO_Pin: specifies the port bit to be written.
428 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
429 * @retval None
430 */
\ In section .text, align 2, keep-with-next
431 void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
432 {
433 uint32_t tmp = 0x00010000;
\ GPIO_PinLockConfig:
\ 00000000 5FF48032 MOVS R2,#+65536
434
435 /* Check the parameters */
436 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
437 assert_param(IS_GPIO_PIN(GPIO_Pin));
438
439 tmp |= GPIO_Pin;
\ 00000004 89B2 UXTH R1,R1 ;; ZeroExt R1,R1,#+16,#+16
\ 00000006 0A43 ORRS R2,R1,R2
440 /* Set LCKK bit */
441 GPIOx->LCKR = tmp;
\ 00000008 8261 STR R2,[R0, #+24]
442 /* Reset LCKK bit */
443 GPIOx->LCKR = GPIO_Pin;
\ 0000000A 89B2 UXTH R1,R1 ;; ZeroExt R1,R1,#+16,#+16
\ 0000000C 8161 STR R1,[R0, #+24]
444 /* Set LCKK bit */
445 GPIOx->LCKR = tmp;
\ 0000000E 8261 STR R2,[R0, #+24]
446 /* Read LCKK bit*/
447 tmp = GPIOx->LCKR;
\ 00000010 8369 LDR R3,[R0, #+24]
\ 00000012 1A00 MOVS R2,R3
448 /* Read LCKK bit*/
449 tmp = GPIOx->LCKR;
\ 00000014 8369 LDR R3,[R0, #+24]
\ 00000016 1A00 MOVS R2,R3
450 }
\ 00000018 7047 BX LR ;; return
451
452 /**
453 * @brief Selects the GPIO pin used as Event output.
454 * @param GPIO_PortSource: selects the GPIO port to be used as source
455 * for Event output.
456 * This parameter can be GPIO_PortSourceGPIOx where x can be (A..E).
457 * @param GPIO_PinSource: specifies the pin for the Event output.
458 * This parameter can be GPIO_PinSourcex where x can be (0..15).
459 * @retval None
460 */
\ In section .text, align 2, keep-with-next
461 void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
462 {
463 uint32_t tmpreg = 0x00;
\ GPIO_EventOutputConfig:
\ 00000000 0022 MOVS R2,#+0
464 /* Check the parameters */
465 assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource));
466 assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
467
468 tmpreg = AFIO->EVCR;
\ 00000002 .... LDR.N R3,??DataTable5_7 ;; 0x40010000
\ 00000004 1B68 LDR R3,[R3, #+0]
\ 00000006 1A00 MOVS R2,R3
469 /* Clear the PORT[6:4] and PIN[3:0] bits */
470 tmpreg &= EVCR_PORTPINCONFIG_MASK;
\ 00000008 4FF68073 MOVW R3,#+65408
\ 0000000C 1A40 ANDS R2,R3,R2
471 tmpreg |= (uint32_t)GPIO_PortSource << 0x04;
\ 0000000E C0B2 UXTB R0,R0 ;; ZeroExt R0,R0,#+24,#+24
\ 00000010 52EA0012 ORRS R2,R2,R0, LSL #+4
472 tmpreg |= GPIO_PinSource;
\ 00000014 C9B2 UXTB R1,R1 ;; ZeroExt R1,R1,#+24,#+24
\ 00000016 0A43 ORRS R2,R1,R2
473 AFIO->EVCR = tmpreg;
\ 00000018 .... LDR.N R3,??DataTable5_7 ;; 0x40010000
\ 0000001A 1A60 STR R2,[R3, #+0]
474 }
\ 0000001C 7047 BX LR ;; return
475
476 /**
477 * @brief Enables or disables the Event Output.
478 * @param NewState: new state of the Event output.
479 * This parameter can be: ENABLE or DISABLE.
480 * @retval None
481 */
\ In section .text, align 2, keep-with-next
482 void GPIO_EventOutputCmd(FunctionalState NewState)
483 {
484 /* Check the parameters */
485 assert_param(IS_FUNCTIONAL_STATE(NewState));
486
487 *(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState;
\ GPIO_EventOutputCmd:
\ 00000000 .... LDR.N R1,??DataTable5_8 ;; 0x4220001c
\ 00000002 C0B2 UXTB R0,R0 ;; ZeroExt R0,R0,#+24,#+24
\ 00000004 0860 STR R0,[R1, #+0]
488 }
\ 00000006 7047 BX LR ;; return
489
490 /**
491 * @brief Changes the mapping of the specified pin.
492 * @param GPIO_Remap: selects the pin to remap.
493 * This parameter can be one of the following values:
494 * @arg GPIO_Remap_SPI1 : SPI1 Alternate Function mapping
495 * @arg GPIO_Remap_I2C1 : I2C1 Alternate Function mapping
496 * @arg GPIO_Remap_USART1 : USART1 Alternate Function mapping
497 * @arg GPIO_Remap_USART2 : USART2 Alternate Function mapping
498 * @arg GPIO_PartialRemap_USART3 : USART3 Partial Alternate Function mapping
499 * @arg GPIO_FullRemap_USART3 : USART3 Full Alternate Function mapping
500 * @arg GPIO_PartialRemap_TIM1 : TIM1 Partial Alternate Function mapping
501 * @arg GPIO_FullRemap_TIM1 : TIM1 Full Alternate Function mapping
502 * @arg GPIO_PartialRemap1_TIM2 : TIM2 Partial1 Alternate Function mapping
503 * @arg GPIO_PartialRemap2_TIM2 : TIM2 Partial2 Alternate Function mapping
504 * @arg GPIO_FullRemap_TIM2 : TIM2 Full Alternate Function mapping
505 * @arg GPIO_PartialRemap_TIM3 : TIM3 Partial Alternate Function mapping
506 * @arg GPIO_FullRemap_TIM3 : TIM3 Full Alternate Function mapping
507 * @arg GPIO_Remap_TIM4 : TIM4 Alternate Function mapping
508 * @arg GPIO_Remap1_CAN1 : CAN1 Alternate Function mapping
509 * @arg GPIO_Remap2_CAN1 : CAN1 Alternate Function mapping
510 * @arg GPIO_Remap_PD01 : PD01 Alternate Function mapping
511 * @arg GPIO_Remap_TIM5CH4_LSI : LSI connected to TIM5 Channel4 input capture for calibration
512 * @arg GPIO_Remap_ADC1_ETRGINJ : ADC1 External Trigger Injected Conversion remapping
513 * @arg GPIO_Remap_ADC1_ETRGREG : ADC1 External Trigger Regular Conversion remapping
514 * @arg GPIO_Remap_ADC2_ETRGINJ : ADC2 External Trigger Injected Conversion remapping
515 * @arg GPIO_Remap_ADC2_ETRGREG : ADC2 External Trigger Regular Conversion remapping
516 * @arg GPIO_Remap_ETH : Ethernet remapping (only for Connectivity line devices)
517 * @arg GPIO_Remap_CAN2 : CAN2 remapping (only for Connectivity line devices)
518 * @arg GPIO_Remap_SWJ_NoJTRST : Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST
519 * @arg GPIO_Remap_SWJ_JTAGDisable : JTAG-DP Disabled and SW-DP Enabled
520 * @arg GPIO_Remap_SWJ_Disable : Full SWJ Disabled (JTAG-DP + SW-DP)
521 * @arg GPIO_Remap_SPI3 : SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices)
522 * @arg GPIO_Remap_TIM2ITR1_PTP_SOF : Ethernet PTP output or USB OTG SOF (Start of Frame) connected
523 * to TIM2 Internal Trigger 1 for calibration (only for Connectivity line devices)
524 * If the GPIO_Remap_TIM2ITR1_PTP_SOF is enabled the TIM2 ITR1 is connected to
525 * Ethernet PTP output. When Reset TIM2 ITR1 is connected to USB OTG SOF output.
526 * @arg GPIO_Remap_PTP_PPS : Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices)
527 * @arg GPIO_Remap_TIM15 : TIM15 Alternate Function mapping (only for Value line devices)
528 * @arg GPIO_Remap_TIM16 : TIM16 Alternate Function mapping (only for Value line devices)
529 * @arg GPIO_Remap_TIM17 : TIM17 Alternate Function mapping (only for Value line devices)
530 * @arg GPIO_Remap_CEC : CEC Alternate Function mapping (only for Value line devices)
531 * @arg GPIO_Remap_TIM1_DMA : TIM1 DMA requests mapping (only for Value line devices)
532 * @arg GPIO_Remap_TIM9 : TIM9 Alternate Function mapping (only for XL-density devices)
533 * @arg GPIO_Remap_TIM10 : TIM10 Alternate Function mapping (only for XL-density devices)
534 * @arg GPIO_Remap_TIM11 : TIM11 Alternate Function mapping (only for XL-density devices)
535 * @arg GPIO_Remap_TIM13 : TIM13 Alternate Function mapping (only for High density Value line and XL-density devices)
536 * @arg GPIO_Remap_TIM14 : TIM14 Alternate Function mapping (only for High density Value line and XL-density devices)
537 * @arg GPIO_Remap_FSMC_NADV : FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices)
538 * @arg GPIO_Remap_TIM67_DAC_DMA : TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices)
539 * @arg GPIO_Remap_TIM12 : TIM12 Alternate Function mapping (only for High density Value line devices)
540 * @arg GPIO_Remap_MISC : Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping,
541 * only for High density Value line devices)
542 * @param NewState: new state of the port pin remapping.
543 * This parameter can be: ENABLE or DISABLE.
544 * @retval None
545 */
\ In section .text, align 2, keep-with-next
546 void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState)
547 {
\ GPIO_PinRemapConfig:
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -