📄 stm32f10x_gpio.lst
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\ 00000070 4020 MOVS R0,#+64
\ 00000072 ........ BL RCC_APB2PeriphResetCmd
135 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE);
\ 00000076 0021 MOVS R1,#+0
\ 00000078 4020 MOVS R0,#+64
\ 0000007A ........ BL RCC_APB2PeriphResetCmd
\ 0000007E 18E0 B.N ??GPIO_DeInit_1
136 }
137 else if (GPIOx == GPIOF)
\ ??GPIO_DeInit_5:
\ 00000080 .... LDR.N R0,??DataTable5_5 ;; 0x40011c00
\ 00000082 8442 CMP R4,R0
\ 00000084 08D1 BNE.N ??GPIO_DeInit_6
138 {
139 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE);
\ 00000086 0121 MOVS R1,#+1
\ 00000088 8020 MOVS R0,#+128
\ 0000008A ........ BL RCC_APB2PeriphResetCmd
140 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE);
\ 0000008E 0021 MOVS R1,#+0
\ 00000090 8020 MOVS R0,#+128
\ 00000092 ........ BL RCC_APB2PeriphResetCmd
\ 00000096 0CE0 B.N ??GPIO_DeInit_1
141 }
142 else
143 {
144 if (GPIOx == GPIOG)
\ ??GPIO_DeInit_6:
\ 00000098 .... LDR.N R0,??DataTable5_6 ;; 0x40012000
\ 0000009A 8442 CMP R4,R0
\ 0000009C 09D1 BNE.N ??GPIO_DeInit_1
145 {
146 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE);
\ 0000009E 0121 MOVS R1,#+1
\ 000000A0 4FF48070 MOV R0,#+256
\ 000000A4 ........ BL RCC_APB2PeriphResetCmd
147 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE);
\ 000000A8 0021 MOVS R1,#+0
\ 000000AA 4FF48070 MOV R0,#+256
\ 000000AE ........ BL RCC_APB2PeriphResetCmd
148 }
149 }
150 }
\ ??GPIO_DeInit_1:
\ 000000B2 10BD POP {R4,PC} ;; return
151
152 /**
153 * @brief Deinitializes the Alternate Functions (remap, event control
154 * and EXTI configuration) registers to their default reset values.
155 * @param None
156 * @retval None
157 */
\ In section .text, align 2, keep-with-next
158 void GPIO_AFIODeInit(void)
159 {
\ GPIO_AFIODeInit:
\ 00000000 80B5 PUSH {R7,LR}
160 RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
\ 00000002 0121 MOVS R1,#+1
\ 00000004 0120 MOVS R0,#+1
\ 00000006 ........ BL RCC_APB2PeriphResetCmd
161 RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
\ 0000000A 0021 MOVS R1,#+0
\ 0000000C 0120 MOVS R0,#+1
\ 0000000E ........ BL RCC_APB2PeriphResetCmd
162 }
\ 00000012 01BD POP {R0,PC} ;; return
163
164 /**
165 * @brief Initializes the GPIOx peripheral according to the specified
166 * parameters in the GPIO_InitStruct.
167 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
168 * @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that
169 * contains the configuration information for the specified GPIO peripheral.
170 * @retval None
171 */
\ In section .text, align 2, keep-with-next
172 void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
173 {
\ GPIO_Init:
\ 00000000 F0B5 PUSH {R4-R7,LR}
174 uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
\ 00000002 0027 MOVS R7,#+0
\ 00000004 0022 MOVS R2,#+0
\ 00000006 0023 MOVS R3,#+0
\ 00000008 0024 MOVS R4,#+0
175 uint32_t tmpreg = 0x00, pinmask = 0x00;
\ 0000000A 0025 MOVS R5,#+0
\ 0000000C 0026 MOVS R6,#+0
176 /* Check the parameters */
177 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
178 assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
179 assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
180
181 /*---------------------------- GPIO Mode Configuration -----------------------*/
182 currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F);
\ 0000000E 91F803C0 LDRB R12,[R1, #+3]
\ 00000012 1CF00F0C ANDS R12,R12,#0xF
\ 00000016 6746 MOV R7,R12
183 if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00)
\ 00000018 91F803C0 LDRB R12,[R1, #+3]
\ 0000001C 5FEACC6C LSLS R12,R12,#+27
\ 00000020 03D5 BPL.N ??GPIO_Init_0
184 {
185 /* Check the parameters */
186 assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
187 /* Output mode */
188 currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed;
\ 00000022 91F802C0 LDRB R12,[R1, #+2]
\ 00000026 5CEA0707 ORRS R7,R12,R7
189 }
190 /*---------------------------- GPIO CRL Configuration ------------------------*/
191 /* Configure the eight low port pins */
192 if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00)
\ ??GPIO_Init_0:
\ 0000002A 91F800C0 LDRB R12,[R1, #+0]
\ 0000002E 5FEA0C6C LSLS R12,R12,#+24
\ 00000032 3AD0 BEQ.N ??GPIO_Init_1
193 {
194 tmpreg = GPIOx->CRL;
\ 00000034 D0F800C0 LDR R12,[R0, #+0]
\ 00000038 6546 MOV R5,R12
195 for (pinpos = 0x00; pinpos < 0x08; pinpos++)
\ 0000003A 5FF0000C MOVS R12,#+0
\ 0000003E 6346 MOV R3,R12
\ ??GPIO_Init_2:
\ 00000040 082B CMP R3,#+8
\ 00000042 31D2 BCS.N ??GPIO_Init_3
196 {
197 pos = ((uint32_t)0x01) << pinpos;
\ 00000044 5FF0010C MOVS R12,#+1
\ 00000048 1CFA03FC LSLS R12,R12,R3
\ 0000004C 6446 MOV R4,R12
198 /* Get the port pins position */
199 currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
\ 0000004E B1F800C0 LDRH R12,[R1, #+0]
\ 00000052 14EA0C0C ANDS R12,R4,R12
\ 00000056 6246 MOV R2,R12
200 if (currentpin == pos)
\ 00000058 A242 CMP R2,R4
\ 0000005A 23D1 BNE.N ??GPIO_Init_4
201 {
202 pos = pinpos << 2;
\ 0000005C 5FEA830C LSLS R12,R3,#+2
\ 00000060 6446 MOV R4,R12
203 /* Clear the corresponding low control register bits */
204 pinmask = ((uint32_t)0x0F) << pos;
\ 00000062 5FF00F0C MOVS R12,#+15
\ 00000066 1CFA04FC LSLS R12,R12,R4
\ 0000006A 6646 MOV R6,R12
205 tmpreg &= ~pinmask;
\ 0000006C B543 BICS R5,R5,R6
206 /* Write the mode configuration in the corresponding bits */
207 tmpreg |= (currentmode << pos);
\ 0000006E 17FA04FC LSLS R12,R7,R4
\ 00000072 5CEA0505 ORRS R5,R12,R5
208 /* Reset the corresponding ODR bit */
209 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
\ 00000076 91F803C0 LDRB R12,[R1, #+3]
\ 0000007A BCF1280F CMP R12,#+40
\ 0000007E 06D1 BNE.N ??GPIO_Init_5
210 {
211 GPIOx->BRR = (((uint32_t)0x01) << pinpos);
\ 00000080 5FF0010C MOVS R12,#+1
\ 00000084 1CFA03FC LSLS R12,R12,R3
\ 00000088 C0F814C0 STR R12,[R0, #+20]
\ 0000008C 0AE0 B.N ??GPIO_Init_4
212 }
213 else
214 {
215 /* Set the corresponding ODR bit */
216 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
\ ??GPIO_Init_5:
\ 0000008E 91F803C0 LDRB R12,[R1, #+3]
\ 00000092 BCF1480F CMP R12,#+72
\ 00000096 05D1 BNE.N ??GPIO_Init_4
217 {
218 GPIOx->BSRR = (((uint32_t)0x01) << pinpos);
\ 00000098 5FF0010C MOVS R12,#+1
\ 0000009C 1CFA03FC LSLS R12,R12,R3
\ 000000A0 C0F810C0 STR R12,[R0, #+16]
219 }
220 }
221 }
222 }
\ ??GPIO_Init_4:
\ 000000A4 5B1C ADDS R3,R3,#+1
\ 000000A6 CBE7 B.N ??GPIO_Init_2
223 GPIOx->CRL = tmpreg;
\ ??GPIO_Init_3:
\ 000000A8 0560 STR R5,[R0, #+0]
224 }
225 /*---------------------------- GPIO CRH Configuration ------------------------*/
226 /* Configure the eight high port pins */
227 if (GPIO_InitStruct->GPIO_Pin > 0x00FF)
\ ??GPIO_Init_1:
\ 000000AA B1F800C0 LDRH R12,[R1, #+0]
\ 000000AE 4FF4807E MOV LR,#+256
\ 000000B2 F445 CMP R12,LR
\ 000000B4 3FD3 BCC.N ??GPIO_Init_6
228 {
229 tmpreg = GPIOx->CRH;
\ 000000B6 D0F804C0 LDR R12,[R0, #+4]
\ 000000BA 6546 MOV R5,R12
230 for (pinpos = 0x00; pinpos < 0x08; pinpos++)
\ 000000BC 5FF0000C MOVS R12,#+0
\ 000000C0 6346 MOV R3,R12
\ ??GPIO_Init_7:
\ 000000C2 082B CMP R3,#+8
\ 000000C4 36D2 BCS.N ??GPIO_Init_8
231 {
232 pos = (((uint32_t)0x01) << (pinpos + 0x08));
\ 000000C6 5FF0010C MOVS R12,#+1
\ 000000CA 13F1080E ADDS LR,R3,#+8
\ 000000CE 1CFA0EFC LSLS R12,R12,LR
\ 000000D2 6446 MOV R4,R12
233 /* Get the port pins position */
234 currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
\ 000000D4 B1F800C0 LDRH R12,[R1, #+0]
\ 000000D8 14EA0C0C ANDS R12,R4,R12
\ 000000DC 6246 MOV R2,R12
235 if (currentpin == pos)
\ 000000DE A242 CMP R2,R4
\ 000000E0 26D1 BNE.N ??GPIO_Init_9
236 {
237 pos = pinpos << 2;
\ 000000E2 5FEA830C LSLS R12,R3,#+2
\ 000000E6 6446 MOV R4,R12
238 /* Clear the corresponding high control register bits */
239 pinmask = ((uint32_t)0x0F) << pos;
\ 000000E8 5FF00F0C MOVS R12,#+15
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