📄 stm32f10x_adc.lst
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\ 0000000E 4FF40070 MOV R0,#+512
\ 00000012 ........ BL RCC_APB2PeriphResetCmd
187 /* Release ADC1 from reset state */
188 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, DISABLE);
\ 00000016 0021 MOVS R1,#+0
\ 00000018 4FF40070 MOV R0,#+512
\ 0000001C ........ BL RCC_APB2PeriphResetCmd
\ 00000020 1CE0 B.N ??ADC_DeInit_1
189 }
190 else if (ADCx == ADC2)
\ ??ADC_DeInit_0:
\ 00000022 ........ LDR.W R0,??DataTable4_1 ;; 0x40012800
\ 00000026 8442 CMP R4,R0
\ 00000028 0AD1 BNE.N ??ADC_DeInit_2
191 {
192 /* Enable ADC2 reset state */
193 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, ENABLE);
\ 0000002A 0121 MOVS R1,#+1
\ 0000002C 4FF48060 MOV R0,#+1024
\ 00000030 ........ BL RCC_APB2PeriphResetCmd
194 /* Release ADC2 from reset state */
195 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, DISABLE);
\ 00000034 0021 MOVS R1,#+0
\ 00000036 4FF48060 MOV R0,#+1024
\ 0000003A ........ BL RCC_APB2PeriphResetCmd
\ 0000003E 0DE0 B.N ??ADC_DeInit_1
196 }
197 else
198 {
199 if (ADCx == ADC3)
\ ??ADC_DeInit_2:
\ 00000040 ........ LDR.W R0,??DataTable4_2 ;; 0x40013c00
\ 00000044 8442 CMP R4,R0
\ 00000046 09D1 BNE.N ??ADC_DeInit_1
200 {
201 /* Enable ADC3 reset state */
202 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, ENABLE);
\ 00000048 0121 MOVS R1,#+1
\ 0000004A 4FF40040 MOV R0,#+32768
\ 0000004E ........ BL RCC_APB2PeriphResetCmd
203 /* Release ADC3 from reset state */
204 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, DISABLE);
\ 00000052 0021 MOVS R1,#+0
\ 00000054 4FF40040 MOV R0,#+32768
\ 00000058 ........ BL RCC_APB2PeriphResetCmd
205 }
206 }
207 }
\ ??ADC_DeInit_1:
\ 0000005C 10BD POP {R4,PC} ;; return
208
209 /**
210 * @brief Initializes the ADCx peripheral according to the specified parameters
211 * in the ADC_InitStruct.
212 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
213 * @param ADC_InitStruct: pointer to an ADC_InitTypeDef structure that contains
214 * the configuration information for the specified ADC peripheral.
215 * @retval None
216 */
\ In section .text, align 2, keep-with-next
217 void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct)
218 {
\ ADC_Init:
\ 00000000 30B4 PUSH {R4,R5}
219 uint32_t tmpreg1 = 0;
\ 00000002 0023 MOVS R3,#+0
220 uint8_t tmpreg2 = 0;
\ 00000004 0022 MOVS R2,#+0
221 /* Check the parameters */
222 assert_param(IS_ADC_ALL_PERIPH(ADCx));
223 assert_param(IS_ADC_MODE(ADC_InitStruct->ADC_Mode));
224 assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ScanConvMode));
225 assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ContinuousConvMode));
226 assert_param(IS_ADC_EXT_TRIG(ADC_InitStruct->ADC_ExternalTrigConv));
227 assert_param(IS_ADC_DATA_ALIGN(ADC_InitStruct->ADC_DataAlign));
228 assert_param(IS_ADC_REGULAR_LENGTH(ADC_InitStruct->ADC_NbrOfChannel));
229
230 /*---------------------------- ADCx CR1 Configuration -----------------*/
231 /* Get the ADCx CR1 value */
232 tmpreg1 = ADCx->CR1;
\ 00000006 4468 LDR R4,[R0, #+4]
\ 00000008 2300 MOVS R3,R4
233 /* Clear DUALMOD and SCAN bits */
234 tmpreg1 &= CR1_CLEAR_Mask;
\ 0000000A ........ LDR.W R4,??DataTable4_3 ;; 0xfff0feff
\ 0000000E 2340 ANDS R3,R4,R3
235 /* Configure ADCx: Dual mode and scan conversion mode */
236 /* Set DUALMOD bits according to ADC_Mode value */
237 /* Set SCAN bit according to ADC_ScanConvMode value */
238 tmpreg1 |= (uint32_t)(ADC_InitStruct->ADC_Mode | ((uint32_t)ADC_InitStruct->ADC_ScanConvMode << 8));
\ 00000010 0C68 LDR R4,[R1, #+0]
\ 00000012 0D79 LDRB R5,[R1, #+4]
\ 00000014 54EA0524 ORRS R4,R4,R5, LSL #+8
\ 00000018 2343 ORRS R3,R4,R3
239 /* Write to ADCx CR1 */
240 ADCx->CR1 = tmpreg1;
\ 0000001A 4360 STR R3,[R0, #+4]
241
242 /*---------------------------- ADCx CR2 Configuration -----------------*/
243 /* Get the ADCx CR2 value */
244 tmpreg1 = ADCx->CR2;
\ 0000001C 8468 LDR R4,[R0, #+8]
\ 0000001E 2300 MOVS R3,R4
245 /* Clear CONT, ALIGN and EXTSEL bits */
246 tmpreg1 &= CR2_CLEAR_Mask;
\ 00000020 ........ LDR.W R4,??DataTable4_4 ;; 0xfff1f7fd
\ 00000024 2340 ANDS R3,R4,R3
247 /* Configure ADCx: external trigger event and continuous conversion mode */
248 /* Set ALIGN bit according to ADC_DataAlign value */
249 /* Set EXTSEL bits according to ADC_ExternalTrigConv value */
250 /* Set CONT bit according to ADC_ContinuousConvMode value */
251 tmpreg1 |= (uint32_t)(ADC_InitStruct->ADC_DataAlign | ADC_InitStruct->ADC_ExternalTrigConv |
252 ((uint32_t)ADC_InitStruct->ADC_ContinuousConvMode << 1));
\ 00000026 CC68 LDR R4,[R1, #+12]
\ 00000028 8D68 LDR R5,[R1, #+8]
\ 0000002A 2C43 ORRS R4,R5,R4
\ 0000002C 4D79 LDRB R5,[R1, #+5]
\ 0000002E 54EA4504 ORRS R4,R4,R5, LSL #+1
\ 00000032 2343 ORRS R3,R4,R3
253 /* Write to ADCx CR2 */
254 ADCx->CR2 = tmpreg1;
\ 00000034 8360 STR R3,[R0, #+8]
255
256 /*---------------------------- ADCx SQR1 Configuration -----------------*/
257 /* Get the ADCx SQR1 value */
258 tmpreg1 = ADCx->SQR1;
\ 00000036 C46A LDR R4,[R0, #+44]
\ 00000038 2300 MOVS R3,R4
259 /* Clear L bits */
260 tmpreg1 &= SQR1_CLEAR_Mask;
\ 0000003A 33F47003 BICS R3,R3,#0xF00000
261 /* Configure ADCx: regular channel sequence length */
262 /* Set L bits according to ADC_NbrOfChannel value */
263 tmpreg2 |= (uint8_t) (ADC_InitStruct->ADC_NbrOfChannel - (uint8_t)1);
\ 0000003E 0C7C LDRB R4,[R1, #+16]
\ 00000040 641E SUBS R4,R4,#+1
\ 00000042 2243 ORRS R2,R4,R2
264 tmpreg1 |= (uint32_t)tmpreg2 << 20;
\ 00000044 D2B2 UXTB R2,R2 ;; ZeroExt R2,R2,#+24,#+24
\ 00000046 53EA0253 ORRS R3,R3,R2, LSL #+20
265 /* Write to ADCx SQR1 */
266 ADCx->SQR1 = tmpreg1;
\ 0000004A C362 STR R3,[R0, #+44]
267 }
\ 0000004C 30BC POP {R4,R5}
\ 0000004E 7047 BX LR ;; return
268
269 /**
270 * @brief Fills each ADC_InitStruct member with its default value.
271 * @param ADC_InitStruct : pointer to an ADC_InitTypeDef structure which will be initialized.
272 * @retval None
273 */
\ In section .text, align 2, keep-with-next
274 void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct)
275 {
276 /* Reset ADC init structure parameters values */
277 /* Initialize the ADC_Mode member */
278 ADC_InitStruct->ADC_Mode = ADC_Mode_Independent;
\ ADC_StructInit:
\ 00000000 0021 MOVS R1,#+0
\ 00000002 0160 STR R1,[R0, #+0]
279 /* initialize the ADC_ScanConvMode member */
280 ADC_InitStruct->ADC_ScanConvMode = DISABLE;
\ 00000004 0021 MOVS R1,#+0
\ 00000006 0171 STRB R1,[R0, #+4]
281 /* Initialize the ADC_ContinuousConvMode member */
282 ADC_InitStruct->ADC_ContinuousConvMode = DISABLE;
\ 00000008 0021 MOVS R1,#+0
\ 0000000A 4171 STRB R1,[R0, #+5]
283 /* Initialize the ADC_ExternalTrigConv member */
284 ADC_InitStruct->ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
\ 0000000C 0021 MOVS R1,#+0
\ 0000000E 8160 STR R1,[R0, #+8]
285 /* Initialize the ADC_DataAlign member */
286 ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right;
\ 00000010 0021 MOVS R1,#+0
\ 00000012 C160 STR R1,[R0, #+12]
287 /* Initialize the ADC_NbrOfChannel member */
288 ADC_InitStruct->ADC_NbrOfChannel = 1;
\ 00000014 0121 MOVS R1,#+1
\ 00000016 0174 STRB R1,[R0, #+16]
289 }
\ 00000018 7047 BX LR ;; return
290
291 /**
292 * @brief Enables or disables the specified ADC peripheral.
293 * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
294 * @param NewState: new state of the ADCx peripheral.
295 * This parameter can be: ENABLE or DISABLE.
296 * @retval None
297 */
\ In section .text, align 2, keep-with-next
298 void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
299 {
300 /* Check the parameters */
301 assert_param(IS_ADC_ALL_PERIPH(ADCx));
302 assert_param(IS_FUNCTIONAL_STATE(NewState));
303 if (NewState != DISABLE)
\ ADC_Cmd:
\ 00000000 C9B2 UXTB R1,R1 ;; ZeroExt R1,R1,#+24,#+24
\ 00000002 0029 CMP R1,#+0
\ 00000004 04D0 BEQ.N ??ADC_Cmd_0
304 {
305 /* Set the ADON bit to wake up the ADC from power down mode */
306 ADCx->CR2 |= CR2_ADON_Set;
\ 00000006 8268 LDR R2,[R0, #+8]
\ 00000008 52F00102 ORRS R2,R2,#0x1
\ 0000000C 8260 STR R2,[R0, #+8]
\ 0000000E 03E0 B.N ??ADC_Cmd_1
307 }
308 else
309 {
310 /* Disable the selected ADC peripheral */
311 ADCx->CR2 &= CR2_ADON_Reset;
\ ??ADC_Cmd_0:
\ 00000010 8268 LDR R2,[R0, #+8]
\ 00000012 5208 LSRS R2,R2,#+1
\ 00000014 5200 LSLS R2,R2,#+1
\ 00000016 8260 STR R2,[R0, #+8]
312 }
313 }
\ ??ADC_Cmd_1:
\ 00000018 7047 BX LR ;; return
314
315 /**
316 * @brief Enables or disables the specified ADC DMA request.
317 * @param ADCx: where x can be 1 or 3 to select the ADC peripheral.
318 * Note: ADC2 hasn't a DMA capability.
319 * @param NewState: new state of the selected ADC DMA transfer.
320 * This parameter can be: ENABLE or DISABLE.
321 * @retval None
322 */
\ In section .text, align 2, keep-with-next
323 void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState)
324 {
325 /* Check the parameters */
326 assert_param(IS_ADC_DMA_PERIPH(ADCx));
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