📄 stm32f10x_sdio.lst
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###############################################################################
# #
# IAR ANSI C/C++ Compiler V6.10.2.52244/W32 for ARM 07/Aug/2011 12:10:17 #
# Copyright 1999-2010 IAR Systems AB. #
# #
# Cpu mode = thumb #
# Endian = little #
# Source file = F:\stm32\我的程序\Micrium\Software\EWARM\BSP\ST\STM32F10 #
# x_StdPeriph_Driver\src\stm32f10x_sdio.c #
# Command line = F:\stm32\我的程序\Micrium\Software\EWARM\BSP\ST\STM32F10 #
# x_StdPeriph_Driver\src\stm32f10x_sdio.c -D #
# USE_STDPERIPH_DRIVER -D STM32F10X_CL -lCN #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Flash\Lis #
# t\ -o F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Fla #
# sh\Obj\ --no_cse --no_unroll --no_inline #
# --no_code_motion --no_tbaa --no_clustering #
# --no_scheduling --debug --endian=little --cpu=Cortex-M3 #
# -e --fpu=None --dlib_config #
# D:\arm\INC\c\DLib_Config_Normal.h -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\APP\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\ #
# -I F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP #
# \ST\CMSIS\CM3\CoreSupport\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\ST #
# \CMSIS\CM3\DeviceSupport\ST\STM32F10x\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\ST #
# \STM32F10x_StdPeriph_Driver\inc\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\uC #
# OS-II\ -I F:\stm32\我的程序\Micrium\Software\EWARM\OS-II #
# \..\..\uCOS-II\Ports\ARM-Cortex-M3\Generic\IAR\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\..\uCO #
# S-II\Source\ -I F:\stm32\我的程序\Micrium\Software\EWARM #
# \OS-II\..\..\uC-LIB\ -I F:\stm32\我的程序\Micrium\Softwa #
# re\EWARM\OS-II\..\..\uC-LIB\Ports\ARM-Cortex-M3\IAR\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\..\uC- #
# CPU\ -I F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\. #
# .\..\uC-CPU\ARM-Cortex-M3\IAR\ -On --use_c++_inline #
# List file = F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Flash\Lis #
# t\stm32f10x_sdio.lst #
# Object file = F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Flash\Obj #
# \stm32f10x_sdio.o #
# #
# #
###############################################################################
F:\stm32\我的程序\Micrium\Software\EWARM\BSP\ST\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c
1 /**
2 ******************************************************************************
3 * @file stm32f10x_sdio.c
4 * @author MCD Application Team
5 * @version V3.4.0
6 * @date 10/15/2010
7 * @brief This file provides all the SDIO firmware functions.
8 ******************************************************************************
9 * @copy
10 *
11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 *
18 * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
19 */
20
21 /* Includes ------------------------------------------------------------------*/
22 #include "stm32f10x_sdio.h"
23 #include "stm32f10x_rcc.h"
24
25 /** @addtogroup STM32F10x_StdPeriph_Driver
26 * @{
27 */
28
29 /** @defgroup SDIO
30 * @brief SDIO driver modules
31 * @{
32 */
33
34 /** @defgroup SDIO_Private_TypesDefinitions
35 * @{
36 */
37
38 /* ------------ SDIO registers bit address in the alias region ----------- */
39 #define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE)
40
41 /* --- CLKCR Register ---*/
42
43 /* Alias word address of CLKEN bit */
44 #define CLKCR_OFFSET (SDIO_OFFSET + 0x04)
45 #define CLKEN_BitNumber 0x08
46 #define CLKCR_CLKEN_BB (PERIPH_BB_BASE + (CLKCR_OFFSET * 32) + (CLKEN_BitNumber * 4))
47
48 /* --- CMD Register ---*/
49
50 /* Alias word address of SDIOSUSPEND bit */
51 #define CMD_OFFSET (SDIO_OFFSET + 0x0C)
52 #define SDIOSUSPEND_BitNumber 0x0B
53 #define CMD_SDIOSUSPEND_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (SDIOSUSPEND_BitNumber * 4))
54
55 /* Alias word address of ENCMDCOMPL bit */
56 #define ENCMDCOMPL_BitNumber 0x0C
57 #define CMD_ENCMDCOMPL_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ENCMDCOMPL_BitNumber * 4))
58
59 /* Alias word address of NIEN bit */
60 #define NIEN_BitNumber 0x0D
61 #define CMD_NIEN_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (NIEN_BitNumber * 4))
62
63 /* Alias word address of ATACMD bit */
64 #define ATACMD_BitNumber 0x0E
65 #define CMD_ATACMD_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ATACMD_BitNumber * 4))
66
67 /* --- DCTRL Register ---*/
68
69 /* Alias word address of DMAEN bit */
70 #define DCTRL_OFFSET (SDIO_OFFSET + 0x2C)
71 #define DMAEN_BitNumber 0x03
72 #define DCTRL_DMAEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (DMAEN_BitNumber * 4))
73
74 /* Alias word address of RWSTART bit */
75 #define RWSTART_BitNumber 0x08
76 #define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTART_BitNumber * 4))
77
78 /* Alias word address of RWSTOP bit */
79 #define RWSTOP_BitNumber 0x09
80 #define DCTRL_RWSTOP_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTOP_BitNumber * 4))
81
82 /* Alias word address of RWMOD bit */
83 #define RWMOD_BitNumber 0x0A
84 #define DCTRL_RWMOD_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWMOD_BitNumber * 4))
85
86 /* Alias word address of SDIOEN bit */
87 #define SDIOEN_BitNumber 0x0B
88 #define DCTRL_SDIOEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (SDIOEN_BitNumber * 4))
89
90 /* ---------------------- SDIO registers bit mask ------------------------ */
91
92 /* --- CLKCR Register ---*/
93
94 /* CLKCR register clear mask */
95 #define CLKCR_CLEAR_MASK ((uint32_t)0xFFFF8100)
96
97 /* --- PWRCTRL Register ---*/
98
99 /* SDIO PWRCTRL Mask */
100 #define PWR_PWRCTRL_MASK ((uint32_t)0xFFFFFFFC)
101
102 /* --- DCTRL Register ---*/
103
104 /* SDIO DCTRL Clear Mask */
105 #define DCTRL_CLEAR_MASK ((uint32_t)0xFFFFFF08)
106
107 /* --- CMD Register ---*/
108
109 /* CMD Register clear mask */
110 #define CMD_CLEAR_MASK ((uint32_t)0xFFFFF800)
111
112 /* SDIO RESP Registers Address */
113 #define SDIO_RESP_ADDR ((uint32_t)(SDIO_BASE + 0x14))
114
115 /**
116 * @}
117 */
118
119 /** @defgroup SDIO_Private_Defines
120 * @{
121 */
122
123 /**
124 * @}
125 */
126
127 /** @defgroup SDIO_Private_Macros
128 * @{
129 */
130
131 /**
132 * @}
133 */
134
135 /** @defgroup SDIO_Private_Variables
136 * @{
137 */
138
139 /**
140 * @}
141 */
142
143 /** @defgroup SDIO_Private_FunctionPrototypes
144 * @{
145 */
146
147 /**
148 * @}
149 */
150
151 /** @defgroup SDIO_Private_Functions
152 * @{
153 */
154
155 /**
156 * @brief Deinitializes the SDIO peripheral registers to their default reset values.
157 * @param None
158 * @retval None
159 */
\ In section .text, align 2, keep-with-next
160 void SDIO_DeInit(void)
161 {
162 SDIO->POWER = 0x00000000;
\ SDIO_DeInit:
\ 00000000 .... LDR.N R0,??DataTable26 ;; 0x40018000
\ 00000002 0021 MOVS R1,#+0
\ 00000004 0160 STR R1,[R0, #+0]
163 SDIO->CLKCR = 0x00000000;
\ 00000006 .... LDR.N R0,??DataTable26_1 ;; 0x40018004
\ 00000008 0021 MOVS R1,#+0
\ 0000000A 0160 STR R1,[R0, #+0]
164 SDIO->ARG = 0x00000000;
\ 0000000C .... LDR.N R0,??DataTable26_2 ;; 0x40018008
\ 0000000E 0021 MOVS R1,#+0
\ 00000010 0160 STR R1,[R0, #+0]
165 SDIO->CMD = 0x00000000;
\ 00000012 .... LDR.N R0,??DataTable26_3 ;; 0x4001800c
\ 00000014 0021 MOVS R1,#+0
\ 00000016 0160 STR R1,[R0, #+0]
166 SDIO->DTIMER = 0x00000000;
\ 00000018 .... LDR.N R0,??DataTable26_4 ;; 0x40018024
\ 0000001A 0021 MOVS R1,#+0
\ 0000001C 0160 STR R1,[R0, #+0]
167 SDIO->DLEN = 0x00000000;
\ 0000001E .... LDR.N R0,??DataTable26_5 ;; 0x40018028
\ 00000020 0021 MOVS R1,#+0
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