📄 misc.lst
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###############################################################################
# #
# IAR ANSI C/C++ Compiler V6.10.2.52244/W32 for ARM 07/Aug/2011 12:10:27 #
# Copyright 1999-2010 IAR Systems AB. #
# #
# Cpu mode = thumb #
# Endian = little #
# Source file = F:\stm32\我的程序\Micrium\Software\EWARM\BSP\ST\STM32F10 #
# x_StdPeriph_Driver\src\misc.c #
# Command line = F:\stm32\我的程序\Micrium\Software\EWARM\BSP\ST\STM32F10 #
# x_StdPeriph_Driver\src\misc.c -D USE_STDPERIPH_DRIVER #
# -D STM32F10X_CL -lCN F:\stm32\我的程序\Micrium\Software\ #
# EWARM\OS-II\Flash\List\ -o F:\stm32\我的程序\Micrium\Sof #
# tware\EWARM\OS-II\Flash\Obj\ --no_cse --no_unroll #
# --no_inline --no_code_motion --no_tbaa --no_clustering #
# --no_scheduling --debug --endian=little --cpu=Cortex-M3 #
# -e --fpu=None --dlib_config #
# D:\arm\INC\c\DLib_Config_Normal.h -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\APP\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\ #
# -I F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP #
# \ST\CMSIS\CM3\CoreSupport\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\ST #
# \CMSIS\CM3\DeviceSupport\ST\STM32F10x\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\ST #
# \STM32F10x_StdPeriph_Driver\inc\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\uC #
# OS-II\ -I F:\stm32\我的程序\Micrium\Software\EWARM\OS-II #
# \..\..\uCOS-II\Ports\ARM-Cortex-M3\Generic\IAR\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\..\uCO #
# S-II\Source\ -I F:\stm32\我的程序\Micrium\Software\EWARM #
# \OS-II\..\..\uC-LIB\ -I F:\stm32\我的程序\Micrium\Softwa #
# re\EWARM\OS-II\..\..\uC-LIB\Ports\ARM-Cortex-M3\IAR\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\..\uC- #
# CPU\ -I F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\. #
# .\..\uC-CPU\ARM-Cortex-M3\IAR\ -On --use_c++_inline #
# List file = F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Flash\Lis #
# t\misc.lst #
# Object file = F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Flash\Obj #
# \misc.o #
# #
# #
###############################################################################
F:\stm32\我的程序\Micrium\Software\EWARM\BSP\ST\STM32F10x_StdPeriph_Driver\src\misc.c
1 /**
2 ******************************************************************************
3 * @file misc.c
4 * @author MCD Application Team
5 * @version V3.4.0
6 * @date 10/15/2010
7 * @brief This file provides all the miscellaneous firmware functions (add-on
8 * to CMSIS functions).
9 ******************************************************************************
10 * @copy
11 *
12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 *
19 * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
20 */
21
22 /* Includes ------------------------------------------------------------------*/
23 #include "misc.h"
24
25 /** @addtogroup STM32F10x_StdPeriph_Driver
26 * @{
27 */
28
29 /** @defgroup MISC
30 * @brief MISC driver modules
31 * @{
32 */
33
34 /** @defgroup MISC_Private_TypesDefinitions
35 * @{
36 */
37
38 /**
39 * @}
40 */
41
42 /** @defgroup MISC_Private_Defines
43 * @{
44 */
45
46 #define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000)
47 /**
48 * @}
49 */
50
51 /** @defgroup MISC_Private_Macros
52 * @{
53 */
54
55 /**
56 * @}
57 */
58
59 /** @defgroup MISC_Private_Variables
60 * @{
61 */
62
63 /**
64 * @}
65 */
66
67 /** @defgroup MISC_Private_FunctionPrototypes
68 * @{
69 */
70
71 /**
72 * @}
73 */
74
75 /** @defgroup MISC_Private_Functions
76 * @{
77 */
78
79 /**
80 * @brief Configures the priority grouping: pre-emption priority and subpriority.
81 * @param NVIC_PriorityGroup: specifies the priority grouping bits length.
82 * This parameter can be one of the following values:
83 * @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority
84 * 4 bits for subpriority
85 * @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority
86 * 3 bits for subpriority
87 * @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority
88 * 2 bits for subpriority
89 * @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority
90 * 1 bits for subpriority
91 * @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority
92 * 0 bits for subpriority
93 * @retval None
94 */
\ In section .text, align 2, keep-with-next
95 void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
96 {
97 /* Check the parameters */
98 assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup));
99
100 /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
101 SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup;
\ NVIC_PriorityGroupConfig:
\ 00000000 .... LDR.N R1,??DataTable4 ;; 0x5fa0000
\ 00000002 0143 ORRS R1,R1,R0
\ 00000004 .... LDR.N R2,??DataTable4_1 ;; 0xe000ed0c
\ 00000006 1160 STR R1,[R2, #+0]
102 }
\ 00000008 7047 BX LR ;; return
103
104 /**
105 * @brief Initializes the NVIC peripheral according to the specified
106 * parameters in the NVIC_InitStruct.
107 * @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
108 * the configuration information for the specified NVIC peripheral.
109 * @retval None
110 */
\ In section .text, align 2, keep-with-next
111 void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
112 {
\ NVIC_Init:
\ 00000000 F0B4 PUSH {R4-R7}
113 uint32_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F;
\ 00000002 0023 MOVS R3,#+0
\ 00000004 0021 MOVS R1,#+0
\ 00000006 0F22 MOVS R2,#+15
114
115 /* Check the parameters */
116 assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
117 assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority));
118 assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority));
119
120 if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
\ 00000008 C478 LDRB R4,[R0, #+3]
\ 0000000A 002C CMP R4,#+0
\ 0000000C 20D0 BEQ.N ??NVIC_Init_0
121 {
122 /* Compute the Corresponding IRQ Priority --------------------------------*/
123 tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08;
\ 0000000E .... LDR.N R4,??DataTable4_1 ;; 0xe000ed0c
\ 00000010 2468 LDR R4,[R4, #+0]
\ 00000012 14F4E064 ANDS R4,R4,#0x700
\ 00000016 D4F5E064 RSBS R4,R4,#+1792
\ 0000001A 240A LSRS R4,R4,#+8
\ 0000001C 2300 MOVS R3,R4
124 tmppre = (0x4 - tmppriority);
\ 0000001E D3F10404 RSBS R4,R3,#+4
\ 00000022 2100 MOVS R1,R4
125 tmpsub = tmpsub >> tmppriority;
\ 00000024 DA40 LSRS R2,R2,R3
126
127 tmppriority = (uint32_t)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre;
\ 00000026 4478 LDRB R4,[R0, #+1]
\ 00000028 8C40 LSLS R4,R4,R1
\ 0000002A 2300 MOVS R3,R4
128 tmppriority |= NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub;
\ 0000002C 8478 LDRB R4,[R0, #+2]
\ 0000002E 1440 ANDS R4,R2,R4
\ 00000030 2343 ORRS R3,R4,R3
129 tmppriority = tmppriority << 0x04;
\ 00000032 1B01 LSLS R3,R3,#+4
130
131 NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority;
\ 00000034 0478 LDRB R4,[R0, #+0]
\ 00000036 .... LDR.N R5,??DataTable4_2 ;; 0xe000e400
\ 00000038 6355 STRB R3,[R4, R5]
132
133 /* Enable the Selected IRQ Channels --------------------------------------*/
134 NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
135 (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
\ 0000003A 0478 LDRB R4,[R0, #+0]
\ 0000003C 6411 ASRS R4,R4,#+5
\ 0000003E .... LDR.N R5,??DataTable4_3 ;; 0xe000e100
\ 00000040 0126 MOVS R6,#+1
\ 00000042 0778 LDRB R7,[R0, #+0]
\ 00000044 17F01F07 ANDS R7,R7,#0x1F
\ 00000048 BE40 LSLS R6,R6,R7
\ 0000004A 45F82460 STR R6,[R5, R4, LSL #+2]
\ 0000004E 09E0 B.N ??NVIC_Init_1
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