📄 stm32f10x_i2c.lst
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622 * @param I2C_Register: specifies the register to read.
623 * This parameter can be one of the following values:
624 * @arg I2C_Register_CR1: CR1 register.
625 * @arg I2C_Register_CR2: CR2 register.
626 * @arg I2C_Register_OAR1: OAR1 register.
627 * @arg I2C_Register_OAR2: OAR2 register.
628 * @arg I2C_Register_DR: DR register.
629 * @arg I2C_Register_SR1: SR1 register.
630 * @arg I2C_Register_SR2: SR2 register.
631 * @arg I2C_Register_CCR: CCR register.
632 * @arg I2C_Register_TRISE: TRISE register.
633 * @retval The value of the read register.
634 */
\ In section .text, align 2, keep-with-next
635 uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register)
636 {
\ I2C_ReadRegister:
\ 00000000 81B0 SUB SP,SP,#+4
\ 00000002 0200 MOVS R2,R0
637 __IO uint32_t tmp = 0;
\ 00000004 0020 MOVS R0,#+0
\ 00000006 0090 STR R0,[SP, #+0]
638
639 /* Check the parameters */
640 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
641 assert_param(IS_I2C_REGISTER(I2C_Register));
642
643 tmp = (uint32_t) I2Cx;
\ 00000008 0092 STR R2,[SP, #+0]
644 tmp += I2C_Register;
\ 0000000A 0098 LDR R0,[SP, #+0]
\ 0000000C C9B2 UXTB R1,R1 ;; ZeroExt R1,R1,#+24,#+24
\ 0000000E 0818 ADDS R0,R1,R0
\ 00000010 0090 STR R0,[SP, #+0]
645
646 /* Return the selected register value */
647 return (*(__IO uint16_t *) tmp);
\ 00000012 0098 LDR R0,[SP, #+0]
\ 00000014 0088 LDRH R0,[R0, #+0]
\ 00000016 01B0 ADD SP,SP,#+4
\ 00000018 7047 BX LR ;; return
648 }
649
650 /**
651 * @brief Enables or disables the specified I2C software reset.
652 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
653 * @param NewState: new state of the I2C software reset.
654 * This parameter can be: ENABLE or DISABLE.
655 * @retval None
656 */
\ In section .text, align 2, keep-with-next
657 void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
658 {
659 /* Check the parameters */
660 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
661 assert_param(IS_FUNCTIONAL_STATE(NewState));
662 if (NewState != DISABLE)
\ I2C_SoftwareResetCmd:
\ 00000000 C9B2 UXTB R1,R1 ;; ZeroExt R1,R1,#+24,#+24
\ 00000002 0029 CMP R1,#+0
\ 00000004 04D0 BEQ.N ??I2C_SoftwareResetCmd_0
663 {
664 /* Peripheral under reset */
665 I2Cx->CR1 |= CR1_SWRST_Set;
\ 00000006 0288 LDRH R2,[R0, #+0]
\ 00000008 52F40042 ORRS R2,R2,#0x8000
\ 0000000C 0280 STRH R2,[R0, #+0]
\ 0000000E 03E0 B.N ??I2C_SoftwareResetCmd_1
666 }
667 else
668 {
669 /* Peripheral not under reset */
670 I2Cx->CR1 &= CR1_SWRST_Reset;
\ ??I2C_SoftwareResetCmd_0:
\ 00000010 0288 LDRH R2,[R0, #+0]
\ 00000012 5204 LSLS R2,R2,#+17
\ 00000014 520C LSRS R2,R2,#+17
\ 00000016 0280 STRH R2,[R0, #+0]
671 }
672 }
\ ??I2C_SoftwareResetCmd_1:
\ 00000018 7047 BX LR ;; return
673
674 /**
675 * @brief Drives the SMBusAlert pin high or low for the specified I2C.
676 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
677 * @param I2C_SMBusAlert: specifies SMBAlert pin level.
678 * This parameter can be one of the following values:
679 * @arg I2C_SMBusAlert_Low: SMBAlert pin driven low
680 * @arg I2C_SMBusAlert_High: SMBAlert pin driven high
681 * @retval None
682 */
\ In section .text, align 2, keep-with-next
683 void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert)
684 {
685 /* Check the parameters */
686 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
687 assert_param(IS_I2C_SMBUS_ALERT(I2C_SMBusAlert));
688 if (I2C_SMBusAlert == I2C_SMBusAlert_Low)
\ I2C_SMBusAlertConfig:
\ 00000000 89B2 UXTH R1,R1 ;; ZeroExt R1,R1,#+16,#+16
\ 00000002 B1F5005F CMP R1,#+8192
\ 00000006 04D1 BNE.N ??I2C_SMBusAlertConfig_0
689 {
690 /* Drive the SMBusAlert pin Low */
691 I2Cx->CR1 |= I2C_SMBusAlert_Low;
\ 00000008 0288 LDRH R2,[R0, #+0]
\ 0000000A 52F40052 ORRS R2,R2,#0x2000
\ 0000000E 0280 STRH R2,[R0, #+0]
\ 00000010 04E0 B.N ??I2C_SMBusAlertConfig_1
692 }
693 else
694 {
695 /* Drive the SMBusAlert pin High */
696 I2Cx->CR1 &= I2C_SMBusAlert_High;
\ ??I2C_SMBusAlertConfig_0:
\ 00000012 0288 LDRH R2,[R0, #+0]
\ 00000014 4DF6FF73 MOVW R3,#+57343
\ 00000018 1A40 ANDS R2,R3,R2
\ 0000001A 0280 STRH R2,[R0, #+0]
697 }
698 }
\ ??I2C_SMBusAlertConfig_1:
\ 0000001C 7047 BX LR ;; return
699
700 /**
701 * @brief Enables or disables the specified I2C PEC transfer.
702 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
703 * @param NewState: new state of the I2C PEC transmission.
704 * This parameter can be: ENABLE or DISABLE.
705 * @retval None
706 */
\ In section .text, align 2, keep-with-next
707 void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState)
708 {
709 /* Check the parameters */
710 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
711 assert_param(IS_FUNCTIONAL_STATE(NewState));
712 if (NewState != DISABLE)
\ I2C_TransmitPEC:
\ 00000000 C9B2 UXTB R1,R1 ;; ZeroExt R1,R1,#+24,#+24
\ 00000002 0029 CMP R1,#+0
\ 00000004 04D0 BEQ.N ??I2C_TransmitPEC_0
713 {
714 /* Enable the selected I2C PEC transmission */
715 I2Cx->CR1 |= CR1_PEC_Set;
\ 00000006 0288 LDRH R2,[R0, #+0]
\ 00000008 52F48052 ORRS R2,R2,#0x1000
\ 0000000C 0280 STRH R2,[R0, #+0]
\ 0000000E 04E0 B.N ??I2C_TransmitPEC_1
716 }
717 else
718 {
719 /* Disable the selected I2C PEC transmission */
720 I2Cx->CR1 &= CR1_PEC_Reset;
\ ??I2C_TransmitPEC_0:
\ 00000010 0288 LDRH R2,[R0, #+0]
\ 00000012 4EF6FF73 MOVW R3,#+61439
\ 00000016 1A40 ANDS R2,R3,R2
\ 00000018 0280 STRH R2,[R0, #+0]
721 }
722 }
\ ??I2C_TransmitPEC_1:
\ 0000001A 7047 BX LR ;; return
723
724 /**
725 * @brief Selects the specified I2C PEC position.
726 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
727 * @param I2C_PECPosition: specifies the PEC position.
728 * This parameter can be one of the following values:
729 * @arg I2C_PECPosition_Next: indicates that the next byte is PEC
730 * @arg I2C_PECPosition_Current: indicates that current byte is PEC
731 * @retval None
732 */
\ In section .text, align 2, keep-with-next
733 void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition)
734 {
735 /* Check the parameters */
736 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
737 assert_param(IS_I2C_PEC_POSITION(I2C_PECPosition));
738 if (I2C_PECPosition == I2C_PECPosition_Next)
\ I2C_PECPositionConfig:
\ 00000000 89B2 UXTH R1,R1 ;; ZeroExt R1,R1,#+16,#+16
\ 00000002 B1F5006F CMP R1,#+2048
\ 00000006 04D1 BNE.N ??I2C_PECPositionConfig_0
739 {
740 /* Next byte in shift register is PEC */
741 I2Cx->CR1 |= I2C_PECPosition_Next;
\ 00000008 0288 LDRH R2,[R0, #+0]
\ 0000000A 52F40062 ORRS R2,R2,#0x800
\ 0000000E 0280 STRH R2,[R0, #+0]
\ 00000010 04E0 B.N ??I2C_PECPositionConfig_1
742 }
743 else
744 {
745 /* Current byte in shift register is PEC */
746 I2Cx->CR1 &= I2C_PECPosition_Current;
\ ??I2C_PECPositionConfig_0:
\ 00000012 0288 LDRH R2,[R0, #+0]
\ 00000014 4FF2FF73 MOVW R3,#+63487
\ 00000018 1A40 ANDS R2,R3,R2
\ 0000001A 0280 STRH R2,[R0, #+0]
747 }
748 }
\ ??I2C_PECPositionConfig_1:
\ 0000001C 7047 BX LR ;; return
749
750 /**
751 * @brief Enables or disables the PEC value calculation of the transfered bytes.
752 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
753 * @param NewState: new state of the I2Cx PEC value calculation.
754 * This parameter can be: ENABLE or DISABLE.
755 * @retval None
756 */
\ In section .text, align 2, keep-with-next
757 void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState)
758 {
759 /* Check the parameters */
760 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
761 assert_param(IS_FUNCTIONAL_STATE(NewState));
762 if (NewState != DISABLE)
\ I2C_CalculatePEC:
\ 00000000 C9B2 UXTB R1,R1 ;; ZeroExt R1,R1,#+24,#+24
\ 00000002 0029 CMP R1,#+0
\ 00000004 04D0 BEQ.N ??I2C_CalculatePEC_0
763 {
764 /* Enable the selected I2C PEC calculation */
765 I2Cx->CR1 |= CR1_ENPEC_Set;
\ 00000006 0288 LDRH R2,[R0, #+0]
\ 00000008 52F02002 ORRS R2,R2,#0x20
\ 0000000C 0280 STRH R2,[R0, #+0]
\ 0000000E 04E0 B.N ??I2C_CalculatePEC_1
766 }
767 else
768 {
769 /* Disable the selected I2C PEC calculation */
770 I2Cx->CR1 &= CR1_ENPEC_Reset;
\ ??I2C_CalculatePEC_0:
\ 00000010 0288 LDRH R2,[R0, #+0]
\ 00000012 4FF6DF73 MOVW R3,#+65503
\ 00
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