📄 stm32f10x_spi.lst
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###############################################################################
# #
# IAR ANSI C/C++ Compiler V6.10.2.52244/W32 for ARM 07/Aug/2011 12:10:40 #
# Copyright 1999-2010 IAR Systems AB. #
# #
# Cpu mode = thumb #
# Endian = little #
# Source file = F:\stm32\我的程序\Micrium\Software\EWARM\BSP\ST\STM32F10 #
# x_StdPeriph_Driver\src\stm32f10x_spi.c #
# Command line = F:\stm32\我的程序\Micrium\Software\EWARM\BSP\ST\STM32F10 #
# x_StdPeriph_Driver\src\stm32f10x_spi.c -D #
# USE_STDPERIPH_DRIVER -D STM32F10X_CL -lCN #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Flash\Lis #
# t\ -o F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Fla #
# sh\Obj\ --no_cse --no_unroll --no_inline #
# --no_code_motion --no_tbaa --no_clustering #
# --no_scheduling --debug --endian=little --cpu=Cortex-M3 #
# -e --fpu=None --dlib_config #
# D:\arm\INC\c\DLib_Config_Normal.h -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\APP\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\ #
# -I F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP #
# \ST\CMSIS\CM3\CoreSupport\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\ST #
# \CMSIS\CM3\DeviceSupport\ST\STM32F10x\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\ST #
# \STM32F10x_StdPeriph_Driver\inc\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\uC #
# OS-II\ -I F:\stm32\我的程序\Micrium\Software\EWARM\OS-II #
# \..\..\uCOS-II\Ports\ARM-Cortex-M3\Generic\IAR\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\..\uCO #
# S-II\Source\ -I F:\stm32\我的程序\Micrium\Software\EWARM #
# \OS-II\..\..\uC-LIB\ -I F:\stm32\我的程序\Micrium\Softwa #
# re\EWARM\OS-II\..\..\uC-LIB\Ports\ARM-Cortex-M3\IAR\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\..\uC- #
# CPU\ -I F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\. #
# .\..\uC-CPU\ARM-Cortex-M3\IAR\ -On --use_c++_inline #
# List file = F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Flash\Lis #
# t\stm32f10x_spi.lst #
# Object file = F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Flash\Obj #
# \stm32f10x_spi.o #
# #
# #
###############################################################################
F:\stm32\我的程序\Micrium\Software\EWARM\BSP\ST\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c
1 /**
2 ******************************************************************************
3 * @file stm32f10x_spi.c
4 * @author MCD Application Team
5 * @version V3.4.0
6 * @date 10/15/2010
7 * @brief This file provides all the SPI firmware functions.
8 ******************************************************************************
9 * @copy
10 *
11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 *
18 * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
19 */
20
21 /* Includes ------------------------------------------------------------------*/
22 #include "stm32f10x_spi.h"
23 #include "stm32f10x_rcc.h"
24
25 /** @addtogroup STM32F10x_StdPeriph_Driver
26 * @{
27 */
28
29 /** @defgroup SPI
30 * @brief SPI driver modules
31 * @{
32 */
33
34 /** @defgroup SPI_Private_TypesDefinitions
35 * @{
36 */
37
38 /**
39 * @}
40 */
41
42
43 /** @defgroup SPI_Private_Defines
44 * @{
45 */
46
47 /* SPI SPE mask */
48 #define CR1_SPE_Set ((uint16_t)0x0040)
49 #define CR1_SPE_Reset ((uint16_t)0xFFBF)
50
51 /* I2S I2SE mask */
52 #define I2SCFGR_I2SE_Set ((uint16_t)0x0400)
53 #define I2SCFGR_I2SE_Reset ((uint16_t)0xFBFF)
54
55 /* SPI CRCNext mask */
56 #define CR1_CRCNext_Set ((uint16_t)0x1000)
57
58 /* SPI CRCEN mask */
59 #define CR1_CRCEN_Set ((uint16_t)0x2000)
60 #define CR1_CRCEN_Reset ((uint16_t)0xDFFF)
61
62 /* SPI SSOE mask */
63 #define CR2_SSOE_Set ((uint16_t)0x0004)
64 #define CR2_SSOE_Reset ((uint16_t)0xFFFB)
65
66 /* SPI registers Masks */
67 #define CR1_CLEAR_Mask ((uint16_t)0x3040)
68 #define I2SCFGR_CLEAR_Mask ((uint16_t)0xF040)
69
70 /* SPI or I2S mode selection masks */
71 #define SPI_Mode_Select ((uint16_t)0xF7FF)
72 #define I2S_Mode_Select ((uint16_t)0x0800)
73
74 /* I2S clock source selection masks */
75 #define I2S2_CLOCK_SRC ((uint32_t)(0x00020000))
76 #define I2S3_CLOCK_SRC ((uint32_t)(0x00040000))
77 #define I2S_MUL_MASK ((uint32_t)(0x0000F000))
78 #define I2S_DIV_MASK ((uint32_t)(0x000000F0))
79
80 /**
81 * @}
82 */
83
84 /** @defgroup SPI_Private_Macros
85 * @{
86 */
87
88 /**
89 * @}
90 */
91
92 /** @defgroup SPI_Private_Variables
93 * @{
94 */
95
96 /**
97 * @}
98 */
99
100 /** @defgroup SPI_Private_FunctionPrototypes
101 * @{
102 */
103
104 /**
105 * @}
106 */
107
108 /** @defgroup SPI_Private_Functions
109 * @{
110 */
111
112 /**
113 * @brief Deinitializes the SPIx peripheral registers to their default
114 * reset values (Affects also the I2Ss).
115 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
116 * @retval None
117 */
\ In section .text, align 2, keep-with-next
118 void SPI_I2S_DeInit(SPI_TypeDef* SPIx)
119 {
\ SPI_I2S_DeInit:
\ 00000000 10B5 PUSH {R4,LR}
\ 00000002 0400 MOVS R4,R0
120 /* Check the parameters */
121 assert_param(IS_SPI_ALL_PERIPH(SPIx));
122
123 if (SPIx == SPI1)
\ 00000004 .... LDR.N R0,??DataTable1 ;; 0x40013000
\ 00000006 8442 CMP R4,R0
\ 00000008 0AD1 BNE.N ??SPI_I2S_DeInit_0
124 {
125 /* Enable SPI1 reset state */
126 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
\ 0000000A 0121 MOVS R1,#+1
\ 0000000C 4FF48050 MOV R0,#+4096
\ 00000010 ........ BL RCC_APB2PeriphResetCmd
127 /* Release SPI1 from reset state */
128 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
\ 00000014 0021 MOVS R1,#+0
\ 00000016 4FF48050 MOV R0,#+4096
\ 0000001A ........ BL RCC_APB2PeriphResetCmd
\ 0000001E 1AE0 B.N ??SPI_I2S_DeInit_1
129 }
130 else if (SPIx == SPI2)
\ ??SPI_I2S_DeInit_0:
\ 00000020 .... LDR.N R0,??DataTable1_1 ;; 0x40003800
\ 00000022 8442 CMP R4,R0
\ 00000024 0AD1 BNE.N ??SPI_I2S_DeInit_2
131 {
132 /* Enable SPI2 reset state */
133 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
\ 00000026 0121 MOVS R1,#+1
\ 00000028 4FF48040 MOV R0,#+16384
\ 0000002C ........ BL RCC_APB1PeriphResetCmd
134 /* Release SPI2 from reset state */
135 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
\ 00000030 0021 MOVS R1,#+0
\ 00000032 4FF48040 MOV R0,#+16384
\ 00000036 ........ BL RCC_APB1PeriphResetCmd
\ 0000003A 0CE0 B.N ??SPI_I2S_DeInit_1
136 }
137 else
138 {
139 if (SPIx == SPI3)
\ ??SPI_I2S_DeInit_2:
\ 0000003C .... LDR.N R0,??DataTable1_2 ;; 0x40003c00
\ 0000003E 8442 CMP R4,R0
\ 00000040 09D1 BNE.N ??SPI_I2S_DeInit_1
140 {
141 /* Enable SPI3 reset state */
142 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE);
\ 00000042 0121 MOVS R1,#+1
\ 00000044 4FF40040 MOV R0,#+32768
\ 00000048 ........ BL RCC_APB1PeriphResetCmd
143 /* Release SPI3 from reset state */
144 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE);
\ 0000004C 0021 MOVS R1,#+0
\ 0000004E 4FF40040 MOV R0,#+32768
\ 00000052 ........ BL RCC_APB1PeriphResetCmd
145 }
146 }
147 }
\ ??SPI_I2S_DeInit_1:
\ 00000056 10BD POP {R4,PC} ;; return
148
149 /**
150 * @brief Initializes the SPIx peripheral according to the specified
151 * parameters in the SPI_InitStruct.
152 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
153 * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that
154 * contains the configuration information for the specified SPI peripheral.
155 * @retval None
156 */
\ In section .text, align 2, keep-with-next
157 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
158 {
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