stm32f10x_pwr.lst
来自「stm32+ucos-ii」· LST 代码 · 共 562 行 · 第 1/2 页
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\ 00000004 0860 STR R0,[R1, #+0]
182 }
\ 00000006 7047 BX LR ;; return
183
184 /**
185 * @brief Enters STOP mode.
186 * @param PWR_Regulator: specifies the regulator state in STOP mode.
187 * This parameter can be one of the following values:
188 * @arg PWR_Regulator_ON: STOP mode with regulator ON
189 * @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode
190 * @param PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction.
191 * This parameter can be one of the following values:
192 * @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction
193 * @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction
194 * @retval None
195 */
\ In section .text, align 2, keep-with-next
196 void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry)
197 {
\ PWR_EnterSTOPMode:
\ 00000000 70B5 PUSH {R4-R6,LR}
\ 00000002 0400 MOVS R4,R0
\ 00000004 0D00 MOVS R5,R1
198 uint32_t tmpreg = 0;
\ 00000006 0026 MOVS R6,#+0
199 /* Check the parameters */
200 assert_param(IS_PWR_REGULATOR(PWR_Regulator));
201 assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry));
202
203 /* Select the regulator state in STOP mode ---------------------------------*/
204 tmpreg = PWR->CR;
\ 00000008 .... LDR.N R0,??DataTable7_2 ;; 0x40007000
\ 0000000A 0068 LDR R0,[R0, #+0]
\ 0000000C 0600 MOVS R6,R0
205 /* Clear PDDS and LPDS bits */
206 tmpreg &= CR_DS_MASK;
\ 0000000E B608 LSRS R6,R6,#+2
\ 00000010 B600 LSLS R6,R6,#+2
207 /* Set LPDS bit according to PWR_Regulator value */
208 tmpreg |= PWR_Regulator;
\ 00000012 2643 ORRS R6,R4,R6
209 /* Store the new value */
210 PWR->CR = tmpreg;
\ 00000014 .... LDR.N R0,??DataTable7_2 ;; 0x40007000
\ 00000016 0660 STR R6,[R0, #+0]
211 /* Set SLEEPDEEP bit of Cortex System Control Register */
212 SCB->SCR |= SCB_SCR_SLEEPDEEP;
\ 00000018 .... LDR.N R0,??DataTable7_4 ;; 0xe000ed10
\ 0000001A 0068 LDR R0,[R0, #+0]
\ 0000001C 50F00400 ORRS R0,R0,#0x4
\ 00000020 .... LDR.N R1,??DataTable7_4 ;; 0xe000ed10
\ 00000022 0860 STR R0,[R1, #+0]
213
214 /* Select STOP mode entry --------------------------------------------------*/
215 if(PWR_STOPEntry == PWR_STOPEntry_WFI)
\ 00000024 EDB2 UXTB R5,R5 ;; ZeroExt R5,R5,#+24,#+24
\ 00000026 012D CMP R5,#+1
\ 00000028 02D1 BNE.N ??PWR_EnterSTOPMode_0
216 {
217 /* Request Wait For Interrupt */
218 __WFI();
\ 0000002A ........ BL __WFI
\ 0000002E 01E0 B.N ??PWR_EnterSTOPMode_1
219 }
220 else
221 {
222 /* Request Wait For Event */
223 __WFE();
\ ??PWR_EnterSTOPMode_0:
\ 00000030 ........ BL __WFE
224 }
225
226 /* Reset SLEEPDEEP bit of Cortex System Control Register */
227 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP);
\ ??PWR_EnterSTOPMode_1:
\ 00000034 .... LDR.N R0,??DataTable7_4 ;; 0xe000ed10
\ 00000036 0068 LDR R0,[R0, #+0]
\ 00000038 30F00400 BICS R0,R0,#0x4
\ 0000003C .... LDR.N R1,??DataTable7_4 ;; 0xe000ed10
\ 0000003E 0860 STR R0,[R1, #+0]
228 }
\ 00000040 70BD POP {R4-R6,PC} ;; return
229
230 /**
231 * @brief Enters STANDBY mode.
232 * @param None
233 * @retval None
234 */
\ In section .text, align 2, keep-with-next
235 void PWR_EnterSTANDBYMode(void)
236 {
\ PWR_EnterSTANDBYMode:
\ 00000000 80B5 PUSH {R7,LR}
237 /* Clear Wake-up flag */
238 PWR->CR |= PWR_CR_CWUF;
\ 00000002 .... LDR.N R0,??DataTable7_2 ;; 0x40007000
\ 00000004 0068 LDR R0,[R0, #+0]
\ 00000006 50F00400 ORRS R0,R0,#0x4
\ 0000000A .... LDR.N R1,??DataTable7_2 ;; 0x40007000
\ 0000000C 0860 STR R0,[R1, #+0]
239 /* Select STANDBY mode */
240 PWR->CR |= PWR_CR_PDDS;
\ 0000000E .... LDR.N R0,??DataTable7_2 ;; 0x40007000
\ 00000010 0068 LDR R0,[R0, #+0]
\ 00000012 50F00200 ORRS R0,R0,#0x2
\ 00000016 .... LDR.N R1,??DataTable7_2 ;; 0x40007000
\ 00000018 0860 STR R0,[R1, #+0]
241 /* Set SLEEPDEEP bit of Cortex System Control Register */
242 SCB->SCR |= SCB_SCR_SLEEPDEEP;
\ 0000001A .... LDR.N R0,??DataTable7_4 ;; 0xe000ed10
\ 0000001C 0068 LDR R0,[R0, #+0]
\ 0000001E 50F00400 ORRS R0,R0,#0x4
\ 00000022 .... LDR.N R1,??DataTable7_4 ;; 0xe000ed10
\ 00000024 0860 STR R0,[R1, #+0]
243 /* This option is used to ensure that store operations are completed */
244 #if defined ( __CC_ARM )
245 __force_stores();
246 #endif
247 /* Request Wait For Interrupt */
248 __WFI();
\ 00000026 ........ BL __WFI
249 }
\ 0000002A 01BD POP {R0,PC} ;; return
250
251 /**
252 * @brief Checks whether the specified PWR flag is set or not.
253 * @param PWR_FLAG: specifies the flag to check.
254 * This parameter can be one of the following values:
255 * @arg PWR_FLAG_WU: Wake Up flag
256 * @arg PWR_FLAG_SB: StandBy flag
257 * @arg PWR_FLAG_PVDO: PVD Output
258 * @retval The new state of PWR_FLAG (SET or RESET).
259 */
\ In section .text, align 2, keep-with-next
260 FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG)
261 {
\ PWR_GetFlagStatus:
\ 00000000 0100 MOVS R1,R0
262 FlagStatus bitstatus = RESET;
\ 00000002 0020 MOVS R0,#+0
263 /* Check the parameters */
264 assert_param(IS_PWR_GET_FLAG(PWR_FLAG));
265
266 if ((PWR->CSR & PWR_FLAG) != (uint32_t)RESET)
\ 00000004 .... LDR.N R2,??DataTable7_5 ;; 0x40007004
\ 00000006 1268 LDR R2,[R2, #+0]
\ 00000008 0A42 TST R2,R1
\ 0000000A 02D0 BEQ.N ??PWR_GetFlagStatus_0
267 {
268 bitstatus = SET;
\ 0000000C 0122 MOVS R2,#+1
\ 0000000E 1000 MOVS R0,R2
\ 00000010 01E0 B.N ??PWR_GetFlagStatus_1
269 }
270 else
271 {
272 bitstatus = RESET;
\ ??PWR_GetFlagStatus_0:
\ 00000012 0022 MOVS R2,#+0
\ 00000014 1000 MOVS R0,R2
273 }
274 /* Return the flag status */
275 return bitstatus;
\ ??PWR_GetFlagStatus_1:
\ 00000016 C0B2 UXTB R0,R0 ;; ZeroExt R0,R0,#+24,#+24
\ 00000018 7047 BX LR ;; return
276 }
277
278 /**
279 * @brief Clears the PWR's pending flags.
280 * @param PWR_FLAG: specifies the flag to clear.
281 * This parameter can be one of the following values:
282 * @arg PWR_FLAG_WU: Wake Up flag
283 * @arg PWR_FLAG_SB: StandBy flag
284 * @retval None
285 */
\ In section .text, align 2, keep-with-next
286 void PWR_ClearFlag(uint32_t PWR_FLAG)
287 {
288 /* Check the parameters */
289 assert_param(IS_PWR_CLEAR_FLAG(PWR_FLAG));
290
291 PWR->CR |= PWR_FLAG << 2;
\ PWR_ClearFlag:
\ 00000000 .... LDR.N R1,??DataTable7_2 ;; 0x40007000
\ 00000002 0968 LDR R1,[R1, #+0]
\ 00000004 51EA8001 ORRS R1,R1,R0, LSL #+2
\ 00000008 .... LDR.N R2,??DataTable7_2 ;; 0x40007000
\ 0000000A 1160 STR R1,[R2, #+0]
292 }
\ 0000000C 7047 BX LR ;; return
\ In section .text, align 4, keep-with-next
\ ??DataTable7:
\ 00000000 20000E42 DC32 0x420e0020
\ In section .text, align 4, keep-with-next
\ ??DataTable7_1:
\ 00000000 10000E42 DC32 0x420e0010
\ In section .text, align 4, keep-with-next
\ ??DataTable7_2:
\ 00000000 00700040 DC32 0x40007000
\ In section .text, align 4, keep-with-next
\ ??DataTable7_3:
\ 00000000 A0000E42 DC32 0x420e00a0
\ In section .text, align 4, keep-with-next
\ ??DataTable7_4:
\ 00000000 10ED00E0 DC32 0xe000ed10
\ In section .text, align 4, keep-with-next
\ ??DataTable7_5:
\ 00000000 04700040 DC32 0x40007004
293
294 /**
295 * @}
296 */
297
298 /**
299 * @}
300 */
301
302 /**
303 * @}
304 */
305
306 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
Maximum stack usage in bytes:
Function .cstack
-------- -------
PWR_BackupAccessCmd 0
PWR_ClearFlag 0
PWR_DeInit 8
PWR_EnterSTANDBYMode 8
PWR_EnterSTOPMode 16
PWR_GetFlagStatus 0
PWR_PVDCmd 0
PWR_PVDLevelConfig 0
PWR_WakeUpPinCmd 0
__WFE 0
__WFI 0
Section sizes:
Function/Label Bytes
-------------- -----
__WFI 4
__WFE 4
PWR_DeInit 24
PWR_BackupAccessCmd 8
PWR_PVDCmd 8
PWR_PVDLevelConfig 20
PWR_WakeUpPinCmd 8
PWR_EnterSTOPMode 66
PWR_EnterSTANDBYMode 44
PWR_GetFlagStatus 26
PWR_ClearFlag 14
??DataTable7 4
??DataTable7_1 4
??DataTable7_2 4
??DataTable7_3 4
??DataTable7_4 4
??DataTable7_5 4
250 bytes in section .text
250 bytes of CODE memory
Errors: none
Warnings: none
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