📄 stm32f10x_dac.lst
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###############################################################################
# #
# IAR ANSI C/C++ Compiler V6.10.2.52244/W32 for ARM 07/Aug/2011 12:10:34 #
# Copyright 1999-2010 IAR Systems AB. #
# #
# Cpu mode = thumb #
# Endian = little #
# Source file = F:\stm32\我的程序\Micrium\Software\EWARM\BSP\ST\STM32F10 #
# x_StdPeriph_Driver\src\stm32f10x_dac.c #
# Command line = F:\stm32\我的程序\Micrium\Software\EWARM\BSP\ST\STM32F10 #
# x_StdPeriph_Driver\src\stm32f10x_dac.c -D #
# USE_STDPERIPH_DRIVER -D STM32F10X_CL -lCN #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Flash\Lis #
# t\ -o F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Fla #
# sh\Obj\ --no_cse --no_unroll --no_inline #
# --no_code_motion --no_tbaa --no_clustering #
# --no_scheduling --debug --endian=little --cpu=Cortex-M3 #
# -e --fpu=None --dlib_config #
# D:\arm\INC\c\DLib_Config_Normal.h -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\APP\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\ #
# -I F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP #
# \ST\CMSIS\CM3\CoreSupport\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\ST #
# \CMSIS\CM3\DeviceSupport\ST\STM32F10x\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\ST #
# \STM32F10x_StdPeriph_Driver\inc\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\uC #
# OS-II\ -I F:\stm32\我的程序\Micrium\Software\EWARM\OS-II #
# \..\..\uCOS-II\Ports\ARM-Cortex-M3\Generic\IAR\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\..\uCO #
# S-II\Source\ -I F:\stm32\我的程序\Micrium\Software\EWARM #
# \OS-II\..\..\uC-LIB\ -I F:\stm32\我的程序\Micrium\Softwa #
# re\EWARM\OS-II\..\..\uC-LIB\Ports\ARM-Cortex-M3\IAR\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\..\uC- #
# CPU\ -I F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\. #
# .\..\uC-CPU\ARM-Cortex-M3\IAR\ -On --use_c++_inline #
# List file = F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Flash\Lis #
# t\stm32f10x_dac.lst #
# Object file = F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Flash\Obj #
# \stm32f10x_dac.o #
# #
# #
###############################################################################
F:\stm32\我的程序\Micrium\Software\EWARM\BSP\ST\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c
1 /**
2 ******************************************************************************
3 * @file stm32f10x_dac.c
4 * @author MCD Application Team
5 * @version V3.4.0
6 * @date 10/15/2010
7 * @brief This file provides all the DAC firmware functions.
8 ******************************************************************************
9 * @copy
10 *
11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 *
18 * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
19 */
20
21 /* Includes ------------------------------------------------------------------*/
22 #include "stm32f10x_dac.h"
23 #include "stm32f10x_rcc.h"
24
25 /** @addtogroup STM32F10x_StdPeriph_Driver
26 * @{
27 */
28
29 /** @defgroup DAC
30 * @brief DAC driver modules
31 * @{
32 */
33
34 /** @defgroup DAC_Private_TypesDefinitions
35 * @{
36 */
37
38 /**
39 * @}
40 */
41
42 /** @defgroup DAC_Private_Defines
43 * @{
44 */
45
46 /* CR register Mask */
47 #define CR_CLEAR_MASK ((uint32_t)0x00000FFE)
48
49 /* DAC Dual Channels SWTRIG masks */
50 #define DUAL_SWTRIG_SET ((uint32_t)0x00000003)
51 #define DUAL_SWTRIG_RESET ((uint32_t)0xFFFFFFFC)
52
53 /* DHR registers offsets */
54 #define DHR12R1_OFFSET ((uint32_t)0x00000008)
55 #define DHR12R2_OFFSET ((uint32_t)0x00000014)
56 #define DHR12RD_OFFSET ((uint32_t)0x00000020)
57
58 /* DOR register offset */
59 #define DOR_OFFSET ((uint32_t)0x0000002C)
60 /**
61 * @}
62 */
63
64 /** @defgroup DAC_Private_Macros
65 * @{
66 */
67
68 /**
69 * @}
70 */
71
72 /** @defgroup DAC_Private_Variables
73 * @{
74 */
75
76 /**
77 * @}
78 */
79
80 /** @defgroup DAC_Private_FunctionPrototypes
81 * @{
82 */
83
84 /**
85 * @}
86 */
87
88 /** @defgroup DAC_Private_Functions
89 * @{
90 */
91
92 /**
93 * @brief Deinitializes the DAC peripheral registers to their default reset values.
94 * @param None
95 * @retval None
96 */
\ In section .text, align 2, keep-with-next
97 void DAC_DeInit(void)
98 {
\ DAC_DeInit:
\ 00000000 80B5 PUSH {R7,LR}
99 /* Enable DAC reset state */
100 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, ENABLE);
\ 00000002 0121 MOVS R1,#+1
\ 00000004 5FF00050 MOVS R0,#+536870912
\ 00000008 ........ BL RCC_APB1PeriphResetCmd
101 /* Release DAC from reset state */
102 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, DISABLE);
\ 0000000C 0021 MOVS R1,#+0
\ 0000000E 5FF00050 MOVS R0,#+536870912
\ 00000012 ........ BL RCC_APB1PeriphResetCmd
103 }
\ 00000016 01BD POP {R0,PC} ;; return
104
105 /**
106 * @brief Initializes the DAC peripheral according to the specified
107 * parameters in the DAC_InitStruct.
108 * @param DAC_Channel: the selected DAC channel.
109 * This parameter can be one of the following values:
110 * @arg DAC_Channel_1: DAC Channel1 selected
111 * @arg DAC_Channel_2: DAC Channel2 selected
112 * @param DAC_InitStruct: pointer to a DAC_InitTypeDef structure that
113 * contains the configuration information for the specified DAC channel.
114 * @retval None
115 */
\ In section .text, align 2, keep-with-next
116 void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct)
117 {
\ DAC_Init:
\ 00000000 30B4 PUSH {R4,R5}
118 uint32_t tmpreg1 = 0, tmpreg2 = 0;
\ 00000002 0023 MOVS R3,#+0
\ 00000004 0022 MOVS R2,#+0
119 /* Check the DAC parameters */
120 assert_param(IS_DAC_TRIGGER(DAC_InitStruct->DAC_Trigger));
121 assert_param(IS_DAC_GENERATE_WAVE(DAC_InitStruct->DAC_WaveGeneration));
122 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude));
123 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(DAC_InitStruct->DAC_OutputBuffer));
124 /*---------------------------- DAC CR Configuration --------------------------*/
125 /* Get the DAC CR value */
126 tmpreg1 = DAC->CR;
\ 00000006 .... LDR.N R4,??DataTable9 ;; 0x40007400
\ 00000008 2468 LDR R4,[R4, #+0]
\ 0000000A 2300 MOVS R3,R4
127 /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
128 tmpreg1 &= ~(CR_CLEAR_MASK << DAC_Channel);
\ 0000000C 40F6FE74 MOVW R4,#+4094
\ 00000010 8440 LSLS R4,R4,R0
\ 00000012 A343 BICS R3,R3,R4
129 /* Configure for the selected DAC channel: buffer output, trigger, wave genration,
130 mask/amplitude for wave genration */
131 /* Set TSELx and TENx bits according to DAC_Trigger value */
132 /* Set WAVEx bits according to DAC_WaveGeneration value */
133 /* Set MAMPx bits according to DAC_LFSRUnmask_TriangleAmplitude value */
134 /* Set BOFFx bit according to DAC_OutputBuffer value */
135 tmpreg2 = (DAC_InitStruct->DAC_Trigger | DAC_InitStruct->DAC_WaveGeneration |
136 DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude | DAC_InitStruct->DAC_OutputBuffer);
\ 00000014 0C68 LDR R4,[R1, #+0]
\ 00000016 4D68 LDR R5,[R1, #+4]
\ 00000018 2C43 ORRS R4,R5,R4
\ 0000001A 8D68 LDR R5,[R1, #+8]
\ 0000001C 2C43 ORRS R4,R5,R4
\ 0000001E CD68 LDR R5,[R1, #+12]
\ 00000020 2C43 ORRS R4,R5,R4
\ 00000022 2200 MOVS R2,R4
137 /* Calculate CR register value depending on DAC_Channel */
138 tmpreg1 |= tmpreg2 << DAC_Channel;
\ 00000024 12FA00F4 LSLS R4,R2,R0
\ 00000028 2343 ORRS R3,R4,R3
139 /* Write to DAC CR */
140 DAC->CR = tmpreg1;
\ 0000002A .... LDR.N R4,??DataTable9 ;; 0x40007400
\ 0000002C 2360 STR R3,[R4, #+0]
141 }
\ 0000002E 30BC POP {R4,R5}
\ 00000030 7047 BX LR ;; return
142
143 /**
144 * @brief Fills each DAC_InitStruct member with its default value.
145 * @param DAC_InitStruct : pointer to a DAC_InitTypeDef structure which will
146 * be initialized.
147 * @retval None
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