📄 stm32f10x_fsmc.lst
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###############################################################################
# #
# IAR ANSI C/C++ Compiler V6.10.2.52244/W32 for ARM 07/Aug/2011 12:10:37 #
# Copyright 1999-2010 IAR Systems AB. #
# #
# Cpu mode = thumb #
# Endian = little #
# Source file = F:\stm32\我的程序\Micrium\Software\EWARM\BSP\ST\STM32F10 #
# x_StdPeriph_Driver\src\stm32f10x_fsmc.c #
# Command line = F:\stm32\我的程序\Micrium\Software\EWARM\BSP\ST\STM32F10 #
# x_StdPeriph_Driver\src\stm32f10x_fsmc.c -D #
# USE_STDPERIPH_DRIVER -D STM32F10X_CL -lCN #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Flash\Lis #
# t\ -o F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Fla #
# sh\Obj\ --no_cse --no_unroll --no_inline #
# --no_code_motion --no_tbaa --no_clustering #
# --no_scheduling --debug --endian=little --cpu=Cortex-M3 #
# -e --fpu=None --dlib_config #
# D:\arm\INC\c\DLib_Config_Normal.h -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\APP\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\ #
# -I F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP #
# \ST\CMSIS\CM3\CoreSupport\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\ST #
# \CMSIS\CM3\DeviceSupport\ST\STM32F10x\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\ST #
# \STM32F10x_StdPeriph_Driver\inc\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\uC #
# OS-II\ -I F:\stm32\我的程序\Micrium\Software\EWARM\OS-II #
# \..\..\uCOS-II\Ports\ARM-Cortex-M3\Generic\IAR\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\..\uCO #
# S-II\Source\ -I F:\stm32\我的程序\Micrium\Software\EWARM #
# \OS-II\..\..\uC-LIB\ -I F:\stm32\我的程序\Micrium\Softwa #
# re\EWARM\OS-II\..\..\uC-LIB\Ports\ARM-Cortex-M3\IAR\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\..\uC- #
# CPU\ -I F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\. #
# .\..\uC-CPU\ARM-Cortex-M3\IAR\ -On --use_c++_inline #
# List file = F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Flash\Lis #
# t\stm32f10x_fsmc.lst #
# Object file = F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Flash\Obj #
# \stm32f10x_fsmc.o #
# #
# #
###############################################################################
F:\stm32\我的程序\Micrium\Software\EWARM\BSP\ST\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c
1 /**
2 ******************************************************************************
3 * @file stm32f10x_fsmc.c
4 * @author MCD Application Team
5 * @version V3.4.0
6 * @date 10/15/2010
7 * @brief This file provides all the FSMC firmware functions.
8 ******************************************************************************
9 * @copy
10 *
11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 *
18 * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
19 */
20
21 /* Includes ------------------------------------------------------------------*/
22 #include "stm32f10x_fsmc.h"
23 #include "stm32f10x_rcc.h"
24
25 /** @addtogroup STM32F10x_StdPeriph_Driver
26 * @{
27 */
28
29 /** @defgroup FSMC
30 * @brief FSMC driver modules
31 * @{
32 */
33
34 /** @defgroup FSMC_Private_TypesDefinitions
35 * @{
36 */
37 /**
38 * @}
39 */
40
41 /** @defgroup FSMC_Private_Defines
42 * @{
43 */
44
45 /* --------------------- FSMC registers bit mask ---------------------------- */
46
47 /* FSMC BCRx Mask */
48 #define BCR_MBKEN_Set ((uint32_t)0x00000001)
49 #define BCR_MBKEN_Reset ((uint32_t)0x000FFFFE)
50 #define BCR_FACCEN_Set ((uint32_t)0x00000040)
51
52 /* FSMC PCRx Mask */
53 #define PCR_PBKEN_Set ((uint32_t)0x00000004)
54 #define PCR_PBKEN_Reset ((uint32_t)0x000FFFFB)
55 #define PCR_ECCEN_Set ((uint32_t)0x00000040)
56 #define PCR_ECCEN_Reset ((uint32_t)0x000FFFBF)
57 #define PCR_MemoryType_NAND ((uint32_t)0x00000008)
58 /**
59 * @}
60 */
61
62 /** @defgroup FSMC_Private_Macros
63 * @{
64 */
65
66 /**
67 * @}
68 */
69
70 /** @defgroup FSMC_Private_Variables
71 * @{
72 */
73
74 /**
75 * @}
76 */
77
78 /** @defgroup FSMC_Private_FunctionPrototypes
79 * @{
80 */
81
82 /**
83 * @}
84 */
85
86 /** @defgroup FSMC_Private_Functions
87 * @{
88 */
89
90 /**
91 * @brief Deinitializes the FSMC NOR/SRAM Banks registers to their default
92 * reset values.
93 * @param FSMC_Bank: specifies the FSMC Bank to be used
94 * This parameter can be one of the following values:
95 * @arg FSMC_Bank1_NORSRAM1: FSMC Bank1 NOR/SRAM1
96 * @arg FSMC_Bank1_NORSRAM2: FSMC Bank1 NOR/SRAM2
97 * @arg FSMC_Bank1_NORSRAM3: FSMC Bank1 NOR/SRAM3
98 * @arg FSMC_Bank1_NORSRAM4: FSMC Bank1 NOR/SRAM4
99 * @retval None
100 */
\ In section .text, align 2, keep-with-next
101 void FSMC_NORSRAMDeInit(uint32_t FSMC_Bank)
102 {
103 /* Check the parameter */
104 assert_param(IS_FSMC_NORSRAM_BANK(FSMC_Bank));
105
106 /* FSMC_Bank1_NORSRAM1 */
107 if(FSMC_Bank == FSMC_Bank1_NORSRAM1)
\ FSMC_NORSRAMDeInit:
\ 00000000 0028 CMP R0,#+0
\ 00000002 06D1 BNE.N ??FSMC_NORSRAMDeInit_0
108 {
109 FSMC_Bank1->BTCR[FSMC_Bank] = 0x000030DB;
\ 00000004 8100 LSLS R1,R0,#+2
\ 00000006 B1F1C041 SUBS R1,R1,#+1610612736
\ 0000000A 43F2DB02 MOVW R2,#+12507
\ 0000000E 0A60 STR R2,[R1, #+0]
\ 00000010 05E0 B.N ??FSMC_NORSRAMDeInit_1
110 }
111 /* FSMC_Bank1_NORSRAM2, FSMC_Bank1_NORSRAM3 or FSMC_Bank1_NORSRAM4 */
112 else
113 {
114 FSMC_Bank1->BTCR[FSMC_Bank] = 0x000030D2;
\ ??FSMC_NORSRAMDeInit_0:
\ 00000012 8100 LSLS R1,R0,#+2
\ 00000014 B1F1C041 SUBS R1,R1,#+1610612736
\ 00000018 43F2D202 MOVW R2,#+12498
\ 0000001C 0A60 STR R2,[R1, #+0]
115 }
116 FSMC_Bank1->BTCR[FSMC_Bank + 1] = 0x0FFFFFFF;
\ ??FSMC_NORSRAMDeInit_1:
\ 0000001E 8100 LSLS R1,R0,#+2
\ 00000020 B1F1C041 SUBS R1,R1,#+1610612736
\ 00000024 7FF07042 MVNS R2,#-268435456
\ 00000028 4A60 STR R2,[R1, #+4]
117 FSMC_Bank1E->BWTR[FSMC_Bank] = 0x0FFFFFFF;
\ 0000002A ........ LDR.W R1,??DataTable15 ;; 0xa0000104
\ 0000002E 7FF07042 MVNS R2,#-268435456
\ 00000032 41F82020 STR R2,[R1, R0, LSL #+2]
118 }
\ 00000036 7047 BX LR ;; return
119
120 /**
121 * @brief Deinitializes the FSMC NAND Banks registers to their default reset values.
122 * @param FSMC_Bank: specifies the FSMC Bank to be used
123 * This parameter can be one of the following values:
124 * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND
125 * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND
126 * @retval None
127 */
\ In section .text, align 2, keep-with-next
128 void FSMC_NANDDeInit(uint32_t FSMC_Bank)
129 {
130 /* Check the parameter */
131 assert_param(IS_FSMC_NAND_BANK(FSMC_Bank));
132
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