📄 stm32f10x_iwdg.lst
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###############################################################################
# #
# IAR ANSI C/C++ Compiler V6.10.2.52244/W32 for ARM 07/Aug/2011 12:10:38 #
# Copyright 1999-2010 IAR Systems AB. #
# #
# Cpu mode = thumb #
# Endian = little #
# Source file = F:\stm32\我的程序\Micrium\Software\EWARM\BSP\ST\STM32F10 #
# x_StdPeriph_Driver\src\stm32f10x_iwdg.c #
# Command line = F:\stm32\我的程序\Micrium\Software\EWARM\BSP\ST\STM32F10 #
# x_StdPeriph_Driver\src\stm32f10x_iwdg.c -D #
# USE_STDPERIPH_DRIVER -D STM32F10X_CL -lCN #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Flash\Lis #
# t\ -o F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Fla #
# sh\Obj\ --no_cse --no_unroll --no_inline #
# --no_code_motion --no_tbaa --no_clustering #
# --no_scheduling --debug --endian=little --cpu=Cortex-M3 #
# -e --fpu=None --dlib_config #
# D:\arm\INC\c\DLib_Config_Normal.h -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\APP\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\ #
# -I F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP #
# \ST\CMSIS\CM3\CoreSupport\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\ST #
# \CMSIS\CM3\DeviceSupport\ST\STM32F10x\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\ST #
# \STM32F10x_StdPeriph_Driver\inc\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\uC #
# OS-II\ -I F:\stm32\我的程序\Micrium\Software\EWARM\OS-II #
# \..\..\uCOS-II\Ports\ARM-Cortex-M3\Generic\IAR\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\..\uCO #
# S-II\Source\ -I F:\stm32\我的程序\Micrium\Software\EWARM #
# \OS-II\..\..\uC-LIB\ -I F:\stm32\我的程序\Micrium\Softwa #
# re\EWARM\OS-II\..\..\uC-LIB\Ports\ARM-Cortex-M3\IAR\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\..\uC- #
# CPU\ -I F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\. #
# .\..\uC-CPU\ARM-Cortex-M3\IAR\ -On --use_c++_inline #
# List file = F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Flash\Lis #
# t\stm32f10x_iwdg.lst #
# Object file = F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Flash\Obj #
# \stm32f10x_iwdg.o #
# #
# #
###############################################################################
F:\stm32\我的程序\Micrium\Software\EWARM\BSP\ST\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c
1 /**
2 ******************************************************************************
3 * @file stm32f10x_iwdg.c
4 * @author MCD Application Team
5 * @version V3.4.0
6 * @date 10/15/2010
7 * @brief This file provides all the IWDG firmware functions.
8 ******************************************************************************
9 * @copy
10 *
11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 *
18 * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
19 */
20
21 /* Includes ------------------------------------------------------------------*/
22 #include "stm32f10x_iwdg.h"
23
24 /** @addtogroup STM32F10x_StdPeriph_Driver
25 * @{
26 */
27
28 /** @defgroup IWDG
29 * @brief IWDG driver modules
30 * @{
31 */
32
33 /** @defgroup IWDG_Private_TypesDefinitions
34 * @{
35 */
36
37 /**
38 * @}
39 */
40
41 /** @defgroup IWDG_Private_Defines
42 * @{
43 */
44
45 /* ---------------------- IWDG registers bit mask ----------------------------*/
46
47 /* KR register bit mask */
48 #define KR_KEY_Reload ((uint16_t)0xAAAA)
49 #define KR_KEY_Enable ((uint16_t)0xCCCC)
50
51 /**
52 * @}
53 */
54
55 /** @defgroup IWDG_Private_Macros
56 * @{
57 */
58
59 /**
60 * @}
61 */
62
63 /** @defgroup IWDG_Private_Variables
64 * @{
65 */
66
67 /**
68 * @}
69 */
70
71 /** @defgroup IWDG_Private_FunctionPrototypes
72 * @{
73 */
74
75 /**
76 * @}
77 */
78
79 /** @defgroup IWDG_Private_Functions
80 * @{
81 */
82
83 /**
84 * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers.
85 * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
86 * This parameter can be one of the following values:
87 * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
88 * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
89 * @retval None
90 */
\ In section .text, align 2, keep-with-next
91 void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
92 {
93 /* Check the parameters */
94 assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
95 IWDG->KR = IWDG_WriteAccess;
\ IWDG_WriteAccessCmd:
\ 00000000 .... LDR.N R1,??DataTable5 ;; 0x40003000
\ 00000002 80B2 UXTH R0,R0 ;; ZeroExt R0,R0,#+16,#+16
\ 00000004 0860 STR R0,[R1, #+0]
96 }
\ 00000006 7047 BX LR ;; return
97
98 /**
99 * @brief Sets IWDG Prescaler value.
100 * @param IWDG_Prescaler: specifies the IWDG Prescaler value.
101 * This parameter can be one of the following values:
102 * @arg IWDG_Prescaler_4: IWDG prescaler set to 4
103 * @arg IWDG_Prescaler_8: IWDG prescaler set to 8
104 * @arg IWDG_Prescaler_16: IWDG prescaler set to 16
105 * @arg IWDG_Prescaler_32: IWDG prescaler set to 32
106 * @arg IWDG_Prescaler_64: IWDG prescaler set to 64
107 * @arg IWDG_Prescaler_128: IWDG prescaler set to 128
108 * @arg IWDG_Prescaler_256: IWDG prescaler set to 256
109 * @retval None
110 */
\ In section .text, align 2, keep-with-next
111 void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
112 {
113 /* Check the parameters */
114 assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
115 IWDG->PR = IWDG_Prescaler;
\ IWDG_SetPrescaler:
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