usb3wcmd.c

LV24000的单片机DEMO程序

	// Return the measuring time in us
	g_ReplyBuf[1] = dwTimeUs & 0xFF;	// Byte 0
	dwTimeUs >>=8;
	g_ReplyBuf[2] = dwTimeUs & 0xFF;	// Byte 1
	dwTimeUs >>=8;
	g_ReplyBuf[3] = dwTimeUs & 0xFF;	// Byte 2
	dwTimeUs >>=8;
	g_ReplyBuf[4] = dwTimeUs & 0xFF;	// Byte 3

	// return number of byte filled
	return(5);
} // End UsbExtPulse3W

BYTE UsbRepeatIo3W()
{
#ifdef _TOBEDONE_
#ifndef REMOVE_FOR_DEBUG
	// Repeat IO pattern on 3W-bus
	// 		Input : <cmd><on, off><wValue1L><wValue1H><wValue2L><wValue2H><IrqRateL><IrqRateH>
	// 		Output: no reply

#ifdef SHARE_TIMER0
	// Sharing timer 0 between repeat IO and measurement

	// Check if we have to disable the repeat IO
	// Stop timer 0
	TR0 = 0;		// Equivalent of TCON &= (~bmBIT4)
	if ( g_ReceiveBuf[1] == (BYTE)SET_REPEAT_IO_OFF )
	{
		IE &= ~bmBIT1;	// Disable timer 0 interrupt
	}
	else // Enable repeat IO pattern
	{
		// Copy the 2 IO patterns to global
		g_byRepIoVal1[0] = g_ReceiveBuf[2]; // Low byte
		g_byRepIoVal1[1] = g_ReceiveBuf[3]; // High byte

		g_byRepIoVal2[0] = g_ReceiveBuf[4]; // Low byte
		g_byRepIoVal2[1] = g_ReceiveBuf[5]; // High byte

		// Copy interrupt rate to global
		g_byRepIoIntVal[0] = g_ReceiveBuf[6]; // Low byte
		g_byRepIoIntVal[1] = g_ReceiveBuf[7]; // High byte

		// Program timer0 interrupt and enable it
		g_byFlag |= TR0_REPEAT_IO;		// Indicate timer 0 is used for repeat IO
		TL0 = g_ReceiveBuf[6];
		TH0 = g_ReceiveBuf[7];			// Load interrupt rate
		CKCON |= bmBIT3; 				// Bit 4=0: CLKCOUT/12, 1: CLKOUT/4
		
		// Enable interrupt
		IE |= bmBIT1;	// Timer 0 interrupt

		// Start the timer
		TR0 = 1;		// Equivalent of TCON |= (bmBIT4)
	}
#else // #ifdef SHARE_TIMER0
	// Use timer 2 with auto reload

	// Stop timer 2 - clear interrupt flag
	T2CON = 0;

	// Check if we have to disable the repeat IO
	if ( g_ReceiveBuf[1] == (BYTE)SET_REPEAT_IO_OFF )
	{
		IE &= ~bmBIT5;	// Disable timer 2 interrupt
	}
	else // Enable repeat IO pattern
	{
		// Copy the 2 IO patterns to global
		g_byRepIoVal1[0] = g_ReceiveBuf[2]; // Low byte
		g_byRepIoVal1[1] = g_ReceiveBuf[3]; // High byte

		g_byRepIoVal2[0] = g_ReceiveBuf[4]; // Low byte
		g_byRepIoVal2[1] = g_ReceiveBuf[5]; // High byte

		// Program the interrupt rate into reload registers
		RCAP2L = g_ReceiveBuf[6]; // Low byte
		RCAP2H = g_ReceiveBuf[7]; // High byte

		// Program timer2 interrupt and enable it
		TL2 = g_ReceiveBuf[6];
		TH2 = g_ReceiveBuf[7];			// Load interrupt rate
		CKCON |= bmBIT5; 				// CKCON.5: Timer 2 clock - 1:CLKCOUT/4, 0: CLKOUT/12
		
		// Enable interrupt
		IE |= bmBIT5;	// Timer 2 interrupt

		// Start the timer
		T2CON = 4;	// Start Timer 2 in auto reload mode
	}
#endif //SHARE_TIMER0
#endif //REMOVE_FOR_DEBUG
#endif //_TOBEDONE_

	// return number of byte filled
	return(0);
} // End UsbRepeatIo3W

BYTE UsbRw3WireLines()
{
	// Read/Write 3W lines
	//	Input buffer <cmd> <SetL> <SetH>
    	//   	Output       <cmd> <datL> <datH>

	// Set the 3 lines according to input
	if (g_ReceiveBuf[1] & RIL_CLK_CHG) // CLK-line change request
	{
		// Drive the CLK-line to the requested level
		if (g_ReceiveBuf[1] & RIL_CLK_LEVEL)
			I3W_PORT |= I3W_CLK_PIN_BM; 	// Clock high
		else
			I3W_PORT &= (BYTE)~I3W_CLK_PIN_BM; 	// Clock low
	}

	if (g_ReceiveBuf[1] & RIL_NRW_CHG) // nRW-line change request
	{
		// Drive the nRW-line to the requested level
		if (g_ReceiveBuf[1] & RIL_NRW_LEVEL)
		{
			I3W_PORT |= I3W_NRW_PIN_BM;		// nRW high -> Write mode
			I3W_DIRPORT |= I3W_DATA_PIN_BM;		// Program DATA PIN to output
		}
		else
		{
			I3W_DIRPORT &= (BYTE)~I3W_DATA_PIN_BM;	// Program DATA PIN to input mode
			I3W_PORT &= (BYTE)~I3W_NRW_PIN_BM; 	// nRW low -> Read mode 
		}
	}

	if (g_ReceiveBuf[1] & RIL_DAT_CHG) // DATA-line change request
	{
		// Drive the DATA-line to the requested level
		if (g_ReceiveBuf[1] & RIL_DAT_LEVEL)
		    I3W_PORT |= I3W_DATA_PIN_BM;		// Drive data pin high
		else 
		    I3W_PORT &= (BYTE)~I3W_DATA_PIN_BM;	// Drive data pin low
	}

	// Now reading the lines 
	//g_ReplyBuf[1] = 0;
	g_ReplyBuf[2] = 0;		// Clear all bits
	if (I3W_PORT & I3W_CLK_PIN_BM) 		// CLK-line state
		g_ReplyBuf[1] = I3W_CLOCK_STATE;
	else
		g_ReplyBuf[1] = 0;
	if (I3W_PORT & I3W_NRW_PIN_BM) 		// nRW-line state
		g_ReplyBuf[1] |= I3W_NRW_STATE;
	if (I3W_PORT & I3W_DATA_PIN_BM) 	// DATA-line state
		g_ReplyBuf[1] |= I3W_DATA_STATE;
	// return number of byte filled
	return(3);

} // End UsbRw3WireLines

// ----------- Extra IO routines to support 3-wire DGT3/DGT4 ----------------
void UsbWrite3wV3V4(BYTE byLow, BYTE byHigh)
{
	if (g_by3wIntf == DGT_INTF_V3)
		IoWrite3W_V3(byLow, byHigh);	// DGT3
	else
		IoWrite3W(byLow, byHigh);	// DGT4
} // UsbWrite3wV3V4

BYTE UsbRead3wV3V4(BYTE byReg)
{
	if (g_by3wIntf == DGT_INTF_V3)
		return(IoRead3W_V3(byReg));	// DGT3
	else
		return(IoRead3W(byReg));	// DGT4
} // UsbRead3wV3V4

// IoWrite3W_V3/IoRead3W_V3 are meant for USB-host (support old chip version)
void IoWrite3W_V3(BYTE byLow, BYTE byHigh)
{
	// Write 16 bit data to 3W-device with DGT3 protocol (CLOCK default low)
	// Input: low byte, high byte.
	// The LSB of the low byte will be written first

	// Prepare the 3-wire bus for writing
	_putbit(1, I3W_PORT, I3W_NRW_PIN); 		// nRW line high for writing
	_putbit(1, I3W_DIRPORT, I3W_DATA_PIN); 		// Program DATA PIN to output

	// Perfrom the 3W-write
	IoWriteByte3W(byLow);	// Write low byte
	IoWriteByte3W(byHigh);	// Write high byte

	// Clock state: Clock low by exit for V3, leave it high for V4
	_putbit(0, I3W_PORT, I3W_CLK_PIN);

	// Let the device latch data
	_putbit(0, I3W_DIRPORT, I3W_DATA_PIN); 	// Change DATA PIN to input mode
	_putbit(0, I3W_PORT, I3W_NRW_PIN); 	// nRW line low for latching data
} // End IoWrite3W_V3

BYTE IoRead3W_V3(BYTE byReg)
{
	// Specific read routine for digital interface V3 (7 clock read cycle) - ONLY FOR ES2 - WILL BE REMOVED 
	// Input: byReg: register offset, caller should select the correct block before invoke this function
	// Output: the read byte
	BYTE byBitCnt;
	register BYTE byData;

 	_putbit(1, I3W_PORT, I3W_NRW_PIN); 	// nRW line high for writing
	_putbit(1, I3W_DIRPORT, I3W_DATA_PIN); 	// Program DATA PIN to output

	// Write the register offset
	IoWriteByte3W(byReg);

	_putbit(0, I3W_PORT, I3W_CLK_PIN);	// Clock low by exit for V3
	_putbit(0, I3W_DIRPORT, I3W_DATA_PIN); 	// Change DATA PIN to input mode
	_putbit(0, I3W_PORT, I3W_NRW_PIN); 	// nRW line low for latching data
	
	// Read the 8 bits data
#ifdef	CF12MHZ
	_nop();
#endif // CF12MHZ
	// Read the first LSB data bit from the chip (without clock)
	if ( _getbit(I3W_PORT, I3W_DATA_PIN ) )
	    byData = 0x80;	// Data pin is high
	else
	    byData = 0;

	// Read the remaining 7 bit data from the chip: LSB is read first
	for (byBitCnt=0; byBitCnt<7; byBitCnt++)
	{
		// Clock high
		_putbit(1, I3W_PORT, I3W_CLK_PIN);	

		// Make room for next bit - also clock delay
		byData >>=1;			
		
		// Clock low - place here for compatibility with parallel port driver 
		// (clock low trigger V4 chip - during detection, V4 chip is read with V3-protocol)
		_putbit(0, I3W_PORT, I3W_CLK_PIN);
#ifdef	CF12MHZ
	_nop();
#endif // CF12MHZ

		// Fetch data bit
		if ( _getbit(I3W_PORT, I3W_DATA_PIN ) )
			byData |= 0x80;
		//_putbit(0, I3W_PORT, I3W_CLK_PIN);	// Clock low
	}

	// Return the read data
	return(byData);
} // End IoRead3W_V3
// ----------- End Extra IO routines to support 3-wire DGT3/DGT4 ----------------

// ==================================================================
#endif //USE_USB - The whole file can be discarded if USB is not used
// ==================================================================