x86emit.h

一个任天堂掌上游戏机NDS的源代码

	else      { emit8(0xD1); mrm_reg_mem((X86Reg)op, base);             }
    }

    sivoid shft_memd_imm(int op, u32 disp, u8 imm)
    {
        if(imm>1) { emit8(0xC1); mrm_reg_mem((X86Reg)op, disp); emit8(imm); }
	else      { emit8(0xD1); mrm_reg_mem((X86Reg)op, disp);             }
    }
    
    sivoid shft_memd_imm(int op, X86Reg base, u8 disp, u8 imm)
    {
	if(imm>1) { emit8(0xC1); mrm_reg_mem((X86Reg)op, base, disp); emit8(imm); }
	else      { emit8(0xD1); mrm_reg_mem((X86Reg)op, base, disp);             }
    }
    
    sivoid shft_memd_imm(int op, X86Reg base, u32 disp, u8 imm)
    {
	if(imm>1) { emit8(0xC1); mrm_reg_mem((X86Reg)op, base, disp); emit8(imm); }
	else      { emit8(0xD1); mrm_reg_mem((X86Reg)op, base, disp);             }
    }

    sivoid shft_memd_imm(int op, X86Reg base, X86Reg idx, int scale, u8 imm)
    {
        if(imm>1) { emit8(0xC1); mrm_reg_mem((X86Reg)op, base, idx, scale); emit8(imm); }
	else      { emit8(0xD1); mrm_reg_mem((X86Reg)op, base, idx, scale);             }
    }
   
    sivoid shft_memd_imm(int op, X86Reg base, X86Reg idx, int scale, u8 disp, u8 imm)
    {
        if(imm>1) { emit8(0xC1); mrm_reg_mem((X86Reg)op, base, idx, scale, disp); emit8(imm); }
	else      { emit8(0xD1); mrm_reg_mem((X86Reg)op, base, idx, scale, disp);             }
    }
    
    sivoid shft_memd_imm(int op, X86Reg base, X86Reg idx, int scale, u32 disp, u8 imm)
    {
        if(imm>1) { emit8(0xC1); mrm_reg_mem((X86Reg)op, base, idx, scale, disp); emit8(imm); }
	else      { emit8(0xD1); mrm_reg_mem((X86Reg)op, base, idx, scale, disp);             }
    }
    
    sivoid shft_reg_reg(int op, X86Reg r)
    {
	SIZECHECK(0xD2); emit8(ModRM(3, op&7, r)); 
    }
    
    sivoid shft_memb_reg(int op, X86Reg base)
    {
	emit8(0xD2); mrm_reg_mem((X86Reg)op, base); 
    }

    sivoid shft_memb_reg(int op, u32 disp)
    {
	emit8(0xD2); mrm_reg_mem((X86Reg)op, disp); 
    }
    
    sivoid shft_memb_reg(int op, X86Reg base, u8 disp)
    {
	emit8(0xD2); mrm_reg_mem((X86Reg)op, base, disp); 
    }
    
    sivoid shft_memb_reg(int op, X86Reg base, u32 disp)
    {
	emit8(0xD2); mrm_reg_mem((X86Reg)op, base, disp); 
    }

    sivoid shft_memb_reg(int op, X86Reg base, X86Reg idx, int scale)
    {
	emit8(0xD2); mrm_reg_mem((X86Reg)op, base, idx, scale); 
    }
   
    sivoid shft_memb_reg(int op, X86Reg base, X86Reg idx, int scale, u8 disp)
    {
	emit8(0xD2); mrm_reg_mem((X86Reg)op, base, idx, scale, disp); 
    }
    
    sivoid shft_memb_reg(int op, X86Reg base, X86Reg idx, int scale, u32 disp)
    {
	emit8(0xD2); mrm_reg_mem((X86Reg)op, base, idx, scale, disp); 
    }
    
    sivoid shft_memd_reg(int op, X86Reg base)
    {
	emit8(0xD3); mrm_reg_mem((X86Reg)op, base); 
    }

    sivoid shft_memd_reg(int op, u32 disp)
    {
	emit8(0xD3); mrm_reg_mem((X86Reg)op, disp); 
    }
    
    sivoid shft_memd_reg(int op, X86Reg base, u8 disp)
    {
	emit8(0xD3); mrm_reg_mem((X86Reg)op, base, disp); 
    }
    
    sivoid shft_memd_reg(int op, X86Reg base, u32 disp)
    {
	emit8(0xD3); mrm_reg_mem((X86Reg)op, base, disp); 
    }

    sivoid shft_memd_reg(int op, X86Reg base, X86Reg idx, int scale)
    {
	emit8(0xD3); mrm_reg_mem((X86Reg)op, base, idx, scale); 
    }
   
    sivoid shft_memd_reg(int op, X86Reg base, X86Reg idx, int scale, u8 disp)
    {
	emit8(0xD3); mrm_reg_mem((X86Reg)op, base, idx, scale, disp); 
    }
    
    sivoid shft_memd_reg(int op, X86Reg base, X86Reg idx, int scale, u32 disp)
    {
	emit8(0xD3); mrm_reg_mem((X86Reg)op, base, idx, scale, disp); 
    }
    
    //---Special cases yet to be filtered
    
    sivoid CALL(u32 off) { emit8(0xE8); emit32(off); }
    sivoid CALLF(u16 seg, u32 off)
    {
        emit8(0x9A);
        emit16(seg); emit32(off);
    }
    
    sivoid DEC(X86Reg reg) { emit8(0x48 | (reg&7)); }
    
    sivoid IN_imm(u8 port)  { emit8(0xE4); emit8(port);  }
    sivoid IN_imm(u32 port) { emit8(0xE5); emit32(port); }
    
    sivoid INC(X86Reg reg) { emit8(0x40 | (reg&7)); }
    
    sivoid INT(u8 val) { emit8(0xCD); emit8(val); }
    
    sivoid Jcc(u8 cond, u8 off)
    {
        emit8(0x70 | (cond&15));
        emit8(off);
    }
    
    sivoid JCXZ(u8 off) { emit8(0xE3); emit8(off); }
    
    sivoid JMP(u16 seg, u32 off)
    {
        emit8(0xEA);
        emit32(off); emit16(seg);
    }
    
    sivoid JMP(u8 off)  { emit8(0xEB); emit8(off);  }
    sivoid JMP(u32 off) { emit8(0xE9); emit32(off); }
    
    sivoid LOOP(u8 off)   { emit8(0xE2); emit8(off); }
    sivoid LOOPNZ(u8 off) { emit8(0xE0); emit8(off); }
    sivoid LOOPZ(u8 off)  { emit8(0xE1); emit8(off); }
    
    sivoid MOV_reg_imm(X86Reg reg, u32 val)
    {
        switch(reg)
        {
            case al: case cl: case dl: case bl:
            case ah: case ch: case dh: case bh:
                emit8(0xB0 | (reg&7));
                emit8(val);
    	    break;
    	    
            case eax: case ecx: case edx: case ebx:
            case esp: case ebp: case esi: case edi:
                emit8(0xB8 | (reg&7));
                emit32(val);
    	    break;
        }
    }
    
    sivoid MOV_reg_seg(X86Reg r, X86Reg s)
    {
	emit8(0x8C); mrm_reg_reg(s, r);
    }
    
    sivoid MOV_seg_reg(X86Reg r, X86Reg s)
    {
	emit8(0x8E); mrm_reg_reg(s, r);
    }
    
    sivoid MOV_mem_seg(X86Reg base, X86Reg r)
    {
        emit8(0x8C); mrm_reg_mem(r, base);
    }
    
    sivoid MOV_mem_seg(u32 disp, X86Reg r)
    {
        emit8(0x8C); mrm_reg_mem(r, disp);
    }
    
    sivoid MOV_mem_seg(X86Reg base, u8 disp, X86Reg r)
    {
        emit8(0x8C); mrm_reg_mem(r, base, disp);
    }
    
    sivoid MOV_mem_seg(X86Reg base, u32 disp, X86Reg r)
    {
        emit8(0x8C); mrm_reg_mem(r, base, disp);
    }
    
    sivoid MOV_mem_seg(X86Reg base, X86Reg idx, int scale, X86Reg r)
    {
        emit8(0x8C); mrm_reg_mem(r, base, idx, scale);
    }
    
    sivoid MOV_mem_seg(X86Reg base, X86Reg idx, int scale, u8 disp, X86Reg r)
    {
        emit8(0x8C); mrm_reg_mem(r, base, idx, scale, disp);
    }
    
    sivoid MOV_mem_seg(X86Reg base, X86Reg idx, int scale, u32 disp, X86Reg r)
    {
        emit8(0x8C); mrm_reg_mem(r, base, idx, scale, disp);
    }
    
    sivoid MOV_seg_mem(X86Reg r, X86Reg base)
    {
        emit8(0x8E); mrm_reg_mem(r, base);
    }
    
    sivoid MOV_seg_mem(X86Reg r, u32 disp)
    {
        emit8(0x8E); mrm_reg_mem(r, disp);
    }
    
    sivoid MOV_seg_mem(X86Reg r, X86Reg base, u8 disp)
    {
        emit8(0x8E); mrm_reg_mem(r, base, disp);
    }
    
    sivoid MOV_seg_mem(X86Reg r, X86Reg base, u32 disp)
    {
        emit8(0x8E); mrm_reg_mem(r, base, disp);
    }
    
    sivoid MOV_seg_mem(X86Reg r, X86Reg base, X86Reg idx, int scale)
    {
        emit8(0x8E); mrm_reg_mem(r, base, idx, scale);
    }
    
    sivoid MOV_seg_mem(X86Reg r, X86Reg base, X86Reg idx, int scale, u8 disp)
    {
        emit8(0x8E); mrm_reg_mem(r, base, idx, scale, disp);
    }
    
    sivoid MOV_seg_mem(X86Reg r, X86Reg base, X86Reg idx, int scale, u32 disp)
    {
        emit8(0x8E); mrm_reg_mem(r, base, idx, scale, disp);
    }
    
    sivoid MOV_reg_reg(X86Reg r, X86Reg s)
    {
	SIZECHECK(0x88); mrm_reg_reg(r, s);
    }
    
    sivoid MOV_mem_reg(X86Reg base, X86Reg r)
    {
        SIZECHECK(0x88); mrm_reg_mem(r, base);
    }
    
    sivoid MOV_mem_reg(u32 disp, X86Reg r)
    {
	if((r&7)==0) { SIZECHECK(0xA2); emit32(disp); }
	else         { SIZECHECK(0x88); mrm_reg_mem(r, disp); }
    }
    
    sivoid MOV_mem_reg(X86Reg base, u8 disp, X86Reg r)
    {
        SIZECHECK(0x88); mrm_reg_mem(r, base, disp);
    }
    
    sivoid MOV_mem_reg(X86Reg base, u32 disp, X86Reg r)
    {
        SIZECHECK(0x88); mrm_reg_mem(r, base, disp);
    }
    
    sivoid MOV_mem_reg(X86Reg base, X86Reg idx, int scale, X86Reg r)
    {
        SIZECHECK(0x88); mrm_reg_mem(r, base, idx, scale);
    }
    
    sivoid MOV_mem_reg(X86Reg base, X86Reg idx, int scale, u8 disp, X86Reg r)
    {
        SIZECHECK(0x88); mrm_reg_mem(r, base, idx, scale, disp);
    }
    
    sivoid MOV_mem_reg(X86Reg base, X86Reg idx, int scale, u32 disp, X86Reg r)
    {
        SIZECHECK(0x88); mrm_reg_mem(r, base, idx, scale, disp);
    }
    
    sivoid MOV_reg_mem(X86Reg r, X86Reg base)
    {
        SIZECHECK(0x8A); mrm_reg_mem(r, base);
    }
    
    sivoid MOV_reg_mem(X86Reg r, u32 disp)
    {
	if((r&7)==0) { SIZECHECK(0xA0); emit32(disp); }
	else         { SIZECHECK(0x8A); mrm_reg_mem(r, disp); }
    }
    
    sivoid MOV_reg_mem(X86Reg r, X86Reg base, u8 disp)
    {
        SIZECHECK(0x8A); mrm_reg_mem(r, base, disp);
    }
    
    sivoid MOV_reg_mem(X86Reg r, X86Reg base, u32 disp)
    {
        SIZECHECK(0x8A); mrm_reg_mem(r, base, disp);
    }
    
    sivoid MOV_reg_mem(X86Reg r, X86Reg base, X86Reg idx, int scale)
    {
        SIZECHECK(0x8A); mrm_reg_mem(r, base, idx, scale);
    }
    
    sivoid MOV_reg_mem(X86Reg r, X86Reg base, X86Reg idx, int scale, u8 disp)
    {
        SIZECHECK(0x8A); mrm_reg_mem(r, base, idx, scale, disp);
    }
    
    sivoid MOV_reg_mem(X86Reg r, X86Reg base, X86Reg idx, int scale, u32 disp)
    {
        SIZECHECK(0x8A); mrm_reg_mem(r, base, idx, scale, disp);
    }
    
    sivoid MOV_mem_imm(X86Reg base, u8 imm)
    {
	emit8(0xC6); mrm_reg_mem((X86Reg)0, base); emit8(imm);
    }

    sivoid MOV_mem_imm(X86Reg base, u32 imm)
    {
	emit8(0xC7); mrm_reg_mem((X86Reg)0, base); emit32(imm);
    }
    
    sivoid MOV_mem_imm(u32 disp, u8 imm)
    {
        emit8(0xC6); mrm_reg_mem((X86Reg)0, disp); emit8(imm);
    }
    
    sivoid MOV_mem_imm(u32 disp, u32 imm)
    {
        emit8(0xC7); mrm_reg_mem((X86Reg)0, disp); emit32(imm);
    }
    
    sivoid MOV_mem_imm(X86Reg base, u8 disp, u8 imm)
    {
	emit8(0xC6); mrm_reg_mem((X86Reg)0, base, disp); emit8(imm);
    }
    
    sivoid MOV_mem_imm(X86Reg base, u32 disp, u8 imm)
    {
	emit8(0xC6); mrm_reg_mem((X86Reg)0, base, disp); emit8(imm);
    }

    sivoid MOV_mem_imm(X86Reg base, u8 disp, u32 imm)
    {
	emit8(0xC7); mrm_reg_mem((X86Reg)0, base, disp); emit32(imm);
    }

    sivoid MOV_mem_imm(X86Reg base, u32 disp, u32 imm)
    {
	emit8(0xC7); mrm_reg_mem((X86Reg)0, base, disp); emit32(imm);
    }
    
    sivoid MOV_mem_imm(X86Reg base, X86Reg idx, int scale, u8 imm)
    {
        emit8(0xC6); mrm_reg_mem((X86Reg)0, base, idx, scale); emit8(imm);
    }
   
    sivoid MOV_mem_imm(X86Reg base, X86Reg idx, int scale, u32 imm)
    {
        emit8(0xC7); mrm_reg_mem((X86Reg)0, base, idx, scale); emit32(imm);
    }
   
    sivoid MOV_mem_imm(X86Reg base, X86Reg idx, int scale, u8 disp, u8 imm)
    {
        emit8(0xC6); mrm_reg_mem((X86Reg)0, base, idx, scale, disp); emit8(imm);
    }
    
    sivoid MOV_mem_imm(X86Reg base, X86Reg idx, int scale, u8 disp, u32 imm)
    {
        emit8(0xC7); mrm_reg_mem((X86Reg)0, base, idx, scale, disp); emit32(imm);
    }
    
    sivoid MOV_mem_imm(X86Reg base, X86Reg idx, int scale, u32 disp, u8 imm)
    {
        emit8(0xC6); mrm_reg_mem((X86Reg)0, base, idx, scale, disp); emit8(imm);
    }
    
    sivoid MOV_mem_imm(X86Reg base, X86Reg idx, int scale, u32 disp, u32 imm)
    {
        emit8(0xC7); mrm_reg_mem((X86Reg)0, base, idx, scale, disp); emit32(imm);
    }
    
    sivoid OUT_imm(u8 port)  { emit8(0xE6); emit8(port);  }
    sivoid OUT_imm(u32 port) { emit8(0xE7); emit32(port); }
    
    sivoid POP(X86Reg reg)
    {
        switch(reg)
        {
            case es: emit8(0x07); break;
            case ss: emit8(0x17); break;
            case ds: emit8(0x1F); break;
    		 
            case fs: emit8(0x0F); emit8(0xA1); break;
            case gs: emit8(0x0F); emit8(0xA9); break;
    		 
            case eax: case ecx: case edx: case ebx:
            case esp: case ebp: case esi: case edi:
                emit8(0x58 | (reg&7));
    	    break;
        }
    }
    
    sivoid PUSH(X86Reg reg)
    {
        switch(reg)
        {
            case es: emit8(0x06); break;
            case cs: emit8(0x0E); break;
            case ss: emit8(0x16); break;
            case ds: emit8(0x1E); break;
    
            case fs: emit8(0x0F); emit8(0xA0); break;
            case gs: emit8(0x0F); emit8(0xA8); break;
    		 
            case eax: case ecx: case edx: case ebx:
            case esp: case ebp: case esi: case edi:
                emit8(0x50 | (reg&7));
    	    break;
        }
    }
    
    sivoid PUSH_imm(u8 val)  { emit8(0x6A); emit8(val);  }
    sivoid PUSH_imm(u32 val) { emit8(0x68); emit32(val); }
    
    sivoid RET(u16 val) { emit8(0xC2); emit16(val); }
    
    sivoid RETF(u16 val) { emit8(0xCA); emit16(val); }
    
    sivoid TEST_imm(u8 val)  { emit8(0xA8); emit8(val);  }
    sivoid TEST_imm(u32 val) { emit8(0xA9); emit32(val); }
    
    sivoid XCHG(X86Reg reg) { emit8(0x90 | (reg&7)); }
};

u32 x86::offset;
CODEBLOCK *x86::block;

#endif//__X86_H_