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      <td bgColor="#e6f4ff"><img src="mood24.gif" align="absMiddle" width="20" height="20"> computer00 
        发表于 2005-3-28 20:03 <font color="#336699"><strong>DVB与视音频</strong></font> 
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              <td style="FONT-SIZE: 12px; LINE-HEIGHT: 18px">/*H**************************************************************************<br>
                * NAME:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;regsnd1.h&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;<br>
                *----------------------------------------------------------------------------<br>
                * Copyright (c) 2003 Atmel.<br>
                *----------------------------------------------------------------------------<br>
                * RELEASE:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;snd1c-refd-nf-4_0_3&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;<br>
                * REVISION:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;1.6&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;<br>
                *----------------------------------------------------------------------------<br>
                * PURPOSE:<br>
                * This file defines the T8xC51SND1 component:<br>
                *&nbsp;&nbsp;&nbsp;- Register SFRs<br>
                *&nbsp;&nbsp;&nbsp;- Bit SFRs<br>
                *****************************************************************************/<br>
                <br>
                <br>
                /////////////////////////////////////////////////////////////////////////////<br>
                //&nbsp;&nbsp;&nbsp;&nbsp;Edited by Computer-lov&nbsp;&nbsp;2005.3.19<br>
                //&nbsp;&nbsp;&nbsp;&nbsp;AT89C51SND1C.H FILE<br>
                ////////////////////////////////////////////////////////////////////////////<br>
                <br>
                <br>
                #ifndef __AT89C51SND1C_H__<br>
                #define __AT89C51SND1C_H__<br>
                <br>
                #define Sfr(name,address) sfr name = address<br>
                #define Sfr16(name,address) sfr16 name = address<br>
                #define Sbit(name,reg,bit_address) sbit name = reg ^ bit_address<br>
                <br>
                /*_____ I N C L U D E S 
                ____________________________________________________*/<br>
                <br>
                <br>
                /*_____ M A C R O S 
                ________________________________________________________*/<br>
                <br>
                <br>
                /* C51 CORE */<br>
                <br>
                Sfr (A&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, 0xE0);<br>
                Sfr (ACC&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, 0xE0);<br>
                Sfr (B&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, 0xF0);<br>
                Sfr (PSW&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, 0xD0);<br>
                Sfr (SP&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, 0x81);<br>
                Sfr (DPL&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, 0x82);<br>
                Sfr (DPH&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, 0x83);<br>
                Sfr16 (DPTR&nbsp;&nbsp;, 0x82);<br>
                <br>
                Sbit (CY&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, PSW&nbsp;&nbsp;&nbsp;, 
                7);<br>
                Sbit (AC&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, PSW&nbsp;&nbsp;&nbsp;, 
                6);<br>
                Sbit (F0&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, PSW&nbsp;&nbsp;&nbsp;, 
                5);<br>
                Sbit (RS1&nbsp;&nbsp;&nbsp;&nbsp;, PSW&nbsp;&nbsp;&nbsp;, 4);<br>
                Sbit (RS0&nbsp;&nbsp;&nbsp;&nbsp;, PSW&nbsp;&nbsp;&nbsp;, 3);<br>
                Sbit (OV&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, PSW&nbsp;&nbsp;&nbsp;, 
                2);<br>
                Sbit (F1&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, PSW&nbsp;&nbsp;&nbsp;, 
                1);<br>
                Sbit (P&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, PSW&nbsp;&nbsp;&nbsp;, 
                0);<br>
                <br>
                <br>
                /* SYSTEM MANAGEMENT */<br>
                <br>
                Sfr (PCON&nbsp;&nbsp;&nbsp;&nbsp;, 0x87);<br>
                Sfr (AUXR&nbsp;&nbsp;&nbsp;&nbsp;, 0x8E);<br>
                Sfr (AUXR1&nbsp;&nbsp;&nbsp;, 0xA2);<br>
                Sfr (NVERS&nbsp;&nbsp;&nbsp;, 0xFB);<br>
                <br>
                <br>
                /* PLL &amp; CLOCK */<br>
                <br>
                Sfr (CKCON&nbsp;&nbsp;&nbsp;, 0x8F);<br>
                Sfr (PLLCON&nbsp;&nbsp;, 0xE9);<br>
                Sfr (PLLDIV0 , 0xEE);<br>
                Sfr (PLLNDIV , 0xEE);<br>
                Sfr (PLLDIV1 , 0xEF);<br>
                Sfr (PLLRDIV , 0xEF);<br>
                <br>
                <br>
                /* INTERRUPT */<br>
                <br>
                Sfr (IEN0&nbsp;&nbsp;&nbsp;&nbsp;, 0xA8);<br>
                Sfr (IPL0&nbsp;&nbsp;&nbsp;&nbsp;, 0xB8);<br>
                Sfr (IPH0&nbsp;&nbsp;&nbsp;&nbsp;, 0xB7);<br>
                Sfr (IEN1&nbsp;&nbsp;&nbsp;&nbsp;, 0xB1);<br>
                Sfr (IPL1&nbsp;&nbsp;&nbsp;&nbsp;, 0xB2);<br>
                Sfr (IPH1&nbsp;&nbsp;&nbsp;&nbsp;, 0xB3);<br>
                <br>
                Sbit (EA&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, IEN0&nbsp;&nbsp;, 7);<br>
                Sbit (EAUD&nbsp;&nbsp;&nbsp;, IEN0&nbsp;&nbsp;, 6);<br>
                Sbit (EMP3&nbsp;&nbsp;&nbsp;, IEN0&nbsp;&nbsp;, 5);<br>
                Sbit (ES&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, IEN0&nbsp;&nbsp;, 4);<br>
                Sbit (ET1&nbsp;&nbsp;&nbsp;&nbsp;, IEN0&nbsp;&nbsp;, 3);<br>
                Sbit (EX1&nbsp;&nbsp;&nbsp;&nbsp;, IEN0&nbsp;&nbsp;, 2);<br>
                Sbit (ET0&nbsp;&nbsp;&nbsp;&nbsp;, IEN0&nbsp;&nbsp;, 1);<br>
                Sbit (EX0&nbsp;&nbsp;&nbsp;&nbsp;, IEN0&nbsp;&nbsp;, 0);<br>
                <br>
                Sbit (IPLAUD , IPL0&nbsp;&nbsp;, 6);<br>
                Sbit (IPLMP3 , IPL0&nbsp;&nbsp;, 5);<br>
                Sbit (IPLS&nbsp;&nbsp;&nbsp;, IPL0&nbsp;&nbsp;, 4);<br>
                Sbit (IPLT1&nbsp;&nbsp;, IPL0&nbsp;&nbsp;, 3);<br>
                Sbit (IPLX1&nbsp;&nbsp;, IPL0&nbsp;&nbsp;, 2);<br>
                Sbit (IPLT0&nbsp;&nbsp;, IPL0&nbsp;&nbsp;, 1);<br>
                Sbit (IPLX0&nbsp;&nbsp;, IPL0&nbsp;&nbsp;, 0);<br>
                <br>
                <br>
                /* PORTS */<br>
                <br>
                Sfr (P0&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, 0x80);<br>
                Sfr (P1&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, 0x90);<br>
                Sfr (P2&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, 0xA0);<br>
                Sfr (P3&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, 0xB0);<br>
                Sfr (P4&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, 0xC0);<br>
                Sfr (P5&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, 0xD8);<br>
                <br>
                Sbit (P0_7&nbsp;&nbsp;&nbsp;, P0&nbsp;&nbsp;&nbsp;&nbsp;, 7);<br>
                Sbit (P0_6&nbsp;&nbsp;&nbsp;, P0&nbsp;&nbsp;&nbsp;&nbsp;, 6);<br>
                Sbit (P0_5&nbsp;&nbsp;&nbsp;, P0&nbsp;&nbsp;&nbsp;&nbsp;, 5);<br>
                Sbit (P0_4&nbsp;&nbsp;&nbsp;, P0&nbsp;&nbsp;&nbsp;&nbsp;, 4);<br>
                Sbit (P0_3&nbsp;&nbsp;&nbsp;, P0&nbsp;&nbsp;&nbsp;&nbsp;, 3);<br>
                Sbit (P0_2&nbsp;&nbsp;&nbsp;, P0&nbsp;&nbsp;&nbsp;&nbsp;, 2);<br>
                Sbit (P0_1&nbsp;&nbsp;&nbsp;, P0&nbsp;&nbsp;&nbsp;&nbsp;, 1);<br>
                Sbit (P0_0&nbsp;&nbsp;&nbsp;, P0&nbsp;&nbsp;&nbsp;&nbsp;, 0);<br>
                <br>
                Sbit (P1_7&nbsp;&nbsp;&nbsp;, P1&nbsp;&nbsp;&nbsp;&nbsp;, 7);<br>
                Sbit (P1_6&nbsp;&nbsp;&nbsp;, P1&nbsp;&nbsp;&nbsp;&nbsp;, 6);<br>
                Sbit (P1_5&nbsp;&nbsp;&nbsp;, P1&nbsp;&nbsp;&nbsp;&nbsp;, 5);<br>
                Sbit (P1_4&nbsp;&nbsp;&nbsp;, P1&nbsp;&nbsp;&nbsp;&nbsp;, 4);<br>
                Sbit (P1_3&nbsp;&nbsp;&nbsp;, P1&nbsp;&nbsp;&nbsp;&nbsp;, 3);<br>
                Sbit (P1_2&nbsp;&nbsp;&nbsp;, P1&nbsp;&nbsp;&nbsp;&nbsp;, 2);<br>
                Sbit (P1_1&nbsp;&nbsp;&nbsp;, P1&nbsp;&nbsp;&nbsp;&nbsp;, 1);<br>
                Sbit (P1_0&nbsp;&nbsp;&nbsp;, P1&nbsp;&nbsp;&nbsp;&nbsp;, 0);<br>
                <br>
                Sbit (SDA&nbsp;&nbsp;&nbsp;&nbsp;, P1&nbsp;&nbsp;&nbsp;&nbsp;, 
                7);<br>
                Sbit (SCL&nbsp;&nbsp;&nbsp;&nbsp;, P1&nbsp;&nbsp;&nbsp;&nbsp;, 
                6);<br>
                Sbit (KIN3&nbsp;&nbsp;&nbsp;, P1&nbsp;&nbsp;&nbsp;&nbsp;, 3);<br>
                Sbit (KIN2&nbsp;&nbsp;&nbsp;, P1&nbsp;&nbsp;&nbsp;&nbsp;, 2);<br>
                Sbit (KIN1&nbsp;&nbsp;&nbsp;, P1&nbsp;&nbsp;&nbsp;&nbsp;, 1);<br>
                Sbit (KIN0&nbsp;&nbsp;&nbsp;, P1&nbsp;&nbsp;&nbsp;&nbsp;, 0);<br>
                <br>
                Sbit (P2_7&nbsp;&nbsp;&nbsp;, P2&nbsp;&nbsp;&nbsp;&nbsp;, 7);<br>
                Sbit (P2_6&nbsp;&nbsp;&nbsp;, P2&nbsp;&nbsp;&nbsp;&nbsp;, 6);<br>
                Sbit (P2_5&nbsp;&nbsp;&nbsp;, P2&nbsp;&nbsp;&nbsp;&nbsp;, 5);<br>
                Sbit (P2_4&nbsp;&nbsp;&nbsp;, P2&nbsp;&nbsp;&nbsp;&nbsp;, 4);<br>
                Sbit (P2_3&nbsp;&nbsp;&nbsp;, P2&nbsp;&nbsp;&nbsp;&nbsp;, 3);<br>
                Sbit (P2_2&nbsp;&nbsp;&nbsp;, P2&nbsp;&nbsp;&nbsp;&nbsp;, 2);<br>
                Sbit (P2_1&nbsp;&nbsp;&nbsp;, P2&nbsp;&nbsp;&nbsp;&nbsp;, 1);<br>
                Sbit (P2_0&nbsp;&nbsp;&nbsp;, P2&nbsp;&nbsp;&nbsp;&nbsp;, 0);<br>
                <br>
                Sbit (P3_7&nbsp;&nbsp;&nbsp;, P3&nbsp;&nbsp;&nbsp;&nbsp;, 7);<br>
                Sbit (P3_6&nbsp;&nbsp;&nbsp;, P3&nbsp;&nbsp;&nbsp;&nbsp;, 6);<br>
                Sbit (P3_5&nbsp;&nbsp;&nbsp;, P3&nbsp;&nbsp;&nbsp;&nbsp;, 5);<br>
                Sbit (P3_4&nbsp;&nbsp;&nbsp;, P3&nbsp;&nbsp;&nbsp;&nbsp;, 4);<br>
                Sbit (P3_3&nbsp;&nbsp;&nbsp;, P3&nbsp;&nbsp;&nbsp;&nbsp;, 3);<br>
                Sbit (P3_2&nbsp;&nbsp;&nbsp;, P3&nbsp;&nbsp;&nbsp;&nbsp;, 2);<br>
                Sbit (P3_1&nbsp;&nbsp;&nbsp;, P3&nbsp;&nbsp;&nbsp;&nbsp;, 1);<br>
                Sbit (P3_0&nbsp;&nbsp;&nbsp;, P3&nbsp;&nbsp;&nbsp;&nbsp;, 0);<br>
                <br>
                Sbit (RD&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;, P3&nbsp;&nbsp;&nbsp;&nbsp;,
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