fet140_uartxx_00123.s43

MSP430系列单片机P140算法源代码集

#include  "msp430x14x.h"
;******************************************************************************
;   MSP-FET430P140 Demo - USART0/1 UART 19200-115200 Router XT2 HF XTAL SMCLK
;
;   Description; This program will route characters between USART0 @19200
;   to USART1 @115200.  Receive interrupt service used.  USART1 running 
;   at a higher baud rate could overrun USART0 running at a slower baud.
;   ACLK = MCLK = SMCLK = UCLK1 = XT2 = 8MHz
;   Baud rate divider with 8Mhz XTAL @19200 = 8MHz/19200 = 417 (01A0h)
;   Baud rate divider with 8Mhz XTAL @115200 = 8MHz/115200 = 69.44(0045 2Ch)
;   //*An external 8MHz XTAL on X2IN X2OUT is required for ACLK*//	  
;
;                  MSP430F149
;               -----------------
;           /|\|             X2IN|-  
;            | |                 | 8Mhz 
;            --|RST         X2OUT|-
;              |                 |
; ------------>|P3.7 ------->P3.4|------------> 
; 8N1 - 115200 |                 | 19200 - 8N1
; <------------|P3.6<------- P3.5|<------------
;
;   M.Buccini
;   Texas Instruments, Inc
;   January 2002
;******************************************************************************
;------------------------------------------------------------------------------ 
            ORG     01100h                  ; Progam Start 
;------------------------------------------------------------------------------ 
RESET       mov.w   #0A00h,SP               ; Initialize 'F149 stackpointer
            call    #Init_Sys               ;
                                            ;   
Mainloop    jmp     Mainloop                ; Do nothing
                                            ;
;------------------------------------------------------------------------------ 
Init_Sys;   Initalize MSP430 system
;------------------------------------------------------------------------------ 
StopWDT     mov.w   #WDTPW+WDTHOLD,&WDTCTL  ; Stop WDT
SetupBC     bic.b   #XT2OFF,&BCSCTL1        ; XT2on
SetupOsc    bic.b   #OFIFG,&IFG1            ; Clear OSC fault flag 
            mov.w   #0FFh,R15               ; R15 = Delay 
SetupOsc1   dec.w   R15                     ; Additional delay to ensure start 
            jnz     SetupOsc1               ;
            bit.b   #OFIFG,&IFG1            ; OSC fault flag set? 
            jnz     SetupOsc                ; OSC Fault, clear flag again 
            bis.b   #SELM1+SELS,BCSCTL2     ; MCLK = SMCLK = XT2
                                            ;
SetupUART0  mov.b   #CHAR,&UCTL0            ; 8-bit characters
            mov.b   #SSEL1,&UTCTL0          ; UCLK = SMCLK 
            mov.b   #0A0h,&UBR00            ; 19200 @ 8Mhz
            mov.b   #001h,&UBR10            ; 
            clr.b   &UMCTL0                 ; No modulation
            bis.b   #0C0h,&ME1              ; Enable USART0 TXD/RXD
            bis.b   #URXIE0,&IE1            ; Enable USART0 RX interrupt
SetupUART1  mov.b   #CHAR,&UCTL1            ; 8-bit characters
            mov.b   #SSEL1,&UTCTL1          ; MCLK, SMCLK?
            mov.b   #045h,&UBR01            ; 115200 @ 8Mhz
            mov.b   #000h,&UBR11            ; 
            mov.b   #02ch,&UMCTL1           ; Modulation
            bis.b   #030h,&ME2              ; Enable USART1 TXD/RXD
            bis.b   #URXIE1,&IE2            ; Enable USART1 RX interrupt
SetupP3     bis.b   #0F0h,&P3SEL            ; Select USART1 TXD/RXD
            bis.b   #050h,&P3DIR            ; P3.6,4 = output direction 
            eint                            ; General enable interrupts
            ret                             ;
                                            ;
;------------------------------------------------------------------------------ 
USART0_ISR; Echo back RXed character, confirm TX buffer is ready first
;------------------------------------------------------------------------------ 
TX1         bit.b   #UTXIFG0,&IFG1          ; USART0 TX buffer ready?
            jz      TX1                     ; Jump is TX buffer not ready
            mov.b   &RXBUF0,&TXBUF1         ; TX -> RXed character
            reti                            ; 
                                            ;
;------------------------------------------------------------------------------ 
USART1_ISR;  Echo back RXed character, confirm TX buffer is ready first
;------------------------------------------------------------------------------ 
TX2         bit.b   #UTXIFG1,&IFG2          ; USART1 TX buffer ready?
            jz      TX2                     ; Jump is TX buffer not ready
            mov.b   &RXBUF1,&TXBUF0         ; TX -> RXed character
            reti                            ; 
                                            ;
;------------------------------------------------------------------------------ 
;           Interrupt Vectors Used MSP430x13x/14x        
;------------------------------------------------------------------------------ 
            ORG     0FFFEh                  ; 
            DW      RESET                   ; POR, ext. Reset, Watchdog
            ORG     0FFF2h                  ; 
            DW      USART0_ISR              ; USART0 Receive
            ORG     0FFE6h                  ; 
            DW      USART1_ISR              ; USART1 Receive
            end