fet140_ta_pwm03.s43

MSP430系列单片机P140算法源代码集

#include  "msp430x14x.h"
;******************************************************************************
;   MSP-FET430P140 Demo - Timer_A PWM TA1-2 upmode, HF XTAL ACLK
;
;   Description; This program will generate a two PWM outputs on P1.2/1.3 using
;   Timer_A in an upmode.  The value in CCR0, 512, defines the period and the 
;   values in CCR1 and CCR1 the duty PWM cycles.  Using HF XTAL ACLK as TACLK,
;   the timer period is HF XTAL/512 with a 75% duty cycle on P1.2 and 25% on P1.3. 
;   ACLK = MCLK = TACLK = HF XTAL = 
;   //** HF XTAL REQUIRED AND NOT INSTALLED ON FET **//
;
;                MSP430F149
;             -----------------
;         /|\|              XIN|-  
;          | |                 | HF XTAL (455k - 8Mhz) 
;          --|RST          XOUT|-
;            |                 |
;            |             P1.2|--> CCR1 - 75% PWM
;            |             P1.3|--> CCR2 - 25% PWM
;
;   M.Buccini
;   Texas Instruments, Inc
;   January 2002
;******************************************************************************
;------------------------------------------------------------------------------ 
            ORG     01100h                  ; Program Start
;------------------------------------------------------------------------------ 
RESET       mov.w   #0A00h,SP               ; Initialize 'F149 stackpointer
StopWDT     mov.w   #WDTPW+WDTHOLD,&WDTCTL  ; Stop WDT
SetupBC     bis.b   #XTS,&BCSCTL1           ; LFXT1 = HF XTAL
SetupOsc    bic.b   #OFIFG,&IFG1            ; Clear OSC fault flag 
            mov.w   #0FFh,R15               ; R15 = Delay 
SetupOsc1   dec.w   R15                     ; Additional delay to ensure start 
            jnz     SetupOsc1               ;
            bit.b   #OFIFG,&IFG1            ; OSC fault flag set? 
            jnz     SetupOsc                ; OSC Fault, clear flag again 
            bis.b   #SELM1+SELM0,&BCSCTL2   ; MCLK = LFXT1
SetupTA     mov.w   #TASSEL0+TACLR,&TACTL   ; ACLK, Clear TAR
SetupC0     mov.w   #512-1,&CCR0            ; PWM Period 
SetupC1     mov.w   #OUTMOD_7,&CCTL1        ; CCR1 reset/set
            mov.w   #384,&CCR1              ; CCR1 PWM Duty Cycle	  
SetupC2     mov.w   #OUTMOD_7,&CCTL2        ; CCR2 reset/set
            mov.w   #128,&CCR2              ; CCR2 PWM duty cycle	  
SetupP1     bis.b   #00Ch,&P1DIR            ; P1.2 and P1.3 output
            bis.b   #00Ch,&P1SEL            ; P1.2 and P1.3 TA1/2 otions
            bis.w   #MC0,&TACTL             ; Start Timer_A in up mode
                                            ;					  
Mainloop    bis.w   #CPUOFF,SR              ; CPU off
            nop                             ; Required only for C-spy
                                            ;
;------------------------------------------------------------------------------ 
;           Interrupt Vectors Used MSP430x13x/14x           
;------------------------------------------------------------------------------ 
            ORG     0FFFEh                  ; MSP430 RESET Vector
            DW      RESET                   ; 
            END