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📄 bsp.c

📁 CSB637 uCOS-II with Visual C
💻 C
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/***********************************************************************************************************                                               uC/TCP-IP*                                       The Embedded TCP/IP Suite**                          (c) Copyright 2003-2005; Micrium, Inc.; Weston, FL**                   All rights reserved.  Protected by international copyright laws.*                   Knowledge of the source code may not be used to write a similar*                   product.  This file may only be used in accordance with a license*                   and should not be redistributed in any way.**********************************************************************************************************//***********************************************************************************************************                                 BOARD SUPPORT PACKAGE (BSP) FUNCTIONS** Filename      : bsp.c* Version       : V1.22* Programmer(s) : JDH**********************************************************************************************************//***********************************************************************************************************                                             INCLUDE FILES**********************************************************************************************************/#include  <includes.h>#include  <at91rm9200_pmc.h>/***********************************************************************************************************                                               CONSTANTS**********************************************************************************************************/#define  BSP_AT91RM9200_CLK                                      32768  /* 32.768 KHz                  */#define  BSP_RESET_VECTOR_ADDR              (*(CPU_INT32U *)0x00000000)#define  BSP_UNDEF_INSTRUCTION_VECTOR_ADDR  (*(CPU_INT32U *)0x00000004)#define  BSP_SWI_VECTOR_ADDR                (*(CPU_INT32U *)0x00000008)#define  BSP_PREFETCH_ABORT_VECTOR_ADDR     (*(CPU_INT32U *)0x0000000C)#define  BSP_DATA_ABORT_VECTOR_ADDR         (*(CPU_INT32U *)0x00000010)#define  BSP_ADDR_ABORT_VECTOR_ADDR         (*(CPU_INT32U *)0x00000014)#define  BSP_IRQ_VECTOR_ADDR                (*(CPU_INT32U *)0x00000018)#define  BSP_FIQ_VECTOR_ADDR                (*(CPU_INT32U *)0x0000001C)#define  BSP_IRQ_ISR_ADDR                   (*(CPU_INT32U *)0x00000038)#define  BSP_FIQ_ISR_ADDR                   (*(CPU_INT32U *)0x0000003C)#define  BSP_FLASH_ADDR                     (*(CPU_INT32U *)0x107FFFF0)#define  BSP_uMON_ENTRY_POINT               (*(CPU_INT32U *)0x10000020)/***********************************************************************************************************                                              DATA TYPES**********************************************************************************************************/typedef  void  (*PFNCT)(void);/***********************************************************************************************************                                           GLOBAL VARIABLES**********************************************************************************************************/static  CPU_INT08U  LED_Image;/***********************************************************************************************************                                          BSP INITIALIZATION** Description : This function should be called by your application code before you make use of any of the*               functions found in this module.** Arguments   : none**********************************************************************************************************/void  BSP_Init (void){    extern CPU_CHAR   _bss;    extern CPU_CHAR   _ebss;    void             *bss_start;    CPU_INT32U        bss_len;    CPU_INT32U  i;    bss_start                = &_bss;    bss_len                  = &_ebss - &_bss;    BSP_FLASH_ADDR           = 0xFFFFFFFF;          /* C-Spy patch to unlock Flash bus.                */    *AT91C_AIC_IDCR          = 0xFFFFFFFF;          /* Disable ALL interrupts.                         */    if (BSP_IRQ_VECTOR_ADDR == 0xEA000012) {    	*AT91C_MC_RCR        = 0x00000001;          /* Remap SRAM to 0x00000000.                       */    }    memset(bss_start, 0, bss_len);                  /* Clear BSS.                                      */#if 0                                                       /* Activate i-cache.                               */    asm("MRC p15, 0,  r0, c1, c0, 0");    asm("ORR r0,  r0, #0x00001000");    asm("MCR p15, 0,  r0, c1, c0, 0");    asm("nop");    asm("nop");    asm("nop");                                                    /* Change BUS mode to synchronous.                 */    asm("MRC p15, 0,  r0, c1, c0, 0");    asm("ORR r0,  r0, #0x40000000");    asm("MCR p15, 0,  r0, c1, c0, 0");    asm("nop");    asm("nop");    asm("nop");                                                    /* Switch to the slow clock unless we already are. */    if (PMC_REG(PMC_MCKR)) {        PMC_REG(PMC_MCKR) = PMC_REG(PMC_MCKR) & ~PMC_MCKR_PRES_MASK;        PMC_REG(PMC_MCKR) = PMC_REG(PMC_MCKR) & ~PMC_MCKR_CSS_MASK;    }                                                    /* Delay for slow clock synchronization.           */    for (i = 0; i < 100; i++) {        ;    }                                                    /* Set new CPU clock speed (core clock).           */                                                    /* (3.6864 * 87 / 2 = 160.3584MHz).                */    PMC_REG(PMC_PLLAR)       = 0x20563F02;                                                    /* Wait for PLLA lock bit.                         */    for (i = 0; i < 1000; i++) {        if (PMC_REG(PMC_SR) & PMC_INT_LCKA) {            break;        }    }                                                    /* MCK = Core clock / 2 = 80.1792MHz.              */    PMC_REG(PMC_MCKR)        = 0x00000102;    *AT91C_DBGU_BRGR         = 0x00000082;          /* Set Debug (serial) port to 38400bps.            */    *AT91C_SDRC_CR           = 0x00002055;          /* Set new SDRAM timings.                          */#endif                                                    /* Initialize monitor services.                    */    monConnect((int (*)())BSP_uMON_ENTRY_POINT, NULL, NULL);    LED_Init();                                     /* Initialize LEDs.                                */}/***********************************************************************************************************                                    INITIALIZE INTERRUPT CONTROLLER** Description : This function should be called by your application code before you make use of any of the*               functions found in this module.** Arguments   : none**********************************************************************************************************/void  BSP_InitIntCtrl (void){    *AT91C_AIC_IDCR                   = 0xFFFFFFFF;                     /* Disable ALL interrupts.         */    BSP_RESET_VECTOR_ADDR             = 0xEAFFFFFE;                     /* Jump to itself.                 */    BSP_UNDEF_INSTRUCTION_VECTOR_ADDR = 0xEAFFFFFE;    BSP_SWI_VECTOR_ADDR               = 0xEAFFFFFE;    BSP_PREFETCH_ABORT_VECTOR_ADDR    = 0xEAFFFFFE;    BSP_DATA_ABORT_VECTOR_ADDR        = 0xEAFFFFFE;    BSP_ADDR_ABORT_VECTOR_ADDR        = 0xEAFFFFFE;    BSP_IRQ_VECTOR_ADDR               = 0xE59FF018;                     /* LDR PC,[PC,#0x18] instruction.  */    BSP_IRQ_ISR_ADDR                  = (CPU_INT32U)OS_CPU_IRQ_ISR;     /* IRQ exception vector address.   */    BSP_FIQ_VECTOR_ADDR               = 0xE59FF018;                     /* LDR PC,[PC,#0x18] instruction.  */    BSP_FIQ_ISR_ADDR                  = (CPU_INT32U)OS_CPU_FIQ_ISR;     /* FIQ exception vector address.   */}/***********************************************************************************************************                                            IRQ ISR HANDLER** Description : This function is called by OS_CPU_IRQ_ISR() to determine the source of the interrupt*               and process it accordingly.** Arguments   : none**********************************************************************************************************/void  OS_CPU_IRQ_ISR_Handler (void){    PFNCT  pfnct;    pfnct = (PFNCT)*AT91C_AIC_IVR;                  /* Read the interrupt vector from the AIC.         */    if (pfnct != (PFNCT)0) {                        /* Make sure we don't have a NULL pointer.         */        (*pfnct)();                                 /* Execute the ISR for the interrupting device.    */    }}/***********************************************************************************************************                                            FIQ ISR HANDLER** Description : This function is called by OS_CPU_FIQ_ISR() to determine the source of the interrupt*               and process it accordingly.** Arguments   : none**********************************************************************************************************/void  OS_CPU_FIQ_ISR_Handler (void){    PFNCT  pfnct;    pfnct = (PFNCT)*AT91C_AIC_IVR;                  /* Read the interrupt vector from the AIC.         */    if (pfnct != (PFNCT)0) {                        /* Make sure we don't have a NULL pointer.         */        (*pfnct)();                                 /* Execute the ISR for the interrupting device.    */    }}/***********************************************************************************************************                                         TICKER INITIALIZATION** Description : This function is called to initialize uC/OS-II's tick source (typically a timer generating*               interrupts every 1 to 100 mS).**               We decided to use Timer #0 as the tick interrupt source.** Arguments   : none**********************************************************************************************************/void  Tmr_Init (void){                                                        /* OS Timer is on interrupt #1.                */    AIC_SVR_REG(1 * 4) = (CPU_INT32U)Tmr_TickHandler;   /* Setup the interrupt vector for the tick ISR.*/    AIC_SMR_REG(1 * 4) = AT91C_AIC_PRIOR_LOWEST |       /* Level sensitive, low priority.              */                         AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE;    *AT91C_AIC_IECR    = BIT1;                          /* Enable timer interrupt at AIC level.        */                                                        /* Initialize the timer to generate 100 Hz.    */    *AT91C_ST_PIMR     = BSP_AT91RM9200_CLK / OS_TICKS_PER_SEC;    *AT91C_ST_IER      = AT91C_ST_PITS;                 /* Enable timer interrupt at ST level.         */}/***********************************************************************************************************                                         TIMER #0 IRQ HANDLER** Description : This function handles the timer interrupt that is used to generate TICKs for uC/OS-II.** Arguments   : none**********************************************************************************************************/void  Tmr_TickHandler (void){    CPU_INT32U  reg_val;    reg_val = *AT91C_ST_SR;    if (reg_val & AT91C_ST_PITS) {                  /* If the interrupt is from the tick source,       */        OSTimeTick();                               /* call OSTimeTick().                              */    }                                                    /* OS Timer is on interrupt #1.                    */    *AT91C_AIC_EOICR = BIT1;                        /* End of interrupt handler.                       */}/***********************************************************************************************************                                          LED INITIALIZATION** Description : This function should be called by your application code before you make use of any of the*               functions found in this module.** Arguments   : none*********************************************************************************************************

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