ice1712.h

linux-2.6.15.6

	ICE_EEP1_ADC_ID2,
	ICE_EEP1_ADC_ID3
};
	
#define ice_has_con_ac97(ice)	(!((ice)->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97))


struct snd_ak4xxx_private {
	unsigned int cif: 1;		/* CIF mode */
	unsigned char caddr;		/* C0 and C1 bits */
	unsigned int data_mask;		/* DATA gpio bit */
	unsigned int clk_mask;		/* CLK gpio bit */
	unsigned int cs_mask;		/* bit mask for select/deselect address */
	unsigned int cs_addr;		/* bits to select address */
	unsigned int cs_none;		/* bits to deselect address */
	unsigned int add_flags;		/* additional bits at init */
	unsigned int mask_flags;	/* total mask bits */
	struct snd_akm4xxx_ops {
		void (*set_rate_val)(akm4xxx_t *ak, unsigned int rate);
	} ops;
};

struct snd_ice1712_spdif {
	unsigned char cs8403_bits;
	unsigned char cs8403_stream_bits;
	snd_kcontrol_t *stream_ctl;

	struct snd_ice1712_spdif_ops {
		void (*open)(ice1712_t *, snd_pcm_substream_t *);
		void (*setup_rate)(ice1712_t *, int rate);
		void (*close)(ice1712_t *, snd_pcm_substream_t *);
		void (*default_get)(ice1712_t *, snd_ctl_elem_value_t * ucontrol);
		int (*default_put)(ice1712_t *, snd_ctl_elem_value_t * ucontrol);
		void (*stream_get)(ice1712_t *, snd_ctl_elem_value_t * ucontrol);
		int (*stream_put)(ice1712_t *, snd_ctl_elem_value_t * ucontrol);
	} ops;
};


struct _snd_ice1712 {
	unsigned long conp_dma_size;
	unsigned long conc_dma_size;
	unsigned long prop_dma_size;
	unsigned long proc_dma_size;
	int irq;

	unsigned long port;
	unsigned long ddma_port;
	unsigned long dmapath_port;
	unsigned long profi_port;

	struct pci_dev *pci;
	snd_card_t *card;
	snd_pcm_t *pcm;
	snd_pcm_t *pcm_ds;
	snd_pcm_t *pcm_pro;
        snd_pcm_substream_t *playback_con_substream;
        snd_pcm_substream_t *playback_con_substream_ds[6];
        snd_pcm_substream_t *capture_con_substream;
        snd_pcm_substream_t *playback_pro_substream;
        snd_pcm_substream_t *capture_pro_substream;
	unsigned int playback_pro_size;
	unsigned int capture_pro_size;
	unsigned int playback_con_virt_addr[6];
	unsigned int playback_con_active_buf[6];
	unsigned int capture_con_virt_addr;
	unsigned int ac97_ext_id;
	ac97_t *ac97;
	snd_rawmidi_t *rmidi[2];

	spinlock_t reg_lock;
	snd_info_entry_t *proc_entry;

	ice1712_eeprom_t eeprom;

	unsigned int pro_volumes[20];
	unsigned int omni: 1;		/* Delta Omni I/O */
	unsigned int vt1724: 1;
	unsigned int vt1720: 1;
	unsigned int has_spdif: 1;	/* VT1720/4 - has SPDIF I/O */
	unsigned int force_pdma4: 1;	/* VT1720/4 - PDMA4 as non-spdif */
	unsigned int force_rdma1: 1;	/* VT1720/4 - RDMA1 as non-spdif */
	unsigned int num_total_dacs;	/* total DACs */
	unsigned int num_total_adcs;	/* total ADCs */
	unsigned int cur_rate;		/* current rate */

	struct semaphore open_mutex;
	snd_pcm_substream_t *pcm_reserved[4];
	snd_pcm_hw_constraint_list_t *hw_rates; /* card-specific rate constraints */

	unsigned int akm_codecs;
	akm4xxx_t *akm;
	struct snd_ice1712_spdif spdif;

	struct semaphore i2c_mutex;	/* I2C mutex for ICE1724 registers */
	snd_i2c_bus_t *i2c;		/* I2C bus */
	snd_i2c_device_t *cs8427;	/* CS8427 I2C device */
	unsigned int cs8427_timeout;	/* CS8427 reset timeout in HZ/100 */
	
	struct ice1712_gpio {
		unsigned int direction;		/* current direction bits */
		unsigned int write_mask;	/* current mask bits */
		unsigned int saved[2];		/* for ewx_i2c */
		/* operators */
		void (*set_mask)(ice1712_t *ice, unsigned int data);
		void (*set_dir)(ice1712_t *ice, unsigned int data);
		void (*set_data)(ice1712_t *ice, unsigned int data);
		unsigned int (*get_data)(ice1712_t *ice);
		/* misc operators - move to another place? */
		void (*set_pro_rate)(ice1712_t *ice, unsigned int rate);
		void (*i2s_mclk_changed)(ice1712_t *ice);
	} gpio;
	struct semaphore gpio_mutex;

	/* other board-specific data */
	union {
		/* additional i2c devices for EWS boards */
		snd_i2c_device_t *i2cdevs[3];
		/* AC97 register cache for Aureon */
		struct aureon_spec {
			unsigned short stac9744[64];
			unsigned int cs8415_mux;
			unsigned short master[2];
			unsigned short vol[8];
		} aureon;
		/* AC97 register cache for Phase28 */
		struct phase28_spec {
			unsigned short master[2];
			unsigned short vol[8];
		} phase28;
		/* Hoontech-specific setting */
		struct hoontech_spec {
			unsigned char boxbits[4];
			unsigned int config;
			unsigned short boxconfig[4];
		} hoontech;
		struct {
			ak4114_t *ak4114;
			unsigned int analog: 1;
		} juli;
	} spec;

};


/*
 * gpio access functions
 */
static inline void snd_ice1712_gpio_set_dir(ice1712_t *ice, unsigned int bits)
{
	ice->gpio.set_dir(ice, bits);
}

static inline void snd_ice1712_gpio_set_mask(ice1712_t *ice, unsigned int bits)
{
	ice->gpio.set_mask(ice, bits);
}

static inline void snd_ice1712_gpio_write(ice1712_t *ice, unsigned int val)
{
	ice->gpio.set_data(ice, val);
}

static inline unsigned int snd_ice1712_gpio_read(ice1712_t *ice)
{
	return ice->gpio.get_data(ice);
}

/*
 * save and restore gpio status
 * The access to gpio will be protected by mutex, so don't forget to
 * restore!
 */
static inline void snd_ice1712_save_gpio_status(ice1712_t *ice)
{
	down(&ice->gpio_mutex);
	ice->gpio.saved[0] = ice->gpio.direction;
	ice->gpio.saved[1] = ice->gpio.write_mask;
}

static inline void snd_ice1712_restore_gpio_status(ice1712_t *ice)
{
	ice->gpio.set_dir(ice, ice->gpio.saved[0]);
	ice->gpio.set_mask(ice, ice->gpio.saved[1]);
	ice->gpio.direction = ice->gpio.saved[0];
	ice->gpio.write_mask = ice->gpio.saved[1];
	up(&ice->gpio_mutex);
}

/* for bit controls */
#define ICE1712_GPIO(xiface, xname, xindex, mask, invert, xaccess) \
{ .iface = xiface, .name = xname, .access = xaccess, .info = snd_ice1712_gpio_info, \
  .get = snd_ice1712_gpio_get, .put = snd_ice1712_gpio_put, \
  .private_value = mask | (invert << 24) }

int snd_ice1712_gpio_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo);
int snd_ice1712_gpio_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol);
int snd_ice1712_gpio_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol);

/*
 * set gpio direction, write mask and data
 */
static inline void snd_ice1712_gpio_write_bits(ice1712_t *ice, unsigned int mask, unsigned int bits)
{
	ice->gpio.direction |= mask;
	snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
	snd_ice1712_gpio_set_mask(ice, ~mask);
	snd_ice1712_gpio_write(ice, mask & bits);
}

int snd_ice1712_spdif_build_controls(ice1712_t *ice);

int snd_ice1712_akm4xxx_init(akm4xxx_t *ak, const akm4xxx_t *template, const struct snd_ak4xxx_private *priv, ice1712_t *ice);
void snd_ice1712_akm4xxx_free(ice1712_t *ice);
int snd_ice1712_akm4xxx_build_controls(ice1712_t *ice);

int snd_ice1712_init_cs8427(ice1712_t *ice, int addr);

static inline void snd_ice1712_write(ice1712_t * ice, u8 addr, u8 data)
{
	outb(addr, ICEREG(ice, INDEX));
	outb(data, ICEREG(ice, DATA));
}

static inline u8 snd_ice1712_read(ice1712_t * ice, u8 addr)
{
	outb(addr, ICEREG(ice, INDEX));
	return inb(ICEREG(ice, DATA));
}


/*
 * entry pointer
 */

struct snd_ice1712_card_info {
	unsigned int subvendor;
	char *name;
	char *model;
	char *driver;
	int (*chip_init)(ice1712_t *);
	int (*build_controls)(ice1712_t *);
	unsigned int no_mpu401: 1;
	unsigned int eeprom_size;
	unsigned char *eeprom_data;
};


#endif /* __SOUND_ICE1712_H */