cs4231_lib.c

linux-2.6.15.6

/*
 *  Copyright (c) by Jaroslav Kysela <[e-mail]>
 *  Routines for control of CS4231(A)/CS4232/InterWave & compatible chips
 *
 *  Bugs:
 *     - sometimes record brokes playback with WSS portion of 
 *       Yamaha OPL3-SA3 chip
 *     - CS4231 (GUS MAX) - still trouble with occasional noises
 *                        - broken initialization?
 *
 *   This program is free software; you can redistribute it and/or modify
 *   it under the terms of the GNU General Public License as published by
 *   the Free Software Foundation; either version 2 of the License, or
 *   (at your option) any later version.
 *
 *   This program is distributed in the hope that it will be useful,
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *   GNU General Public License for more details.
 *
 *   You should have received a copy of the GNU General Public License
 *   along with this program; if not, write to the Free Software
 *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 *
 */

#include <sound/driver.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
#include <linux/ioport.h>
#include <sound/core.h>
#include <sound/cs4231.h>
#include <sound/pcm_params.h>

#include <asm/io.h>
#include <asm/dma.h>
#include <asm/irq.h>

MODULE_AUTHOR("Jaroslav Kysela <[e-mail]>");
MODULE_DESCRIPTION("Routines for control of CS4231(A)/CS4232/InterWave & compatible chips");
MODULE_LICENSE("GPL");

#if 0
#define SNDRV_DEBUG_MCE
#endif

/*
 *  Some variables
 */

static unsigned char freq_bits[14] = {
	/* 5510 */	0x00 | CS4231_XTAL2,
	/* 6620 */	0x0E | CS4231_XTAL2,
	/* 8000 */	0x00 | CS4231_XTAL1,
	/* 9600 */	0x0E | CS4231_XTAL1,
	/* 11025 */	0x02 | CS4231_XTAL2,
	/* 16000 */	0x02 | CS4231_XTAL1,
	/* 18900 */	0x04 | CS4231_XTAL2,
	/* 22050 */	0x06 | CS4231_XTAL2,
	/* 27042 */	0x04 | CS4231_XTAL1,
	/* 32000 */	0x06 | CS4231_XTAL1,
	/* 33075 */	0x0C | CS4231_XTAL2,
	/* 37800 */	0x08 | CS4231_XTAL2,
	/* 44100 */	0x0A | CS4231_XTAL2,
	/* 48000 */	0x0C | CS4231_XTAL1
};

static unsigned int rates[14] = {
	5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
	27042, 32000, 33075, 37800, 44100, 48000
};

static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
	.count = 14,
	.list = rates,
	.mask = 0,
};

static int snd_cs4231_xrate(snd_pcm_runtime_t *runtime)
{
	return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
}

static unsigned char snd_cs4231_original_image[32] =
{
	0x00,			/* 00/00 - lic */
	0x00,			/* 01/01 - ric */
	0x9f,			/* 02/02 - la1ic */
	0x9f,			/* 03/03 - ra1ic */
	0x9f,			/* 04/04 - la2ic */
	0x9f,			/* 05/05 - ra2ic */
	0xbf,			/* 06/06 - loc */
	0xbf,			/* 07/07 - roc */
	0x20,			/* 08/08 - pdfr */
	CS4231_AUTOCALIB,	/* 09/09 - ic */
	0x00,			/* 0a/10 - pc */
	0x00,			/* 0b/11 - ti */
	CS4231_MODE2,		/* 0c/12 - mi */
	0xfc,			/* 0d/13 - lbc */
	0x00,			/* 0e/14 - pbru */
	0x00,			/* 0f/15 - pbrl */
	0x80,			/* 10/16 - afei */
	0x01,			/* 11/17 - afeii */
	0x9f,			/* 12/18 - llic */
	0x9f,			/* 13/19 - rlic */
	0x00,			/* 14/20 - tlb */
	0x00,			/* 15/21 - thb */
	0x00,			/* 16/22 - la3mic/reserved */
	0x00,			/* 17/23 - ra3mic/reserved */
	0x00,			/* 18/24 - afs */
	0x00,			/* 19/25 - lamoc/version */
	0xcf,			/* 1a/26 - mioc */
	0x00,			/* 1b/27 - ramoc/reserved */
	0x20,			/* 1c/28 - cdfr */
	0x00,			/* 1d/29 - res4 */
	0x00,			/* 1e/30 - cbru */
	0x00,			/* 1f/31 - cbrl */
};

/*
 *  Basic I/O functions
 */

#if !defined(EBUS_SUPPORT) && !defined(SBUS_SUPPORT)
#define __CS4231_INLINE__ inline
#else
#define __CS4231_INLINE__ /* nothing */
#endif

static __CS4231_INLINE__ void cs4231_outb(cs4231_t *chip, u8 offset, u8 val)
{
#ifdef EBUS_SUPPORT
	if (chip->ebus->flag) {
		writeb(val, chip->port + (offset << 2));
	} else {
#endif
#ifdef SBUS_SUPPORT
		sbus_writeb(val, chip->port + (offset << 2));
#endif
#ifdef EBUS_SUPPORT
	}
#endif
#ifdef LEGACY_SUPPORT
	outb(val, chip->port + offset);
#endif
}

static __CS4231_INLINE__ u8 cs4231_inb(cs4231_t *chip, u8 offset)
{
#ifdef EBUS_SUPPORT
	if (chip->ebus_flag) {
		return readb(chip->port + (offset << 2));
	} else {
#endif
#ifdef SBUS_SUPPORT
		return sbus_readb(chip->port + (offset << 2));
#endif
#ifdef EBUS_SUPPORT
	}
#endif
#ifdef LEGACY_SUPPORT
	return inb(chip->port + offset);
#endif
}

static void snd_cs4231_outm(cs4231_t *chip, unsigned char reg,
			    unsigned char mask, unsigned char value)
{
	int timeout;
	unsigned char tmp;

	for (timeout = 250;
	     timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
	     timeout--)
	     	udelay(100);
#ifdef CONFIG_SND_DEBUG
	if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
		snd_printk("outm: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
#endif
	if (chip->calibrate_mute) {
		chip->image[reg] &= mask;
		chip->image[reg] |= value;
	} else {
		cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
		mb();
		tmp = (chip->image[reg] & mask) | value;
		cs4231_outb(chip, CS4231P(REG), tmp);
		chip->image[reg] = tmp;
		mb();
	}
}

static void snd_cs4231_dout(cs4231_t *chip, unsigned char reg, unsigned char value)
{
	int timeout;

	for (timeout = 250;
	     timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
	     timeout--)
	     	udelay(10);
	cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
	cs4231_outb(chip, CS4231P(REG), value);
	mb();
}

void snd_cs4231_out(cs4231_t *chip, unsigned char reg, unsigned char value)
{
	int timeout;

	for (timeout = 250;
	     timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
	     timeout--)
	     	udelay(100);
#ifdef CONFIG_SND_DEBUG
	if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
		snd_printk("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
#endif
	cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
	cs4231_outb(chip, CS4231P(REG), value);
	chip->image[reg] = value;
	mb();
#if 0
	printk("codec out - reg 0x%x = 0x%x\n", chip->mce_bit | reg, value);
#endif
}

unsigned char snd_cs4231_in(cs4231_t *chip, unsigned char reg)
{
	int timeout;

	for (timeout = 250;
	     timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
	     timeout--)
	     	udelay(100);
#ifdef CONFIG_SND_DEBUG
	if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
		snd_printk("in: auto calibration time out - reg = 0x%x\n", reg);
#endif
	cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
	mb();
	return cs4231_inb(chip, CS4231P(REG));
}

void snd_cs4236_ext_out(cs4231_t *chip, unsigned char reg, unsigned char val)
{
	cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
	cs4231_outb(chip, CS4231P(REG), reg | (chip->image[CS4236_EXT_REG] & 0x01));
	cs4231_outb(chip, CS4231P(REG), val);
	chip->eimage[CS4236_REG(reg)] = val;
#if 0
	printk("ext out : reg = 0x%x, val = 0x%x\n", reg, val);
#endif
}

unsigned char snd_cs4236_ext_in(cs4231_t *chip, unsigned char reg)
{
	cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
	cs4231_outb(chip, CS4231P(REG), reg | (chip->image[CS4236_EXT_REG] & 0x01));
#if 1
	return cs4231_inb(chip, CS4231P(REG));
#else
	{
		unsigned char res;
		res = cs4231_inb(chip, CS4231P(REG));
		printk("ext in : reg = 0x%x, val = 0x%x\n", reg, res);
		return res;
	}
#endif
}

#if 0

static void snd_cs4231_debug(cs4231_t *chip)
{
	printk("CS4231 REGS:      INDEX = 0x%02x  ", cs4231_inb(chip, CS4231P(REGSEL)));
	printk("                 STATUS = 0x%02x\n", cs4231_inb(chip, CS4231P(STATUS)));
	printk("  0x00: left input      = 0x%02x  ", snd_cs4231_in(chip, 0x00));
	printk("  0x10: alt 1 (CFIG 2)  = 0x%02x\n", snd_cs4231_in(chip, 0x10));
	printk("  0x01: right input     = 0x%02x  ", snd_cs4231_in(chip, 0x01));
	printk("  0x11: alt 2 (CFIG 3)  = 0x%02x\n", snd_cs4231_in(chip, 0x11));
	printk("  0x02: GF1 left input  = 0x%02x  ", snd_cs4231_in(chip, 0x02));
	printk("  0x12: left line in    = 0x%02x\n", snd_cs4231_in(chip, 0x12));
	printk("  0x03: GF1 right input = 0x%02x  ", snd_cs4231_in(chip, 0x03));
	printk("  0x13: right line in   = 0x%02x\n", snd_cs4231_in(chip, 0x13));
	printk("  0x04: CD left input   = 0x%02x  ", snd_cs4231_in(chip, 0x04));
	printk("  0x14: timer low       = 0x%02x\n", snd_cs4231_in(chip, 0x14));
	printk("  0x05: CD right input  = 0x%02x  ", snd_cs4231_in(chip, 0x05));
	printk("  0x15: timer high      = 0x%02x\n", snd_cs4231_in(chip, 0x15));
	printk("  0x06: left output     = 0x%02x  ", snd_cs4231_in(chip, 0x06));
	printk("  0x16: left MIC (PnP)  = 0x%02x\n", snd_cs4231_in(chip, 0x16));
	printk("  0x07: right output    = 0x%02x  ", snd_cs4231_in(chip, 0x07));
	printk("  0x17: right MIC (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x17));
	printk("  0x08: playback format = 0x%02x  ", snd_cs4231_in(chip, 0x08));
	printk("  0x18: IRQ status      = 0x%02x\n", snd_cs4231_in(chip, 0x18));
	printk("  0x09: iface (CFIG 1)  = 0x%02x  ", snd_cs4231_in(chip, 0x09));
	printk("  0x19: left line out   = 0x%02x\n", snd_cs4231_in(chip, 0x19));
	printk("  0x0a: pin control     = 0x%02x  ", snd_cs4231_in(chip, 0x0a));
	printk("  0x1a: mono control    = 0x%02x\n", snd_cs4231_in(chip, 0x1a));
	printk("  0x0b: init & status   = 0x%02x  ", snd_cs4231_in(chip, 0x0b));
	printk("  0x1b: right line out  = 0x%02x\n", snd_cs4231_in(chip, 0x1b));
	printk("  0x0c: revision & mode = 0x%02x  ", snd_cs4231_in(chip, 0x0c));
	printk("  0x1c: record format   = 0x%02x\n", snd_cs4231_in(chip, 0x1c));
	printk("  0x0d: loopback        = 0x%02x  ", snd_cs4231_in(chip, 0x0d));
	printk("  0x1d: var freq (PnP)  = 0x%02x\n", snd_cs4231_in(chip, 0x1d));
	printk("  0x0e: ply upr count   = 0x%02x  ", snd_cs4231_in(chip, 0x0e));
	printk("  0x1e: ply lwr count   = 0x%02x\n", snd_cs4231_in(chip, 0x1e));
	printk("  0x0f: rec upr count   = 0x%02x  ", snd_cs4231_in(chip, 0x0f));
	printk("  0x1f: rec lwr count   = 0x%02x\n", snd_cs4231_in(chip, 0x1f));
}

#endif

/*
 *  CS4231 detection / MCE routines
 */

static void snd_cs4231_busy_wait(cs4231_t *chip)
{
	int timeout;

	/* huh.. looks like this sequence is proper for CS4231A chip (GUS MAX) */
	for (timeout = 5; timeout > 0; timeout--)
		cs4231_inb(chip, CS4231P(REGSEL));
	/* end of cleanup sequence */
	for (timeout = 250;
	     timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
	     timeout--)
	     	udelay(10);
}

void snd_cs4231_mce_up(cs4231_t *chip)
{
	unsigned long flags;
	int timeout;

	for (timeout = 250; timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT); timeout--)
		udelay(100);
#ifdef CONFIG_SND_DEBUG
	if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
		snd_printk("mce_up - auto calibration time out (0)\n");
#endif
	spin_lock_irqsave(&chip->reg_lock, flags);
	chip->mce_bit |= CS4231_MCE;
	timeout = cs4231_inb(chip, CS4231P(REGSEL));
	if (timeout == 0x80)
		snd_printk("mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
	if (!(timeout & CS4231_MCE))
		cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
	spin_unlock_irqrestore(&chip->reg_lock, flags);
}

void snd_cs4231_mce_down(cs4231_t *chip)
{
	unsigned long flags;
	int timeout;

	snd_cs4231_busy_wait(chip);
#if 0
	printk("(1) timeout = %i\n", timeout);
#endif
#ifdef CONFIG_SND_DEBUG
	if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
		snd_printk("mce_down [0x%lx] - auto calibration time out (0)\n", (long)CS4231P(REGSEL));
#endif
	spin_lock_irqsave(&chip->reg_lock, flags);
	chip->mce_bit &= ~CS4231_MCE;
	timeout = cs4231_inb(chip, CS4231P(REGSEL));
	cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
	spin_unlock_irqrestore(&chip->reg_lock, flags);
	if (timeout == 0x80)
		snd_printk("mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
	if ((timeout & CS4231_MCE) == 0 ||
	    !(chip->hardware & (CS4231_HW_CS4231_MASK | CS4231_HW_CS4232_MASK))) {
		return;
	}
	snd_cs4231_busy_wait(chip);

	/* calibration process */

	for (timeout = 500; timeout > 0 && (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0; timeout--)
		udelay(10);
	if ((snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0) {
		snd_printd("cs4231_mce_down - auto calibration time out (1)\n");
		return;
	}
#if 0
	printk("(2) timeout = %i, jiffies = %li\n", timeout, jiffies);
#endif
	/* in 10 ms increments, check condition, up to 250 ms */
	timeout = 25;
	while (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) {
		if (--timeout < 0) {
			snd_printk("mce_down - auto calibration time out (2)\n");
			return;
		}
		msleep(10);
	}
#if 0
	printk("(3) jiffies = %li\n", jiffies);
#endif
	/* in 10 ms increments, check condition, up to 100 ms */
	timeout = 10;
	while (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) {
		if (--timeout < 0) {
			snd_printk(KERN_ERR "mce_down - auto calibration time out (3)\n");
			return;
		}
		msleep(10);
	}
#if 0
	printk("(4) jiffies = %li\n", jiffies);
	snd_printk("mce_down - exit = 0x%x\n", cs4231_inb(chip, CS4231P(REGSEL)));
#endif
}

static unsigned int snd_cs4231_get_count(unsigned char format, unsigned int size)
{
	switch (format & 0xe0) {
	case CS4231_LINEAR_16:
	case CS4231_LINEAR_16_BIG:
		size >>= 1;
		break;
	case CS4231_ADPCM_16:
		return size >> 2;
	}
	if (format & CS4231_STEREO)
		size >>= 1;
	return size;
}

static int snd_cs4231_trigger(snd_pcm_substream_t *substream,
			      int cmd)
{
	cs4231_t *chip = snd_pcm_substream_chip(substream);
	int result = 0;
	unsigned int what;
	struct list_head *pos;
	snd_pcm_substream_t *s;
	int do_start;

#if 0
	printk("codec trigger!!! - what = %i, enable = %i, status = 0x%x\n", what, enable, cs4231_inb(chip, CS4231P(STATUS)));
#endif

	switch (cmd) {
	case SNDRV_PCM_TRIGGER_START:
	case SNDRV_PCM_TRIGGER_RESUME:
		do_start = 1; break;
	case SNDRV_PCM_TRIGGER_STOP:
	case SNDRV_PCM_TRIGGER_SUSPEND:
		do_start = 0; break;
	default:
		return -EINVAL;
	}

	what = 0;
	snd_pcm_group_for_each(pos, substream) {
		s = snd_pcm_group_substream_entry(pos);
		if (s == chip->playback_substream) {
			what |= CS4231_PLAYBACK_ENABLE;
			snd_pcm_trigger_done(s, substream);
		} else if (s == chip->capture_substream) {
			what |= CS4231_RECORD_ENABLE;
			snd_pcm_trigger_done(s, substream);
		}
	}
	spin_lock(&chip->reg_lock);
	if (do_start) {
		chip->image[CS4231_IFACE_CTRL] |= what;
		if (chip->trigger)
			chip->trigger(chip, what, 1);
	} else {
		chip->image[CS4231_IFACE_CTRL] &= ~what;
		if (chip->trigger)
			chip->trigger(chip, what, 0);
	}
	snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
	spin_unlock(&chip->reg_lock);
#if 0
	snd_cs4231_debug(chip);
#endif
	return result;
}

/*
 *  CODEC I/O
 */