📄 ser_defs_asm.h
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#define reg_ser_rs_stat_din___rec_err___lsb 20#define reg_ser_rs_stat_din___rec_err___width 1#define reg_ser_rs_stat_din___rec_err___bit 20#define reg_ser_rs_stat_din___rxd___lsb 21#define reg_ser_rs_stat_din___rxd___width 1#define reg_ser_rs_stat_din___rxd___bit 21#define reg_ser_rs_stat_din___tr_idle___lsb 22#define reg_ser_rs_stat_din___tr_idle___width 1#define reg_ser_rs_stat_din___tr_idle___bit 22#define reg_ser_rs_stat_din___tr_empty___lsb 23#define reg_ser_rs_stat_din___tr_empty___width 1#define reg_ser_rs_stat_din___tr_empty___bit 23#define reg_ser_rs_stat_din___tr_rdy___lsb 24#define reg_ser_rs_stat_din___tr_rdy___width 1#define reg_ser_rs_stat_din___tr_rdy___bit 24#define reg_ser_rs_stat_din___cts_n___lsb 25#define reg_ser_rs_stat_din___cts_n___width 1#define reg_ser_rs_stat_din___cts_n___bit 25#define reg_ser_rs_stat_din___xoff_detect___lsb 26#define reg_ser_rs_stat_din___xoff_detect___width 1#define reg_ser_rs_stat_din___xoff_detect___bit 26#define reg_ser_rs_stat_din___rts_n___lsb 27#define reg_ser_rs_stat_din___rts_n___width 1#define reg_ser_rs_stat_din___rts_n___bit 27#define reg_ser_rs_stat_din___txd___lsb 28#define reg_ser_rs_stat_din___txd___width 1#define reg_ser_rs_stat_din___txd___bit 28#define reg_ser_rs_stat_din_offset 32/* Register r_stat_din, scope ser, type r */#define reg_ser_r_stat_din___data___lsb 0#define reg_ser_r_stat_din___data___width 8#define reg_ser_r_stat_din___dav___lsb 16#define reg_ser_r_stat_din___dav___width 1#define reg_ser_r_stat_din___dav___bit 16#define reg_ser_r_stat_din___framing_err___lsb 17#define reg_ser_r_stat_din___framing_err___width 1#define reg_ser_r_stat_din___framing_err___bit 17#define reg_ser_r_stat_din___par_err___lsb 18#define reg_ser_r_stat_din___par_err___width 1#define reg_ser_r_stat_din___par_err___bit 18#define reg_ser_r_stat_din___orun___lsb 19#define reg_ser_r_stat_din___orun___width 1#define reg_ser_r_stat_din___orun___bit 19#define reg_ser_r_stat_din___rec_err___lsb 20#define reg_ser_r_stat_din___rec_err___width 1#define reg_ser_r_stat_din___rec_err___bit 20#define reg_ser_r_stat_din___rxd___lsb 21#define reg_ser_r_stat_din___rxd___width 1#define reg_ser_r_stat_din___rxd___bit 21#define reg_ser_r_stat_din___tr_idle___lsb 22#define reg_ser_r_stat_din___tr_idle___width 1#define reg_ser_r_stat_din___tr_idle___bit 22#define reg_ser_r_stat_din___tr_empty___lsb 23#define reg_ser_r_stat_din___tr_empty___width 1#define reg_ser_r_stat_din___tr_empty___bit 23#define reg_ser_r_stat_din___tr_rdy___lsb 24#define reg_ser_r_stat_din___tr_rdy___width 1#define reg_ser_r_stat_din___tr_rdy___bit 24#define reg_ser_r_stat_din___cts_n___lsb 25#define reg_ser_r_stat_din___cts_n___width 1#define reg_ser_r_stat_din___cts_n___bit 25#define reg_ser_r_stat_din___xoff_detect___lsb 26#define reg_ser_r_stat_din___xoff_detect___width 1#define reg_ser_r_stat_din___xoff_detect___bit 26#define reg_ser_r_stat_din___rts_n___lsb 27#define reg_ser_r_stat_din___rts_n___width 1#define reg_ser_r_stat_din___rts_n___bit 27#define reg_ser_r_stat_din___txd___lsb 28#define reg_ser_r_stat_din___txd___width 1#define reg_ser_r_stat_din___txd___bit 28#define reg_ser_r_stat_din_offset 36/* Register rw_rec_eop, scope ser, type rw */#define reg_ser_rw_rec_eop___set___lsb 0#define reg_ser_rw_rec_eop___set___width 1#define reg_ser_rw_rec_eop___set___bit 0#define reg_ser_rw_rec_eop_offset 40/* Register rw_intr_mask, scope ser, type rw */#define reg_ser_rw_intr_mask___tr_rdy___lsb 0#define reg_ser_rw_intr_mask___tr_rdy___width 1#define reg_ser_rw_intr_mask___tr_rdy___bit 0#define reg_ser_rw_intr_mask___tr_empty___lsb 1#define reg_ser_rw_intr_mask___tr_empty___width 1#define reg_ser_rw_intr_mask___tr_empty___bit 1#define reg_ser_rw_intr_mask___tr_idle___lsb 2#define reg_ser_rw_intr_mask___tr_idle___width 1#define reg_ser_rw_intr_mask___tr_idle___bit 2#define reg_ser_rw_intr_mask___dav___lsb 3#define reg_ser_rw_intr_mask___dav___width 1#define reg_ser_rw_intr_mask___dav___bit 3#define reg_ser_rw_intr_mask_offset 44/* Register rw_ack_intr, scope ser, type rw */#define reg_ser_rw_ack_intr___tr_rdy___lsb 0#define reg_ser_rw_ack_intr___tr_rdy___width 1#define reg_ser_rw_ack_intr___tr_rdy___bit 0#define reg_ser_rw_ack_intr___tr_empty___lsb 1#define reg_ser_rw_ack_intr___tr_empty___width 1#define reg_ser_rw_ack_intr___tr_empty___bit 1#define reg_ser_rw_ack_intr___tr_idle___lsb 2#define reg_ser_rw_ack_intr___tr_idle___width 1#define reg_ser_rw_ack_intr___tr_idle___bit 2#define reg_ser_rw_ack_intr___dav___lsb 3#define reg_ser_rw_ack_intr___dav___width 1#define reg_ser_rw_ack_intr___dav___bit 3#define reg_ser_rw_ack_intr_offset 48/* Register r_intr, scope ser, type r */#define reg_ser_r_intr___tr_rdy___lsb 0#define reg_ser_r_intr___tr_rdy___width 1#define reg_ser_r_intr___tr_rdy___bit 0#define reg_ser_r_intr___tr_empty___lsb 1#define reg_ser_r_intr___tr_empty___width 1#define reg_ser_r_intr___tr_empty___bit 1#define reg_ser_r_intr___tr_idle___lsb 2#define reg_ser_r_intr___tr_idle___width 1#define reg_ser_r_intr___tr_idle___bit 2#define reg_ser_r_intr___dav___lsb 3#define reg_ser_r_intr___dav___width 1#define reg_ser_r_intr___dav___bit 3#define reg_ser_r_intr_offset 52/* Register r_masked_intr, scope ser, type r */#define reg_ser_r_masked_intr___tr_rdy___lsb 0#define reg_ser_r_masked_intr___tr_rdy___width 1#define reg_ser_r_masked_intr___tr_rdy___bit 0#define reg_ser_r_masked_intr___tr_empty___lsb 1#define reg_ser_r_masked_intr___tr_empty___width 1#define reg_ser_r_masked_intr___tr_empty___bit 1#define reg_ser_r_masked_intr___tr_idle___lsb 2#define reg_ser_r_masked_intr___tr_idle___width 1#define reg_ser_r_masked_intr___tr_idle___bit 2#define reg_ser_r_masked_intr___dav___lsb 3#define reg_ser_r_masked_intr___dav___width 1#define reg_ser_r_masked_intr___dav___bit 3#define reg_ser_r_masked_intr_offset 56/* Constants */#define regk_ser_active 0x00000000#define regk_ser_bits1 0x00000000#define regk_ser_bits2 0x00000001#define regk_ser_bits7 0x00000001#define regk_ser_bits8 0x00000000#define regk_ser_del0_5 0x00000000#define regk_ser_del1 0x00000001#define regk_ser_del1_5 0x00000002#define regk_ser_del2 0x00000003#define regk_ser_del2_5 0x00000004#define regk_ser_del3 0x00000005#define regk_ser_del3_5 0x00000006#define regk_ser_del4 0x00000007#define regk_ser_even 0x00000000#define regk_ser_ext 0x00000001#define regk_ser_f100 0x00000007#define regk_ser_f29_493 0x00000004#define regk_ser_f32 0x00000005#define regk_ser_f32_768 0x00000006#define regk_ser_ignore 0x00000001#define regk_ser_inactive 0x00000001#define regk_ser_majority 0x00000001#define regk_ser_mark 0x00000002#define regk_ser_middle 0x00000000#define regk_ser_no 0x00000000#define regk_ser_odd 0x00000001#define regk_ser_off 0x00000000#define regk_ser_rw_intr_mask_default 0x00000000#define regk_ser_rw_rec_baud_div_default 0x00000000#define regk_ser_rw_rec_ctrl_default 0x00010000#define regk_ser_rw_tr_baud_div_default 0x00000000#define regk_ser_rw_tr_ctrl_default 0x00008000#define regk_ser_rw_tr_dma_en_default 0x00000000#define regk_ser_rw_xoff_default 0x00000000#define regk_ser_space 0x00000003#define regk_ser_stop 0x00000000#define regk_ser_yes 0x00000001#endif /* __ser_defs_asm_h */⌨️ 快捷键说明
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