pinmux_defs_asm.h

linux-2.6.15.6

#define reg_pinmux_rw_pc_gio___pc17___lsb 17
#define reg_pinmux_rw_pc_gio___pc17___width 1
#define reg_pinmux_rw_pc_gio___pc17___bit 17
#define reg_pinmux_rw_pc_gio_offset 16

/* Register rw_pc_iop, scope pinmux, type rw */
#define reg_pinmux_rw_pc_iop___pc0___lsb 0
#define reg_pinmux_rw_pc_iop___pc0___width 1
#define reg_pinmux_rw_pc_iop___pc0___bit 0
#define reg_pinmux_rw_pc_iop___pc1___lsb 1
#define reg_pinmux_rw_pc_iop___pc1___width 1
#define reg_pinmux_rw_pc_iop___pc1___bit 1
#define reg_pinmux_rw_pc_iop___pc2___lsb 2
#define reg_pinmux_rw_pc_iop___pc2___width 1
#define reg_pinmux_rw_pc_iop___pc2___bit 2
#define reg_pinmux_rw_pc_iop___pc3___lsb 3
#define reg_pinmux_rw_pc_iop___pc3___width 1
#define reg_pinmux_rw_pc_iop___pc3___bit 3
#define reg_pinmux_rw_pc_iop___pc4___lsb 4
#define reg_pinmux_rw_pc_iop___pc4___width 1
#define reg_pinmux_rw_pc_iop___pc4___bit 4
#define reg_pinmux_rw_pc_iop___pc5___lsb 5
#define reg_pinmux_rw_pc_iop___pc5___width 1
#define reg_pinmux_rw_pc_iop___pc5___bit 5
#define reg_pinmux_rw_pc_iop___pc6___lsb 6
#define reg_pinmux_rw_pc_iop___pc6___width 1
#define reg_pinmux_rw_pc_iop___pc6___bit 6
#define reg_pinmux_rw_pc_iop___pc7___lsb 7
#define reg_pinmux_rw_pc_iop___pc7___width 1
#define reg_pinmux_rw_pc_iop___pc7___bit 7
#define reg_pinmux_rw_pc_iop___pc8___lsb 8
#define reg_pinmux_rw_pc_iop___pc8___width 1
#define reg_pinmux_rw_pc_iop___pc8___bit 8
#define reg_pinmux_rw_pc_iop___pc9___lsb 9
#define reg_pinmux_rw_pc_iop___pc9___width 1
#define reg_pinmux_rw_pc_iop___pc9___bit 9
#define reg_pinmux_rw_pc_iop___pc10___lsb 10
#define reg_pinmux_rw_pc_iop___pc10___width 1
#define reg_pinmux_rw_pc_iop___pc10___bit 10
#define reg_pinmux_rw_pc_iop___pc11___lsb 11
#define reg_pinmux_rw_pc_iop___pc11___width 1
#define reg_pinmux_rw_pc_iop___pc11___bit 11
#define reg_pinmux_rw_pc_iop___pc12___lsb 12
#define reg_pinmux_rw_pc_iop___pc12___width 1
#define reg_pinmux_rw_pc_iop___pc12___bit 12
#define reg_pinmux_rw_pc_iop___pc13___lsb 13
#define reg_pinmux_rw_pc_iop___pc13___width 1
#define reg_pinmux_rw_pc_iop___pc13___bit 13
#define reg_pinmux_rw_pc_iop___pc14___lsb 14
#define reg_pinmux_rw_pc_iop___pc14___width 1
#define reg_pinmux_rw_pc_iop___pc14___bit 14
#define reg_pinmux_rw_pc_iop___pc15___lsb 15
#define reg_pinmux_rw_pc_iop___pc15___width 1
#define reg_pinmux_rw_pc_iop___pc15___bit 15
#define reg_pinmux_rw_pc_iop___pc16___lsb 16
#define reg_pinmux_rw_pc_iop___pc16___width 1
#define reg_pinmux_rw_pc_iop___pc16___bit 16
#define reg_pinmux_rw_pc_iop___pc17___lsb 17
#define reg_pinmux_rw_pc_iop___pc17___width 1
#define reg_pinmux_rw_pc_iop___pc17___bit 17
#define reg_pinmux_rw_pc_iop_offset 20

/* Register rw_pd_gio, scope pinmux, type rw */
#define reg_pinmux_rw_pd_gio___pd0___lsb 0
#define reg_pinmux_rw_pd_gio___pd0___width 1
#define reg_pinmux_rw_pd_gio___pd0___bit 0
#define reg_pinmux_rw_pd_gio___pd1___lsb 1
#define reg_pinmux_rw_pd_gio___pd1___width 1
#define reg_pinmux_rw_pd_gio___pd1___bit 1
#define reg_pinmux_rw_pd_gio___pd2___lsb 2
#define reg_pinmux_rw_pd_gio___pd2___width 1
#define reg_pinmux_rw_pd_gio___pd2___bit 2
#define reg_pinmux_rw_pd_gio___pd3___lsb 3
#define reg_pinmux_rw_pd_gio___pd3___width 1
#define reg_pinmux_rw_pd_gio___pd3___bit 3
#define reg_pinmux_rw_pd_gio___pd4___lsb 4
#define reg_pinmux_rw_pd_gio___pd4___width 1
#define reg_pinmux_rw_pd_gio___pd4___bit 4
#define reg_pinmux_rw_pd_gio___pd5___lsb 5
#define reg_pinmux_rw_pd_gio___pd5___width 1
#define reg_pinmux_rw_pd_gio___pd5___bit 5
#define reg_pinmux_rw_pd_gio___pd6___lsb 6
#define reg_pinmux_rw_pd_gio___pd6___width 1
#define reg_pinmux_rw_pd_gio___pd6___bit 6
#define reg_pinmux_rw_pd_gio___pd7___lsb 7
#define reg_pinmux_rw_pd_gio___pd7___width 1
#define reg_pinmux_rw_pd_gio___pd7___bit 7
#define reg_pinmux_rw_pd_gio___pd8___lsb 8
#define reg_pinmux_rw_pd_gio___pd8___width 1
#define reg_pinmux_rw_pd_gio___pd8___bit 8
#define reg_pinmux_rw_pd_gio___pd9___lsb 9
#define reg_pinmux_rw_pd_gio___pd9___width 1
#define reg_pinmux_rw_pd_gio___pd9___bit 9
#define reg_pinmux_rw_pd_gio___pd10___lsb 10
#define reg_pinmux_rw_pd_gio___pd10___width 1
#define reg_pinmux_rw_pd_gio___pd10___bit 10
#define reg_pinmux_rw_pd_gio___pd11___lsb 11
#define reg_pinmux_rw_pd_gio___pd11___width 1
#define reg_pinmux_rw_pd_gio___pd11___bit 11
#define reg_pinmux_rw_pd_gio___pd12___lsb 12
#define reg_pinmux_rw_pd_gio___pd12___width 1
#define reg_pinmux_rw_pd_gio___pd12___bit 12
#define reg_pinmux_rw_pd_gio___pd13___lsb 13
#define reg_pinmux_rw_pd_gio___pd13___width 1
#define reg_pinmux_rw_pd_gio___pd13___bit 13
#define reg_pinmux_rw_pd_gio___pd14___lsb 14
#define reg_pinmux_rw_pd_gio___pd14___width 1
#define reg_pinmux_rw_pd_gio___pd14___bit 14
#define reg_pinmux_rw_pd_gio___pd15___lsb 15
#define reg_pinmux_rw_pd_gio___pd15___width 1
#define reg_pinmux_rw_pd_gio___pd15___bit 15
#define reg_pinmux_rw_pd_gio___pd16___lsb 16
#define reg_pinmux_rw_pd_gio___pd16___width 1
#define reg_pinmux_rw_pd_gio___pd16___bit 16
#define reg_pinmux_rw_pd_gio___pd17___lsb 17
#define reg_pinmux_rw_pd_gio___pd17___width 1
#define reg_pinmux_rw_pd_gio___pd17___bit 17
#define reg_pinmux_rw_pd_gio_offset 24

/* Register rw_pd_iop, scope pinmux, type rw */
#define reg_pinmux_rw_pd_iop___pd0___lsb 0
#define reg_pinmux_rw_pd_iop___pd0___width 1
#define reg_pinmux_rw_pd_iop___pd0___bit 0
#define reg_pinmux_rw_pd_iop___pd1___lsb 1
#define reg_pinmux_rw_pd_iop___pd1___width 1
#define reg_pinmux_rw_pd_iop___pd1___bit 1
#define reg_pinmux_rw_pd_iop___pd2___lsb 2
#define reg_pinmux_rw_pd_iop___pd2___width 1
#define reg_pinmux_rw_pd_iop___pd2___bit 2
#define reg_pinmux_rw_pd_iop___pd3___lsb 3
#define reg_pinmux_rw_pd_iop___pd3___width 1
#define reg_pinmux_rw_pd_iop___pd3___bit 3
#define reg_pinmux_rw_pd_iop___pd4___lsb 4
#define reg_pinmux_rw_pd_iop___pd4___width 1
#define reg_pinmux_rw_pd_iop___pd4___bit 4
#define reg_pinmux_rw_pd_iop___pd5___lsb 5
#define reg_pinmux_rw_pd_iop___pd5___width 1
#define reg_pinmux_rw_pd_iop___pd5___bit 5
#define reg_pinmux_rw_pd_iop___pd6___lsb 6
#define reg_pinmux_rw_pd_iop___pd6___width 1
#define reg_pinmux_rw_pd_iop___pd6___bit 6
#define reg_pinmux_rw_pd_iop___pd7___lsb 7
#define reg_pinmux_rw_pd_iop___pd7___width 1
#define reg_pinmux_rw_pd_iop___pd7___bit 7
#define reg_pinmux_rw_pd_iop___pd8___lsb 8
#define reg_pinmux_rw_pd_iop___pd8___width 1
#define reg_pinmux_rw_pd_iop___pd8___bit 8
#define reg_pinmux_rw_pd_iop___pd9___lsb 9
#define reg_pinmux_rw_pd_iop___pd9___width 1
#define reg_pinmux_rw_pd_iop___pd9___bit 9
#define reg_pinmux_rw_pd_iop___pd10___lsb 10
#define reg_pinmux_rw_pd_iop___pd10___width 1
#define reg_pinmux_rw_pd_iop___pd10___bit 10
#define reg_pinmux_rw_pd_iop___pd11___lsb 11
#define reg_pinmux_rw_pd_iop___pd11___width 1
#define reg_pinmux_rw_pd_iop___pd11___bit 11
#define reg_pinmux_rw_pd_iop___pd12___lsb 12
#define reg_pinmux_rw_pd_iop___pd12___width 1
#define reg_pinmux_rw_pd_iop___pd12___bit 12
#define reg_pinmux_rw_pd_iop___pd13___lsb 13
#define reg_pinmux_rw_pd_iop___pd13___width 1
#define reg_pinmux_rw_pd_iop___pd13___bit 13
#define reg_pinmux_rw_pd_iop___pd14___lsb 14
#define reg_pinmux_rw_pd_iop___pd14___width 1
#define reg_pinmux_rw_pd_iop___pd14___bit 14
#define reg_pinmux_rw_pd_iop___pd15___lsb 15
#define reg_pinmux_rw_pd_iop___pd15___width 1
#define reg_pinmux_rw_pd_iop___pd15___bit 15
#define reg_pinmux_rw_pd_iop___pd16___lsb 16
#define reg_pinmux_rw_pd_iop___pd16___width 1
#define reg_pinmux_rw_pd_iop___pd16___bit 16
#define reg_pinmux_rw_pd_iop___pd17___lsb 17
#define reg_pinmux_rw_pd_iop___pd17___width 1
#define reg_pinmux_rw_pd_iop___pd17___bit 17
#define reg_pinmux_rw_pd_iop_offset 28

/* Register rw_pe_gio, scope pinmux, type rw */
#define reg_pinmux_rw_pe_gio___pe0___lsb 0
#define reg_pinmux_rw_pe_gio___pe0___width 1
#define reg_pinmux_rw_pe_gio___pe0___bit 0
#define reg_pinmux_rw_pe_gio___pe1___lsb 1
#define reg_pinmux_rw_pe_gio___pe1___width 1
#define reg_pinmux_rw_pe_gio___pe1___bit 1
#define reg_pinmux_rw_pe_gio___pe2___lsb 2
#define reg_pinmux_rw_pe_gio___pe2___width 1
#define reg_pinmux_rw_pe_gio___pe2___bit 2
#define reg_pinmux_rw_pe_gio___pe3___lsb 3
#define reg_pinmux_rw_pe_gio___pe3___width 1
#define reg_pinmux_rw_pe_gio___pe3___bit 3
#define reg_pinmux_rw_pe_gio___pe4___lsb 4
#define reg_pinmux_rw_pe_gio___pe4___width 1
#define reg_pinmux_rw_pe_gio___pe4___bit 4
#define reg_pinmux_rw_pe_gio___pe5___lsb 5
#define reg_pinmux_rw_pe_gio___pe5___width 1
#define reg_pinmux_rw_pe_gio___pe5___bit 5
#define reg_pinmux_rw_pe_gio___pe6___lsb 6
#define reg_pinmux_rw_pe_gio___pe6___width 1
#define reg_pinmux_rw_pe_gio___pe6___bit 6
#define reg_pinmux_rw_pe_gio___pe7___lsb 7
#define reg_pinmux_rw_pe_gio___pe7___width 1
#define reg_pinmux_rw_pe_gio___pe7___bit 7
#define reg_pinmux_rw_pe_gio___pe8___lsb 8
#define reg_pinmux_rw_pe_gio___pe8___width 1
#define reg_pinmux_rw_pe_gio___pe8___bit 8
#define reg_pinmux_rw_pe_gio___pe9___lsb 9
#define reg_pinmux_rw_pe_gio___pe9___width 1
#define reg_pinmux_rw_pe_gio___pe9___bit 9
#define reg_pinmux_rw_pe_gio___pe10___lsb 10
#define reg_pinmux_rw_pe_gio___pe10___width 1
#define reg_pinmux_rw_pe_gio___pe10___bit 10
#define reg_pinmux_rw_pe_gio___pe11___lsb 11
#define reg_pinmux_rw_pe_gio___pe11___width 1
#define reg_pinmux_rw_pe_gio___pe11___bit 11
#define reg_pinmux_rw_pe_gio___pe12___lsb 12
#define reg_pinmux_rw_pe_gio___pe12___width 1
#define reg_pinmux_rw_pe_gio___pe12___bit 12
#define reg_pinmux_rw_pe_gio___pe13___lsb 13
#define reg_pinmux_rw_pe_gio___pe13___width 1
#define reg_pinmux_rw_pe_gio___pe13___bit 13
#define reg_pinmux_rw_pe_gio___pe14___lsb 14
#define reg_pinmux_rw_pe_gio___pe14___width 1
#define reg_pinmux_rw_pe_gio___pe14___bit 14
#define reg_pinmux_rw_pe_gio___pe15___lsb 15
#define reg_pinmux_rw_pe_gio___pe15___width 1
#define reg_pinmux_rw_pe_gio___pe15___bit 15
#define reg_pinmux_rw_pe_gio___pe16___lsb 16
#define reg_pinmux_rw_pe_gio___pe16___width 1
#define reg_pinmux_rw_pe_gio___pe16___bit 16
#define reg_pinmux_rw_pe_gio___pe17___lsb 17
#define reg_pinmux_rw_pe_gio___pe17___width 1
#define reg_pinmux_rw_pe_gio___pe17___bit 17
#define reg_pinmux_rw_pe_gio_offset 32

/* Register rw_pe_iop, scope pinmux, type rw */
#define reg_pinmux_rw_pe_iop___pe0___lsb 0
#define reg_pinmux_rw_pe_iop___pe0___width 1
#define reg_pinmux_rw_pe_iop___pe0___bit 0
#define reg_pinmux_rw_pe_iop___pe1___lsb 1
#define reg_pinmux_rw_pe_iop___pe1___width 1
#define reg_pinmux_rw_pe_iop___pe1___bit 1
#define reg_pinmux_rw_pe_iop___pe2___lsb 2
#define reg_pinmux_rw_pe_iop___pe2___width 1
#define reg_pinmux_rw_pe_iop___pe2___bit 2
#define reg_pinmux_rw_pe_iop___pe3___lsb 3
#define reg_pinmux_rw_pe_iop___pe3___width 1
#define reg_pinmux_rw_pe_iop___pe3___bit 3
#define reg_pinmux_rw_pe_iop___pe4___lsb 4
#define reg_pinmux_rw_pe_iop___pe4___width 1
#define reg_pinmux_rw_pe_iop___pe4___bit 4
#define reg_pinmux_rw_pe_iop___pe5___lsb 5
#define reg_pinmux_rw_pe_iop___pe5___width 1
#define reg_pinmux_rw_pe_iop___pe5___bit 5
#define reg_pinmux_rw_pe_iop___pe6___lsb 6
#define reg_pinmux_rw_pe_iop___pe6___width 1
#define reg_pinmux_rw_pe_iop___pe6___bit 6
#define reg_pinmux_rw_pe_iop___pe7___lsb 7
#define reg_pinmux_rw_pe_iop___pe7___width 1
#define reg_pinmux_rw_pe_iop___pe7___bit 7
#define reg_pinmux_rw_pe_iop___pe8___lsb 8
#define reg_pinmux_rw_pe_iop___pe8___width 1
#define reg_pinmux_rw_pe_iop___pe8___bit 8
#define reg_pinmux_rw_pe_iop___pe9___lsb 9
#define reg_pinmux_rw_pe_iop___pe9___width 1
#define reg_pinmux_rw_pe_iop___pe9___bit 9
#define reg_pinmux_rw_pe_iop___pe10___lsb 10
#define reg_pinmux_rw_pe_iop___pe10___width 1
#define reg_pinmux_rw_pe_iop___pe10___bit 10
#define reg_pinmux_rw_pe_iop___pe11___lsb 11
#define reg_pinmux_rw_pe_iop___pe11___width 1
#define reg_pinmux_rw_pe_iop___pe11___bit 11
#define reg_pinmux_rw_pe_iop___pe12___lsb 12
#define reg_pinmux_rw_pe_iop___pe12___width 1
#define reg_pinmux_rw_pe_iop___pe12___bit 12
#define reg_pinmux_rw_pe_iop___pe13___lsb 13
#define reg_pinmux_rw_pe_iop___pe13___width 1
#define reg_pinmux_rw_pe_iop___pe13___bit 13
#define reg_pinmux_rw_pe_iop___pe14___lsb 14
#define reg_pinmux_rw_pe_iop___pe14___width 1
#define reg_pinmux_rw_pe_iop___pe14___bit 14
#define reg_pinmux_rw_pe_iop___pe15___lsb 15
#define reg_pinmux_rw_pe_iop___pe15___width 1
#define reg_pinmux_rw_pe_iop___pe15___bit 15
#define reg_pinmux_rw_pe_iop___pe16___lsb 16
#define reg_pinmux_rw_pe_iop___pe16___width 1
#define reg_pinmux_rw_pe_iop___pe16___bit 16
#define reg_pinmux_rw_pe_iop___pe17___lsb 17
#define reg_pinmux_rw_pe_iop___pe17___width 1
#define reg_pinmux_rw_pe_iop___pe17___bit 17
#define reg_pinmux_rw_pe_iop_offset 36

/* Register rw_usb_phy, scope pinmux, type rw */
#define reg_pinmux_rw_usb_phy___en_usb0___lsb 0
#define reg_pinmux_rw_usb_phy___en_usb0___width 1
#define reg_pinmux_rw_usb_phy___en_usb0___bit 0
#define reg_pinmux_rw_usb_phy___en_usb1___lsb 1
#define reg_pinmux_rw_usb_phy___en_usb1___width 1
#define reg_pinmux_rw_usb_phy___en_usb1___bit 1
#define reg_pinmux_rw_usb_phy_offset 40


/* Constants */
#define regk_pinmux_no                            0x00000000
#define regk_pinmux_rw_hwprot_default             0x00000000
#define regk_pinmux_rw_pa_default                 0x00000000
#define regk_pinmux_rw_pb_gio_default             0x00000000
#define regk_pinmux_rw_pb_iop_default             0x00000000
#define regk_pinmux_rw_pc_gio_default             0x00000000
#define regk_pinmux_rw_pc_iop_default             0x00000000
#define regk_pinmux_rw_pd_gio_default             0x00000000
#define regk_pinmux_rw_pd_iop_default             0x00000000
#define regk_pinmux_rw_pe_gio_default             0x00000000
#define regk_pinmux_rw_pe_iop_default             0x00000000
#define regk_pinmux_rw_usb_phy_default            0x00000000
#define regk_pinmux_yes                           0x00000001
#endif /* __pinmux_defs_asm_h */