iop_sw_cfg_defs.h

linux-2.6.15.6

#define REG_WR_ADDR_iop_sw_cfg_rw_trigger_grp6_owner 128

/* Register rw_trigger_grp7_owner, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int cfg : 2;
  unsigned int dummy1 : 30;
} reg_iop_sw_cfg_rw_trigger_grp7_owner;
#define REG_RD_ADDR_iop_sw_cfg_rw_trigger_grp7_owner 132
#define REG_WR_ADDR_iop_sw_cfg_rw_trigger_grp7_owner 132

/* Register rw_bus0_mask, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int byte0 : 8;
  unsigned int byte1 : 8;
  unsigned int byte2 : 8;
  unsigned int byte3 : 8;
} reg_iop_sw_cfg_rw_bus0_mask;
#define REG_RD_ADDR_iop_sw_cfg_rw_bus0_mask 136
#define REG_WR_ADDR_iop_sw_cfg_rw_bus0_mask 136

/* Register rw_bus0_oe_mask, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int byte0 : 1;
  unsigned int byte1 : 1;
  unsigned int byte2 : 1;
  unsigned int byte3 : 1;
  unsigned int dummy1 : 28;
} reg_iop_sw_cfg_rw_bus0_oe_mask;
#define REG_RD_ADDR_iop_sw_cfg_rw_bus0_oe_mask 140
#define REG_WR_ADDR_iop_sw_cfg_rw_bus0_oe_mask 140

/* Register rw_bus1_mask, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int byte0 : 8;
  unsigned int byte1 : 8;
  unsigned int byte2 : 8;
  unsigned int byte3 : 8;
} reg_iop_sw_cfg_rw_bus1_mask;
#define REG_RD_ADDR_iop_sw_cfg_rw_bus1_mask 144
#define REG_WR_ADDR_iop_sw_cfg_rw_bus1_mask 144

/* Register rw_bus1_oe_mask, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int byte0 : 1;
  unsigned int byte1 : 1;
  unsigned int byte2 : 1;
  unsigned int byte3 : 1;
  unsigned int dummy1 : 28;
} reg_iop_sw_cfg_rw_bus1_oe_mask;
#define REG_RD_ADDR_iop_sw_cfg_rw_bus1_oe_mask 148
#define REG_WR_ADDR_iop_sw_cfg_rw_bus1_oe_mask 148

/* Register rw_gio_mask, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int val : 32;
} reg_iop_sw_cfg_rw_gio_mask;
#define REG_RD_ADDR_iop_sw_cfg_rw_gio_mask 152
#define REG_WR_ADDR_iop_sw_cfg_rw_gio_mask 152

/* Register rw_gio_oe_mask, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int val : 32;
} reg_iop_sw_cfg_rw_gio_oe_mask;
#define REG_RD_ADDR_iop_sw_cfg_rw_gio_oe_mask 156
#define REG_WR_ADDR_iop_sw_cfg_rw_gio_oe_mask 156

/* Register rw_pinmapping, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int bus0_byte0 : 2;
  unsigned int bus0_byte1 : 2;
  unsigned int bus0_byte2 : 2;
  unsigned int bus0_byte3 : 2;
  unsigned int bus1_byte0 : 2;
  unsigned int bus1_byte1 : 2;
  unsigned int bus1_byte2 : 2;
  unsigned int bus1_byte3 : 2;
  unsigned int gio3_0     : 2;
  unsigned int gio7_4     : 2;
  unsigned int gio11_8    : 2;
  unsigned int gio15_12   : 2;
  unsigned int gio19_16   : 2;
  unsigned int gio23_20   : 2;
  unsigned int gio27_24   : 2;
  unsigned int gio31_28   : 2;
} reg_iop_sw_cfg_rw_pinmapping;
#define REG_RD_ADDR_iop_sw_cfg_rw_pinmapping 160
#define REG_WR_ADDR_iop_sw_cfg_rw_pinmapping 160

/* Register rw_bus_out_cfg, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int bus0_lo    : 3;
  unsigned int bus0_hi    : 3;
  unsigned int bus0_lo_oe : 3;
  unsigned int bus0_hi_oe : 3;
  unsigned int bus1_lo    : 3;
  unsigned int bus1_hi    : 3;
  unsigned int bus1_lo_oe : 3;
  unsigned int bus1_hi_oe : 3;
  unsigned int dummy1     : 8;
} reg_iop_sw_cfg_rw_bus_out_cfg;
#define REG_RD_ADDR_iop_sw_cfg_rw_bus_out_cfg 164
#define REG_WR_ADDR_iop_sw_cfg_rw_bus_out_cfg 164

/* Register rw_gio_out_grp0_cfg, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int gio0    : 4;
  unsigned int gio0_oe : 2;
  unsigned int gio1    : 4;
  unsigned int gio1_oe : 2;
  unsigned int gio2    : 4;
  unsigned int gio2_oe : 2;
  unsigned int gio3    : 4;
  unsigned int gio3_oe : 2;
  unsigned int dummy1  : 8;
} reg_iop_sw_cfg_rw_gio_out_grp0_cfg;
#define REG_RD_ADDR_iop_sw_cfg_rw_gio_out_grp0_cfg 168
#define REG_WR_ADDR_iop_sw_cfg_rw_gio_out_grp0_cfg 168

/* Register rw_gio_out_grp1_cfg, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int gio4    : 4;
  unsigned int gio4_oe : 2;
  unsigned int gio5    : 4;
  unsigned int gio5_oe : 2;
  unsigned int gio6    : 4;
  unsigned int gio6_oe : 2;
  unsigned int gio7    : 4;
  unsigned int gio7_oe : 2;
  unsigned int dummy1  : 8;
} reg_iop_sw_cfg_rw_gio_out_grp1_cfg;
#define REG_RD_ADDR_iop_sw_cfg_rw_gio_out_grp1_cfg 172
#define REG_WR_ADDR_iop_sw_cfg_rw_gio_out_grp1_cfg 172

/* Register rw_gio_out_grp2_cfg, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int gio8     : 4;
  unsigned int gio8_oe  : 2;
  unsigned int gio9     : 4;
  unsigned int gio9_oe  : 2;
  unsigned int gio10    : 4;
  unsigned int gio10_oe : 2;
  unsigned int gio11    : 4;
  unsigned int gio11_oe : 2;
  unsigned int dummy1   : 8;
} reg_iop_sw_cfg_rw_gio_out_grp2_cfg;
#define REG_RD_ADDR_iop_sw_cfg_rw_gio_out_grp2_cfg 176
#define REG_WR_ADDR_iop_sw_cfg_rw_gio_out_grp2_cfg 176

/* Register rw_gio_out_grp3_cfg, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int gio12    : 4;
  unsigned int gio12_oe : 2;
  unsigned int gio13    : 4;
  unsigned int gio13_oe : 2;
  unsigned int gio14    : 4;
  unsigned int gio14_oe : 2;
  unsigned int gio15    : 4;
  unsigned int gio15_oe : 2;
  unsigned int dummy1   : 8;
} reg_iop_sw_cfg_rw_gio_out_grp3_cfg;
#define REG_RD_ADDR_iop_sw_cfg_rw_gio_out_grp3_cfg 180
#define REG_WR_ADDR_iop_sw_cfg_rw_gio_out_grp3_cfg 180

/* Register rw_gio_out_grp4_cfg, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int gio16    : 4;
  unsigned int gio16_oe : 2;
  unsigned int gio17    : 4;
  unsigned int gio17_oe : 2;
  unsigned int gio18    : 4;
  unsigned int gio18_oe : 2;
  unsigned int gio19    : 4;
  unsigned int gio19_oe : 2;
  unsigned int dummy1   : 8;
} reg_iop_sw_cfg_rw_gio_out_grp4_cfg;
#define REG_RD_ADDR_iop_sw_cfg_rw_gio_out_grp4_cfg 184
#define REG_WR_ADDR_iop_sw_cfg_rw_gio_out_grp4_cfg 184

/* Register rw_gio_out_grp5_cfg, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int gio20    : 4;
  unsigned int gio20_oe : 2;
  unsigned int gio21    : 4;
  unsigned int gio21_oe : 2;
  unsigned int gio22    : 4;
  unsigned int gio22_oe : 2;
  unsigned int gio23    : 4;
  unsigned int gio23_oe : 2;
  unsigned int dummy1   : 8;
} reg_iop_sw_cfg_rw_gio_out_grp5_cfg;
#define REG_RD_ADDR_iop_sw_cfg_rw_gio_out_grp5_cfg 188
#define REG_WR_ADDR_iop_sw_cfg_rw_gio_out_grp5_cfg 188

/* Register rw_gio_out_grp6_cfg, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int gio24    : 4;
  unsigned int gio24_oe : 2;
  unsigned int gio25    : 4;
  unsigned int gio25_oe : 2;
  unsigned int gio26    : 4;
  unsigned int gio26_oe : 2;
  unsigned int gio27    : 4;
  unsigned int gio27_oe : 2;
  unsigned int dummy1   : 8;
} reg_iop_sw_cfg_rw_gio_out_grp6_cfg;
#define REG_RD_ADDR_iop_sw_cfg_rw_gio_out_grp6_cfg 192
#define REG_WR_ADDR_iop_sw_cfg_rw_gio_out_grp6_cfg 192

/* Register rw_gio_out_grp7_cfg, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int gio28    : 4;
  unsigned int gio28_oe : 2;
  unsigned int gio29    : 4;
  unsigned int gio29_oe : 2;
  unsigned int gio30    : 4;
  unsigned int gio30_oe : 2;
  unsigned int gio31    : 4;
  unsigned int gio31_oe : 2;
  unsigned int dummy1   : 8;
} reg_iop_sw_cfg_rw_gio_out_grp7_cfg;
#define REG_RD_ADDR_iop_sw_cfg_rw_gio_out_grp7_cfg 196
#define REG_WR_ADDR_iop_sw_cfg_rw_gio_out_grp7_cfg 196

/* Register rw_spu0_cfg, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int bus0_in : 2;
  unsigned int bus1_in : 2;
  unsigned int dummy1  : 28;
} reg_iop_sw_cfg_rw_spu0_cfg;
#define REG_RD_ADDR_iop_sw_cfg_rw_spu0_cfg 200
#define REG_WR_ADDR_iop_sw_cfg_rw_spu0_cfg 200

/* Register rw_spu1_cfg, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int bus0_in : 2;
  unsigned int bus1_in : 2;
  unsigned int dummy1  : 28;
} reg_iop_sw_cfg_rw_spu1_cfg;
#define REG_RD_ADDR_iop_sw_cfg_rw_spu1_cfg 204
#define REG_WR_ADDR_iop_sw_cfg_rw_spu1_cfg 204

/* Register rw_timer_grp0_cfg, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int ext_clk  : 3;
  unsigned int tmr0_en  : 1;
  unsigned int tmr1_en  : 1;
  unsigned int tmr2_en  : 1;
  unsigned int tmr3_en  : 1;
  unsigned int tmr0_dis : 1;
  unsigned int tmr1_dis : 1;
  unsigned int tmr2_dis : 1;
  unsigned int tmr3_dis : 1;
  unsigned int dummy1   : 21;
} reg_iop_sw_cfg_rw_timer_grp0_cfg;
#define REG_RD_ADDR_iop_sw_cfg_rw_timer_grp0_cfg 208
#define REG_WR_ADDR_iop_sw_cfg_rw_timer_grp0_cfg 208

/* Register rw_timer_grp1_cfg, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int ext_clk  : 3;
  unsigned int tmr0_en  : 1;
  unsigned int tmr1_en  : 1;
  unsigned int tmr2_en  : 1;
  unsigned int tmr3_en  : 1;
  unsigned int tmr0_dis : 1;
  unsigned int tmr1_dis : 1;
  unsigned int tmr2_dis : 1;
  unsigned int tmr3_dis : 1;
  unsigned int dummy1   : 21;
} reg_iop_sw_cfg_rw_timer_grp1_cfg;
#define REG_RD_ADDR_iop_sw_cfg_rw_timer_grp1_cfg 212
#define REG_WR_ADDR_iop_sw_cfg_rw_timer_grp1_cfg 212

/* Register rw_timer_grp2_cfg, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int ext_clk  : 3;
  unsigned int tmr0_en  : 1;
  unsigned int tmr1_en  : 1;
  unsigned int tmr2_en  : 1;
  unsigned int tmr3_en  : 1;
  unsigned int tmr0_dis : 1;
  unsigned int tmr1_dis : 1;
  unsigned int tmr2_dis : 1;
  unsigned int tmr3_dis : 1;
  unsigned int dummy1   : 21;
} reg_iop_sw_cfg_rw_timer_grp2_cfg;
#define REG_RD_ADDR_iop_sw_cfg_rw_timer_grp2_cfg 216
#define REG_WR_ADDR_iop_sw_cfg_rw_timer_grp2_cfg 216

/* Register rw_timer_grp3_cfg, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int ext_clk  : 3;
  unsigned int tmr0_en  : 1;
  unsigned int tmr1_en  : 1;
  unsigned int tmr2_en  : 1;
  unsigned int tmr3_en  : 1;
  unsigned int tmr0_dis : 1;
  unsigned int tmr1_dis : 1;
  unsigned int tmr2_dis : 1;
  unsigned int tmr3_dis : 1;
  unsigned int dummy1   : 21;
} reg_iop_sw_cfg_rw_timer_grp3_cfg;
#define REG_RD_ADDR_iop_sw_cfg_rw_timer_grp3_cfg 220
#define REG_WR_ADDR_iop_sw_cfg_rw_timer_grp3_cfg 220

/* Register rw_trigger_grps_cfg, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int grp0_dis : 1;
  unsigned int grp0_en  : 1;
  unsigned int grp1_dis : 1;
  unsigned int grp1_en  : 1;
  unsigned int grp2_dis : 1;
  unsigned int grp2_en  : 1;
  unsigned int grp3_dis : 1;
  unsigned int grp3_en  : 1;
  unsigned int grp4_dis : 1;
  unsigned int grp4_en  : 1;
  unsigned int grp5_dis : 1;
  unsigned int grp5_en  : 1;
  unsigned int grp6_dis : 1;
  unsigned int grp6_en  : 1;
  unsigned int grp7_dis : 1;
  unsigned int grp7_en  : 1;
  unsigned int dummy1   : 16;
} reg_iop_sw_cfg_rw_trigger_grps_cfg;
#define REG_RD_ADDR_iop_sw_cfg_rw_trigger_grps_cfg 224
#define REG_WR_ADDR_iop_sw_cfg_rw_trigger_grps_cfg 224

/* Register rw_pdp0_cfg, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int dmc0_usr : 1;
  unsigned int out_strb : 5;
  unsigned int in_src   : 3;
  unsigned int in_size  : 3;
  unsigned int in_last  : 2;
  unsigned int in_strb  : 4;
  unsigned int out_src  : 1;
  unsigned int dummy1   : 13;
} reg_iop_sw_cfg_rw_pdp0_cfg;
#define REG_RD_ADDR_iop_sw_cfg_rw_pdp0_cfg 228
#define REG_WR_ADDR_iop_sw_cfg_rw_pdp0_cfg 228

/* Register rw_pdp1_cfg, scope iop_sw_cfg, type rw */
typedef struct {
  unsigned int dmc1_usr : 1;
  unsigned int out_strb : 5;
  unsigned int in_src   : 3;
  unsigned int in_size  : 3;