iop_dmc_out_defs_asm.h

linux-2.6.15.6

/* Register rw_group_descr, scope iop_dmc_out, type rw */
#define reg_iop_dmc_out_rw_group_descr___md___lsb 16
#define reg_iop_dmc_out_rw_group_descr___md___width 16
#define reg_iop_dmc_out_rw_group_descr_offset 80

/* Register rw_intr_mask, scope iop_dmc_out, type rw */
#define reg_iop_dmc_out_rw_intr_mask___data_md___lsb 0
#define reg_iop_dmc_out_rw_intr_mask___data_md___width 1
#define reg_iop_dmc_out_rw_intr_mask___data_md___bit 0
#define reg_iop_dmc_out_rw_intr_mask___ctxt_md___lsb 1
#define reg_iop_dmc_out_rw_intr_mask___ctxt_md___width 1
#define reg_iop_dmc_out_rw_intr_mask___ctxt_md___bit 1
#define reg_iop_dmc_out_rw_intr_mask___group_md___lsb 2
#define reg_iop_dmc_out_rw_intr_mask___group_md___width 1
#define reg_iop_dmc_out_rw_intr_mask___group_md___bit 2
#define reg_iop_dmc_out_rw_intr_mask___cmd_rdy___lsb 3
#define reg_iop_dmc_out_rw_intr_mask___cmd_rdy___width 1
#define reg_iop_dmc_out_rw_intr_mask___cmd_rdy___bit 3
#define reg_iop_dmc_out_rw_intr_mask___dth___lsb 4
#define reg_iop_dmc_out_rw_intr_mask___dth___width 1
#define reg_iop_dmc_out_rw_intr_mask___dth___bit 4
#define reg_iop_dmc_out_rw_intr_mask___dv___lsb 5
#define reg_iop_dmc_out_rw_intr_mask___dv___width 1
#define reg_iop_dmc_out_rw_intr_mask___dv___bit 5
#define reg_iop_dmc_out_rw_intr_mask___last_data___lsb 6
#define reg_iop_dmc_out_rw_intr_mask___last_data___width 1
#define reg_iop_dmc_out_rw_intr_mask___last_data___bit 6
#define reg_iop_dmc_out_rw_intr_mask___trf_lim___lsb 7
#define reg_iop_dmc_out_rw_intr_mask___trf_lim___width 1
#define reg_iop_dmc_out_rw_intr_mask___trf_lim___bit 7
#define reg_iop_dmc_out_rw_intr_mask___cmd_rq___lsb 8
#define reg_iop_dmc_out_rw_intr_mask___cmd_rq___width 1
#define reg_iop_dmc_out_rw_intr_mask___cmd_rq___bit 8
#define reg_iop_dmc_out_rw_intr_mask_offset 84

/* Register rw_ack_intr, scope iop_dmc_out, type rw */
#define reg_iop_dmc_out_rw_ack_intr___data_md___lsb 0
#define reg_iop_dmc_out_rw_ack_intr___data_md___width 1
#define reg_iop_dmc_out_rw_ack_intr___data_md___bit 0
#define reg_iop_dmc_out_rw_ack_intr___ctxt_md___lsb 1
#define reg_iop_dmc_out_rw_ack_intr___ctxt_md___width 1
#define reg_iop_dmc_out_rw_ack_intr___ctxt_md___bit 1
#define reg_iop_dmc_out_rw_ack_intr___group_md___lsb 2
#define reg_iop_dmc_out_rw_ack_intr___group_md___width 1
#define reg_iop_dmc_out_rw_ack_intr___group_md___bit 2
#define reg_iop_dmc_out_rw_ack_intr___cmd_rdy___lsb 3
#define reg_iop_dmc_out_rw_ack_intr___cmd_rdy___width 1
#define reg_iop_dmc_out_rw_ack_intr___cmd_rdy___bit 3
#define reg_iop_dmc_out_rw_ack_intr___dth___lsb 4
#define reg_iop_dmc_out_rw_ack_intr___dth___width 1
#define reg_iop_dmc_out_rw_ack_intr___dth___bit 4
#define reg_iop_dmc_out_rw_ack_intr___dv___lsb 5
#define reg_iop_dmc_out_rw_ack_intr___dv___width 1
#define reg_iop_dmc_out_rw_ack_intr___dv___bit 5
#define reg_iop_dmc_out_rw_ack_intr___last_data___lsb 6
#define reg_iop_dmc_out_rw_ack_intr___last_data___width 1
#define reg_iop_dmc_out_rw_ack_intr___last_data___bit 6
#define reg_iop_dmc_out_rw_ack_intr___trf_lim___lsb 7
#define reg_iop_dmc_out_rw_ack_intr___trf_lim___width 1
#define reg_iop_dmc_out_rw_ack_intr___trf_lim___bit 7
#define reg_iop_dmc_out_rw_ack_intr___cmd_rq___lsb 8
#define reg_iop_dmc_out_rw_ack_intr___cmd_rq___width 1
#define reg_iop_dmc_out_rw_ack_intr___cmd_rq___bit 8
#define reg_iop_dmc_out_rw_ack_intr_offset 88

/* Register r_intr, scope iop_dmc_out, type r */
#define reg_iop_dmc_out_r_intr___data_md___lsb 0
#define reg_iop_dmc_out_r_intr___data_md___width 1
#define reg_iop_dmc_out_r_intr___data_md___bit 0
#define reg_iop_dmc_out_r_intr___ctxt_md___lsb 1
#define reg_iop_dmc_out_r_intr___ctxt_md___width 1
#define reg_iop_dmc_out_r_intr___ctxt_md___bit 1
#define reg_iop_dmc_out_r_intr___group_md___lsb 2
#define reg_iop_dmc_out_r_intr___group_md___width 1
#define reg_iop_dmc_out_r_intr___group_md___bit 2
#define reg_iop_dmc_out_r_intr___cmd_rdy___lsb 3
#define reg_iop_dmc_out_r_intr___cmd_rdy___width 1
#define reg_iop_dmc_out_r_intr___cmd_rdy___bit 3
#define reg_iop_dmc_out_r_intr___dth___lsb 4
#define reg_iop_dmc_out_r_intr___dth___width 1
#define reg_iop_dmc_out_r_intr___dth___bit 4
#define reg_iop_dmc_out_r_intr___dv___lsb 5
#define reg_iop_dmc_out_r_intr___dv___width 1
#define reg_iop_dmc_out_r_intr___dv___bit 5
#define reg_iop_dmc_out_r_intr___last_data___lsb 6
#define reg_iop_dmc_out_r_intr___last_data___width 1
#define reg_iop_dmc_out_r_intr___last_data___bit 6
#define reg_iop_dmc_out_r_intr___trf_lim___lsb 7
#define reg_iop_dmc_out_r_intr___trf_lim___width 1
#define reg_iop_dmc_out_r_intr___trf_lim___bit 7
#define reg_iop_dmc_out_r_intr___cmd_rq___lsb 8
#define reg_iop_dmc_out_r_intr___cmd_rq___width 1
#define reg_iop_dmc_out_r_intr___cmd_rq___bit 8
#define reg_iop_dmc_out_r_intr_offset 92

/* Register r_masked_intr, scope iop_dmc_out, type r */
#define reg_iop_dmc_out_r_masked_intr___data_md___lsb 0
#define reg_iop_dmc_out_r_masked_intr___data_md___width 1
#define reg_iop_dmc_out_r_masked_intr___data_md___bit 0
#define reg_iop_dmc_out_r_masked_intr___ctxt_md___lsb 1
#define reg_iop_dmc_out_r_masked_intr___ctxt_md___width 1
#define reg_iop_dmc_out_r_masked_intr___ctxt_md___bit 1
#define reg_iop_dmc_out_r_masked_intr___group_md___lsb 2
#define reg_iop_dmc_out_r_masked_intr___group_md___width 1
#define reg_iop_dmc_out_r_masked_intr___group_md___bit 2
#define reg_iop_dmc_out_r_masked_intr___cmd_rdy___lsb 3
#define reg_iop_dmc_out_r_masked_intr___cmd_rdy___width 1
#define reg_iop_dmc_out_r_masked_intr___cmd_rdy___bit 3
#define reg_iop_dmc_out_r_masked_intr___dth___lsb 4
#define reg_iop_dmc_out_r_masked_intr___dth___width 1
#define reg_iop_dmc_out_r_masked_intr___dth___bit 4
#define reg_iop_dmc_out_r_masked_intr___dv___lsb 5
#define reg_iop_dmc_out_r_masked_intr___dv___width 1
#define reg_iop_dmc_out_r_masked_intr___dv___bit 5
#define reg_iop_dmc_out_r_masked_intr___last_data___lsb 6
#define reg_iop_dmc_out_r_masked_intr___last_data___width 1
#define reg_iop_dmc_out_r_masked_intr___last_data___bit 6
#define reg_iop_dmc_out_r_masked_intr___trf_lim___lsb 7
#define reg_iop_dmc_out_r_masked_intr___trf_lim___width 1
#define reg_iop_dmc_out_r_masked_intr___trf_lim___bit 7
#define reg_iop_dmc_out_r_masked_intr___cmd_rq___lsb 8
#define reg_iop_dmc_out_r_masked_intr___cmd_rq___width 1
#define reg_iop_dmc_out_r_masked_intr___cmd_rq___bit 8
#define reg_iop_dmc_out_r_masked_intr_offset 96


/* Constants */
#define regk_iop_dmc_out_ack_pkt                  0x00000100
#define regk_iop_dmc_out_array                    0x00000008
#define regk_iop_dmc_out_burst                    0x00000020
#define regk_iop_dmc_out_copy_next                0x00000010
#define regk_iop_dmc_out_copy_up                  0x00000020
#define regk_iop_dmc_out_dis_c                    0x00000010
#define regk_iop_dmc_out_dis_g                    0x00000020
#define regk_iop_dmc_out_lim1                     0x00000000
#define regk_iop_dmc_out_lim16                    0x00000004
#define regk_iop_dmc_out_lim2                     0x00000001
#define regk_iop_dmc_out_lim32                    0x00000005
#define regk_iop_dmc_out_lim4                     0x00000002
#define regk_iop_dmc_out_lim64                    0x00000006
#define regk_iop_dmc_out_lim8                     0x00000003
#define regk_iop_dmc_out_load_c                   0x00000200
#define regk_iop_dmc_out_load_c_n                 0x00000280
#define regk_iop_dmc_out_load_c_next              0x00000240
#define regk_iop_dmc_out_load_d                   0x00000140
#define regk_iop_dmc_out_load_g                   0x00000300
#define regk_iop_dmc_out_load_g_down              0x000003c0
#define regk_iop_dmc_out_load_g_next              0x00000340
#define regk_iop_dmc_out_load_g_up                0x00000380
#define regk_iop_dmc_out_next_en                  0x00000010
#define regk_iop_dmc_out_next_pkt                 0x00000010
#define regk_iop_dmc_out_no                       0x00000000
#define regk_iop_dmc_out_restore                  0x00000020
#define regk_iop_dmc_out_rw_cfg_default           0x00000000
#define regk_iop_dmc_out_rw_ctxt_descr_default    0x00000000
#define regk_iop_dmc_out_rw_ctxt_descr_md1_default  0x00000000
#define regk_iop_dmc_out_rw_ctxt_descr_md2_default  0x00000000
#define regk_iop_dmc_out_rw_data_descr_default    0x00000000
#define regk_iop_dmc_out_rw_group_descr_default   0x00000000
#define regk_iop_dmc_out_rw_intr_mask_default     0x00000000
#define regk_iop_dmc_out_save_down                0x00000020
#define regk_iop_dmc_out_save_up                  0x00000020
#define regk_iop_dmc_out_set_reg                  0x00000050
#define regk_iop_dmc_out_set_w_size1              0x00000190
#define regk_iop_dmc_out_set_w_size2              0x000001a0
#define regk_iop_dmc_out_set_w_size4              0x000001c0
#define regk_iop_dmc_out_store_c                  0x00000002
#define regk_iop_dmc_out_store_descr              0x00000000
#define regk_iop_dmc_out_store_g                  0x00000004
#define regk_iop_dmc_out_store_md                 0x00000001
#define regk_iop_dmc_out_update_down              0x00000020
#define regk_iop_dmc_out_yes                      0x00000001
#endif /* __iop_dmc_out_defs_asm_h */