📄 coreasm.h
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#ifndef XTENSA_COREASM_H#define XTENSA_COREASM_H/* * THIS FILE IS GENERATED -- DO NOT MODIFY BY HAND * * include/asm-xtensa/xtensa/coreasm.h -- assembler-specific * definitions that depend on CORE configuration. * * Source for configuration-independent binaries (which link in a * configuration-specific HAL library) must NEVER include this file. * It is perfectly normal, however, for the HAL itself to include this * file. * * This file must NOT include xtensa/config/system.h. Any assembler * header file that depends on system information should likely go in * a new systemasm.h (or sysasm.h) header file. * * NOTE: macro beqi32 is NOT configuration-dependent, and is placed * here til we will have configuration-independent header file. * * This file is subject to the terms and conditions of the GNU General * Public License. See the file "COPYING" in the main directory of * this archive for more details. * * Copyright (C) 2002 Tensilica Inc. */#include <xtensa/config/core.h>#include <xtensa/config/specreg.h>/* * Assembly-language specific definitions (assembly macros, etc.). *//*---------------------------------------------------------------------- * find_ms_setbit * * This macro finds the most significant bit that is set in <as> * and return its index + <base> in <ad>, or <base> - 1 if <as> is zero. * The index counts starting at zero for the lsbit, so the return * value ranges from <base>-1 (no bit set) to <base>+31 (msbit set). * * Parameters: * <ad> destination address register (any register) * <as> source address register * <at> temporary address register (must be different than <as>) * <base> constant value added to result (usually 0 or 1) * On entry: * <ad> = undefined if different than <as> * <as> = value whose most significant set bit is to be found * <at> = undefined * no other registers are used by this macro. * On exit: * <ad> = <base> + index of msbit set in original <as>, * = <base> - 1 if original <as> was zero. * <as> clobbered (if not <ad>) * <at> clobbered (if not <ad>) * Example: * find_ms_setbit a0, a4, a0, 0 -- return in a0 index of msbit set in a4 */ .macro find_ms_setbit ad, as, at, base#if XCHAL_HAVE_NSA movi \at, 31+\base nsau \as, \as // get index of \as, numbered from msbit (32 if absent) sub \ad, \at, \as // get numbering from lsbit (0..31, -1 if absent)#else /* XCHAL_HAVE_NSA */ movi \at, \base // start with result of 0 (point to lsbit of 32) beqz \as, 2f // special case for zero argument: return -1 bltui \as, 0x10000, 1f // is it one of the 16 lsbits? (if so, check lower 16 bits) addi \at, \at, 16 // no, increment result to upper 16 bits (of 32) //srli \as, \as, 16 // check upper half (shift right 16 bits) extui \as, \as, 16, 16 // check upper half (shift right 16 bits)1: bltui \as, 0x100, 1f // is it one of the 8 lsbits? (if so, check lower 8 bits) addi \at, \at, 8 // no, increment result to upper 8 bits (of 16) srli \as, \as, 8 // shift right to check upper 8 bits1: bltui \as, 0x10, 1f // is it one of the 4 lsbits? (if so, check lower 4 bits) addi \at, \at, 4 // no, increment result to upper 4 bits (of 8) srli \as, \as, 4 // shift right 4 bits to check upper half1: bltui \as, 0x4, 1f // is it one of the 2 lsbits? (if so, check lower 2 bits) addi \at, \at, 2 // no, increment result to upper 2 bits (of 4) srli \as, \as, 2 // shift right 2 bits to check upper half1: bltui \as, 0x2, 1f // is it the lsbit? addi \at, \at, 2 // no, increment result to upper bit (of 2)2: addi \at, \at, -1 // (from just above: add 1; from beqz: return -1) //srli \as, \as, 11: // done! \at contains index of msbit set (or -1 if none set) .if 0x\ad - 0x\at // destination different than \at ? (works because regs are a0-a15) mov \ad, \at // then move result to \ad .endif#endif /* XCHAL_HAVE_NSA */ .endm // find_ms_setbit/*---------------------------------------------------------------------- * find_ls_setbit * * This macro finds the least significant bit that is set in <as>, * and return its index in <ad>. * Usage is the same as for the find_ms_setbit macro. * Example: * find_ls_setbit a0, a4, a0, 0 -- return in a0 index of lsbit set in a4 */ .macro find_ls_setbit ad, as, at, base neg \at, \as // keep only the least-significant bit that is set... and \as, \at, \as // ... in \as find_ms_setbit \ad, \as, \at, \base .endm // find_ls_setbit/*---------------------------------------------------------------------- * find_ls_one * * Same as find_ls_setbit with base zero. * Source (as) and destination (ad) registers must be different. * Provided for backward compatibility. */ .macro find_ls_one ad, as find_ls_setbit \ad, \as, \ad, 0 .endm // find_ls_one/*---------------------------------------------------------------------- * floop, floopnez, floopgtz, floopend * * These macros are used for fast inner loops that * work whether or not the Loops options is configured. * If the Loops option is configured, they simply use * the zero-overhead LOOP instructions; otherwise * they use explicit decrement and branch instructions. * * They are used in pairs, with floop, floopnez or floopgtz * at the beginning of the loop, and floopend at the end. * * Each pair of loop macro calls must be given the loop count * address register and a unique label for that loop. * * Example: * * movi a3, 16 // loop 16 times * floop a3, myloop1 * : * bnez a7, end1 // exit loop if a7 != 0 * : * floopend a3, myloop1 * end1: * * Like the LOOP instructions, these macros cannot be * nested, must include at least one instruction, * cannot call functions inside the loop, etc. * The loop can be exited by jumping to the instruction * following floopend (or elsewhere outside the loop), * or continued by jumping to a NOP instruction placed * immediately before floopend. * * Unlike LOOP instructions, the register passed to floop* * cannot be used inside the loop, because it is used as * the loop counter if the Loops option is not configured. * And its value is undefined after exiting the loop. * And because the loop counter register is active inside * the loop, you can't easily use this construct to loop * across a register file using ROTW as you might with LOOP * instructions, unless you copy the loop register along. */ /* Named label version of the macros: */ .macro floop ar, endlabel floop_ \ar, .Lfloopstart_\endlabel, .Lfloopend_\endlabel .endm .macro floopnez ar, endlabel floopnez_ \ar, .Lfloopstart_\endlabel, .Lfloopend_\endlabel .endm .macro floopgtz ar, endlabel floopgtz_ \ar, .Lfloopstart_\endlabel, .Lfloopend_\endlabel .endm .macro floopend ar, endlabel floopend_ \ar, .Lfloopstart_\endlabel, .Lfloopend_\endlabel .endm /* Numbered local label version of the macros: */#if 0 /*UNTESTED*/ .macro floop89 ar floop_ \ar, 8, 9f .endm .macro floopnez89 ar floopnez_ \ar, 8, 9f .endm .macro floopgtz89 ar floopgtz_ \ar, 8, 9f .endm .macro floopend89 ar floopend_ \ar, 8b, 9 .endm#endif /*0*/ /* Underlying version of the macros: */ .macro floop_ ar, startlabel, endlabelref .ifdef _infloop_ .if _infloop_ .err // Error: floop cannot be nested .endif .endif .set _infloop_, 1#if XCHAL_HAVE_LOOPS loop \ar, \endlabelref#else /* XCHAL_HAVE_LOOPS */\startlabel: addi \ar, \ar, -1#endif /* XCHAL_HAVE_LOOPS */ .endm // floop_ .macro floopnez_ ar, startlabel, endlabelref .ifdef _infloop_ .if _infloop_ .err // Error: floopnez cannot be nested .endif .endif .set _infloop_, 1#if XCHAL_HAVE_LOOPS loopnez \ar, \endlabelref#else /* XCHAL_HAVE_LOOPS */ beqz \ar, \endlabelref\startlabel: addi \ar, \ar, -1#endif /* XCHAL_HAVE_LOOPS */ .endm // floopnez_ .macro floopgtz_ ar, startlabel, endlabelref .ifdef _infloop_ .if _infloop_ .err // Error: floopgtz cannot be nested .endif .endif .set _infloop_, 1#if XCHAL_HAVE_LOOPS loopgtz \ar, \endlabelref#else /* XCHAL_HAVE_LOOPS */ bltz \ar, \endlabelref beqz \ar, \endlabelref\startlabel: addi \ar, \ar, -1#endif /* XCHAL_HAVE_LOOPS */ .endm // floopgtz_ .macro floopend_ ar, startlabelref, endlabel .ifndef _infloop_ .err // Error: floopend without matching floopXXX .endif .ifeq _infloop_ .err // Error: floopend without matching floopXXX .endif .set _infloop_, 0#if ! XCHAL_HAVE_LOOPS
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