bcm1480_scd.h

linux-2.6.15.6

/*  *********************************************************************
    *  BCM1280/BCM1400 Board Support Package
    *
    *  SCD Constants and Macros                     File: bcm1480_scd.h
    *
    *  This module contains constants and macros useful for
    *  manipulating the System Control and Debug module.
    *
    *  BCM1400 specification level: 1X55_1X80-UM100-R (12/18/03)
    *
    *********************************************************************
    *
    *  Copyright 2000,2001,2002,2003
    *  Broadcom Corporation. All rights reserved.
    *
    *  This program is free software; you can redistribute it and/or
    *  modify it under the terms of the GNU General Public License as
    *  published by the Free Software Foundation; either version 2 of
    *  the License, or (at your option) any later version.
    *
    *  This program is distributed in the hope that it will be useful,
    *  but WITHOUT ANY WARRANTY; without even the implied warranty of
    *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    *  GNU General Public License for more details.
    *
    *  You should have received a copy of the GNU General Public License
    *  along with this program; if not, write to the Free Software
    *  Foundation, Inc., 59 Temple Place, Suite 330, Boston,
    *  MA 02111-1307 USA
    ********************************************************************* */

#ifndef _BCM1480_SCD_H
#define _BCM1480_SCD_H

#include "sb1250_defs.h"

/*  *********************************************************************
    *  Pull in the BCM1250's SCD since lots of stuff is the same.
    ********************************************************************* */

#include "sb1250_scd.h"

/*  *********************************************************************
    *  Some general notes:
    *
    *  This file is basically a "what's new" header file.  Since the
    *  BCM1250 and the new BCM1480 (and derivatives) share many common
    *  features, this file contains only what's new or changed from
    *  the 1250.  (above, you can see that we include the 1250 symbols
    *  to get the base functionality).
    *
    *  In software, be sure to use the correct symbols, particularly
    *  for blocks that are different between the two chip families.
    *  All BCM1480-specific symbols have _BCM1480_ in their names,
    *  and all BCM1250-specific and "base" functions that are common in
    *  both chips have no special names (this is for compatibility with
    *  older include files).  Therefore, if you're working with the
    *  SCD, which is very different on each chip, A_SCD_xxx implies
    *  the BCM1250 version and A_BCM1480_SCD_xxx implies the BCM1480
    *  version.
    ********************************************************************* */

/*  *********************************************************************
    *  System control/debug registers
    ********************************************************************* */

/*
 * System Identification and Revision Register (Table 12)
 * Register: SCD_SYSTEM_REVISION
 * This register is field compatible with the 1250.
 */

/*
 * New part definitions
 */

#define K_SYS_PART_BCM1480          0x1406
#define K_SYS_PART_BCM1280          0x1206
#define K_SYS_PART_BCM1455          0x1407
#define K_SYS_PART_BCM1255          0x1257

/*
 * Manufacturing Information Register (Table 14)
 * Register: SCD_SYSTEM_MANUF
 */

/*
 * System Configuration Register (Table 15)
 * Register: SCD_SYSTEM_CFG
 * Entire register is different from 1250, all new constants below
 */

#define M_BCM1480_SYS_RESERVED0             _SB_MAKEMASK1(0)
#define M_BCM1480_SYS_HT_MINRSTCNT          _SB_MAKEMASK1(1)
#define M_BCM1480_SYS_RESERVED2             _SB_MAKEMASK1(2)
#define M_BCM1480_SYS_RESERVED3             _SB_MAKEMASK1(3)
#define M_BCM1480_SYS_RESERVED4             _SB_MAKEMASK1(4)
#define M_BCM1480_SYS_IOB_DIV               _SB_MAKEMASK1(5)

#define S_BCM1480_SYS_PLL_DIV               _SB_MAKE64(6)
#define M_BCM1480_SYS_PLL_DIV               _SB_MAKEMASK(5,S_BCM1480_SYS_PLL_DIV)
#define V_BCM1480_SYS_PLL_DIV(x)            _SB_MAKEVALUE(x,S_BCM1480_SYS_PLL_DIV)
#define G_BCM1480_SYS_PLL_DIV(x)            _SB_GETVALUE(x,S_BCM1480_SYS_PLL_DIV,M_BCM1480_SYS_PLL_DIV)

#define S_BCM1480_SYS_SW_DIV                _SB_MAKE64(11)
#define M_BCM1480_SYS_SW_DIV                _SB_MAKEMASK(5,S_BCM1480_SYS_SW_DIV)
#define V_BCM1480_SYS_SW_DIV(x)             _SB_MAKEVALUE(x,S_BCM1480_SYS_SW_DIV)
#define G_BCM1480_SYS_SW_DIV(x)             _SB_GETVALUE(x,S_BCM1480_SYS_SW_DIV,M_BCM1480_SYS_SW_DIV)

#define M_BCM1480_SYS_PCMCIA_ENABLE         _SB_MAKEMASK1(16)
#define M_BCM1480_SYS_DUART1_ENABLE         _SB_MAKEMASK1(17)

#define S_BCM1480_SYS_BOOT_MODE             _SB_MAKE64(18)
#define M_BCM1480_SYS_BOOT_MODE             _SB_MAKEMASK(2,S_BCM1480_SYS_BOOT_MODE)
#define V_BCM1480_SYS_BOOT_MODE(x)          _SB_MAKEVALUE(x,S_BCM1480_SYS_BOOT_MODE)
#define G_BCM1480_SYS_BOOT_MODE(x)          _SB_GETVALUE(x,S_BCM1480_SYS_BOOT_MODE,M_BCM1480_SYS_BOOT_MODE)
#define K_BCM1480_SYS_BOOT_MODE_ROM32       0
#define K_BCM1480_SYS_BOOT_MODE_ROM8        1
#define K_BCM1480_SYS_BOOT_MODE_SMBUS_SMALL 2
#define K_BCM1480_SYS_BOOT_MODE_SMBUS_BIG   3
#define M_BCM1480_SYS_BOOT_MODE_SMBUS       _SB_MAKEMASK1(19)

#define M_BCM1480_SYS_PCI_HOST              _SB_MAKEMASK1(20)
#define M_BCM1480_SYS_PCI_ARBITER           _SB_MAKEMASK1(21)
#define M_BCM1480_SYS_BIG_ENDIAN            _SB_MAKEMASK1(22)
#define M_BCM1480_SYS_GENCLK_EN             _SB_MAKEMASK1(23)
#define M_BCM1480_SYS_GEN_PARITY_EN         _SB_MAKEMASK1(24)
#define M_BCM1480_SYS_RESERVED25            _SB_MAKEMASK1(25)

#define S_BCM1480_SYS_CONFIG                26
#define M_BCM1480_SYS_CONFIG                _SB_MAKEMASK(6,S_BCM1480_SYS_CONFIG)
#define V_BCM1480_SYS_CONFIG(x)             _SB_MAKEVALUE(x,S_BCM1480_SYS_CONFIG)
#define G_BCM1480_SYS_CONFIG(x)             _SB_GETVALUE(x,S_BCM1480_SYS_CONFIG,M_BCM1480_SYS_CONFIG)

#define M_BCM1480_SYS_RESERVED32            _SB_MAKEMASK(32,15)

#define S_BCM1480_SYS_NODEID                47
#define M_BCM1480_SYS_NODEID                _SB_MAKEMASK(4,S_BCM1480_SYS_NODEID)
#define V_BCM1480_SYS_NODEID(x)             _SB_MAKEVALUE(x,S_BCM1480_SYS_NODEID)
#define G_BCM1480_SYS_NODEID(x)             _SB_GETVALUE(x,S_BCM1480_SYS_NODEID,M_BCM1480_SYS_NODEID)

#define M_BCM1480_SYS_CCNUMA_EN             _SB_MAKEMASK1(51)
#define M_BCM1480_SYS_CPU_RESET_0           _SB_MAKEMASK1(52)
#define M_BCM1480_SYS_CPU_RESET_1           _SB_MAKEMASK1(53)
#define M_BCM1480_SYS_CPU_RESET_2           _SB_MAKEMASK1(54)
#define M_BCM1480_SYS_CPU_RESET_3           _SB_MAKEMASK1(55)
#define S_BCM1480_SYS_DISABLECPU0           56
#define M_BCM1480_SYS_DISABLECPU0           _SB_MAKEMASK1(S_BCM1480_SYS_DISABLECPU0)
#define S_BCM1480_SYS_DISABLECPU1           57
#define M_BCM1480_SYS_DISABLECPU1           _SB_MAKEMASK1(S_BCM1480_SYS_DISABLECPU1)
#define S_BCM1480_SYS_DISABLECPU2           58
#define M_BCM1480_SYS_DISABLECPU2           _SB_MAKEMASK1(S_BCM1480_SYS_DISABLECPU2)
#define S_BCM1480_SYS_DISABLECPU3           59
#define M_BCM1480_SYS_DISABLECPU3           _SB_MAKEMASK1(S_BCM1480_SYS_DISABLECPU3)

#define M_BCM1480_SYS_SB_SOFTRES            _SB_MAKEMASK1(60)
#define M_BCM1480_SYS_EXT_RESET             _SB_MAKEMASK1(61)
#define M_BCM1480_SYS_SYSTEM_RESET          _SB_MAKEMASK1(62)
#define M_BCM1480_SYS_SW_FLAG               _SB_MAKEMASK1(63)

/*
 * Scratch Register (Table 16)
 * Register: SCD_SYSTEM_SCRATCH
 * Same as BCM1250
 */


/*
 * Mailbox Registers (Table 17)
 * Registers: SCD_MBOX_{0,1}_CPU_x
 * Same as BCM1250
 */


/*
 * See bcm1480_int.h for interrupt mapper registers.
 */


/*
 * Watchdog Timer Initial Count Registers (Table 23)
 * Registers: SCD_WDOG_INIT_CNT_x
 *
 * The watchdogs are almost the same as the 1250, except
 * the configuration register has more bits to control the
 * other CPUs.
 */


/*
 * Watchdog Timer Configuration Registers (Table 25)
 * Registers: SCD_WDOG_CFG_x
 */

#define M_BCM1480_SCD_WDOG_ENABLE           _SB_MAKEMASK1(0)

#define S_BCM1480_SCD_WDOG_RESET_TYPE       2
#define M_BCM1480_SCD_WDOG_RESET_TYPE       _SB_MAKEMASK(5,S_BCM1480_SCD_WDOG_RESET_TYPE)
#define V_BCM1480_SCD_WDOG_RESET_TYPE(x)    _SB_MAKEVALUE(x,S_BCM1480_SCD_WDOG_RESET_TYPE)
#define G_BCM1480_SCD_WDOG_RESET_TYPE(x)    _SB_GETVALUE(x,S_BCM1480_SCD_WDOG_RESET_TYPE,M_BCM1480_SCD_WDOG_RESET_TYPE)

#define K_BCM1480_SCD_WDOG_RESET_FULL       0	/* actually, (x & 1) == 0  */
#define K_BCM1480_SCD_WDOG_RESET_SOFT       1
#define K_BCM1480_SCD_WDOG_RESET_CPU0       3
#define K_BCM1480_SCD_WDOG_RESET_CPU1       5
#define K_BCM1480_SCD_WDOG_RESET_CPU2       9
#define K_BCM1480_SCD_WDOG_RESET_CPU3       17
#define K_BCM1480_SCD_WDOG_RESET_ALL_CPUS   31


#define M_BCM1480_SCD_WDOG_HAS_RESET        _SB_MAKEMASK1(8)

/*
 * General Timer Initial Count Registers (Table 26)
 * Registers: SCD_TIMER_INIT_x
 *
 * The timer registers are the same as the BCM1250
 */