sis.h

linux-2.6.15.6

/* I/O port access macros */
#define inSISREG(base)		inb(base)

#define outSISREG(base,val)	outb(val,base)

#define orSISREG(base,val)      			\
		do {					\
			u8 __Temp = inSISREG(base); 	\
			outSISREG(base, __Temp | (val));\
		} while (0)

#define andSISREG(base,val)     			\
		do {					\
			u8 __Temp = inSISREG(base); 	\
			outSISREG(base, __Temp & (val));\
		} while (0)

#define inSISIDXREG(base,idx,var)			\
		do {					\
			outSISREG(base, idx); 		\
			var = inSISREG((base)+1);	\
		} while (0)

#define outSISIDXREG(base,idx,val)			\
		do {					\
			outSISREG(base, idx);		\
			outSISREG((base)+1, val);	\
		} while (0)

#define orSISIDXREG(base,idx,val)				\
		do {						\
			u8 __Temp; 				\
			outSISREG(base, idx);   		\
			__Temp = inSISREG((base)+1) | (val); 	\
			outSISREG((base)+1, __Temp);		\
		} while (0)

#define andSISIDXREG(base,idx,and)				\
		do {						\
			u8 __Temp; 				\
			outSISREG(base, idx);   		\
			__Temp = inSISREG((base)+1) & (and); 	\
			outSISREG((base)+1, __Temp);		\
		} while (0)

#define setSISIDXREG(base,idx,and,or)   				\
		do {							\
			u8 __Temp; 					\
			outSISREG(base, idx);				\
			__Temp = (inSISREG((base)+1) & (and)) | (or); 	\
			outSISREG((base)+1, __Temp);			\
		} while (0)

/* MMIO access macros */
#define MMIO_IN8(base, offset)  readb((base+offset))
#define MMIO_IN16(base, offset) readw((base+offset))
#define MMIO_IN32(base, offset) readl((base+offset))

#define MMIO_OUT8(base, offset, val)  writeb(((u8)(val)), (base+offset))
#define MMIO_OUT16(base, offset, val) writew(((u16)(val)), (base+offset))
#define MMIO_OUT32(base, offset, val) writel(((u32)(val)), (base+offset))

/* Queue control MMIO registers */
#define Q_BASE_ADDR		0x85C0  /* Base address of software queue */
#define Q_WRITE_PTR		0x85C4  /* Current write pointer */
#define Q_READ_PTR		0x85C8  /* Current read pointer */
#define Q_STATUS		0x85CC  /* queue status */

#define MMIO_QUEUE_PHYBASE      Q_BASE_ADDR
#define MMIO_QUEUE_WRITEPORT    Q_WRITE_PTR
#define MMIO_QUEUE_READPORT     Q_READ_PTR

#ifndef FB_BLANK_UNBLANK
#define FB_BLANK_UNBLANK	0
#endif
#ifndef FB_BLANK_NORMAL
#define FB_BLANK_NORMAL		1
#endif
#ifndef FB_BLANK_VSYNC_SUSPEND
#define FB_BLANK_VSYNC_SUSPEND	2
#endif
#ifndef FB_BLANK_HSYNC_SUSPEND
#define FB_BLANK_HSYNC_SUSPEND	3
#endif
#ifndef FB_BLANK_POWERDOWN
#define FB_BLANK_POWERDOWN	4
#endif

enum _SIS_LCD_TYPE {
    LCD_INVALID = 0,
    LCD_800x600,
    LCD_1024x768,
    LCD_1280x1024,
    LCD_1280x960,
    LCD_640x480,
    LCD_1600x1200,
    LCD_1920x1440,
    LCD_2048x1536,
    LCD_320x240,	/* FSTN */
    LCD_1400x1050,
    LCD_1152x864,
    LCD_1152x768,
    LCD_1280x768,
    LCD_1024x600,
    LCD_320x240_2,	/* DSTN */
    LCD_320x240_3,	/* DSTN */
    LCD_848x480,
    LCD_1280x800,
    LCD_1680x1050,
    LCD_1280x720,
    LCD_1280x854,
    LCD_CUSTOM,
    LCD_UNKNOWN
};

enum _SIS_CMDTYPE {
    MMIO_CMD = 0,
    AGP_CMD_QUEUE,
    VM_CMD_QUEUE,
};

struct SIS_OH {
	struct SIS_OH *poh_next;
	struct SIS_OH *poh_prev;
	u32            offset;
	u32            size;
};

struct SIS_OHALLOC {
	struct SIS_OHALLOC *poha_next;
	struct SIS_OH aoh[1];
};

struct SIS_HEAP {
	struct SIS_OH	oh_free;
	struct SIS_OH	oh_used;
	struct SIS_OH	*poh_freelist;
	struct SIS_OHALLOC *poha_chain;
	u32		max_freesize;
	struct sis_video_info *vinfo;
};

/* Our "par" */
struct sis_video_info {
	int		cardnumber;
	struct fb_info  *memyselfandi;

	struct SiS_Private SiS_Pr;

	struct sisfb_info sisfbinfo;	/* For ioctl SISFB_GET_INFO */

	struct fb_var_screeninfo default_var;

#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
	struct fb_fix_screeninfo sisfb_fix;
	u32		pseudo_palette[17];
#endif

#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
	struct display		 sis_disp;
	struct display_switch 	 sisfb_sw;
	struct {
		u16 red, green, blue, pad;
	}		sis_palette[256];
	union {
#ifdef FBCON_HAS_CFB16
		u16 cfb16[16];
#endif
#ifdef FBCON_HAS_CFB32
		u32 cfb32[16];
#endif
	}		sis_fbcon_cmap;
#endif

	struct sisfb_monitor {
		u16 hmin;
		u16 hmax;
		u16 vmin;
		u16 vmax;
		u32 dclockmax;
		u8  feature;
		BOOLEAN datavalid;
	}		sisfb_thismonitor;

	unsigned short	chip_id;	/* PCI ID of chip */
	unsigned short	chip_vendor;	/* PCI ID of vendor */
	char		myid[40];

	struct pci_dev  *nbridge;
	struct pci_dev  *lpcdev;

	int		mni;	/* Mode number index */

#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
	int		currcon;
#endif

	unsigned long	video_size;
	unsigned long	video_base;
	unsigned long	mmio_size;
	unsigned long	mmio_base;
	unsigned long	vga_base;

	unsigned long	video_offset;

	unsigned long	UMAsize, LFBsize;

	SIS_IOTYPE1	*video_vbase;
	SIS_IOTYPE1	*mmio_vbase;

	unsigned char	*bios_abase;

	int		mtrr;

	u32		sisfb_mem;

	u32		sisfb_parm_mem;
	int		sisfb_accel;
	int		sisfb_ypan;
	int		sisfb_max;
	int		sisfb_userom;
	int		sisfb_useoem;
	int		sisfb_mode_idx;
	int		sisfb_parm_rate;
	int		sisfb_crt1off;
	int		sisfb_forcecrt1;
	int		sisfb_crt2type;
	int		sisfb_crt2flags;
	int		sisfb_dstn;
	int		sisfb_fstn;
	int		sisfb_tvplug;
	int		sisfb_tvstd;
	int		sisfb_nocrt2rate;
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
	int		sisfb_inverse;
#endif

	u32		heapstart;		/* offset  */
	SIS_IOTYPE1	*sisfb_heap_start;	/* address */
	SIS_IOTYPE1	*sisfb_heap_end;	/* address */
	u32		sisfb_heap_size;
	int		havenoheap;

	struct SIS_HEAP	sisfb_heap;		/* This card's vram heap */

	int		video_bpp;
	int		video_cmap_len;
	int		video_width;
	int		video_height;
	unsigned int	refresh_rate;

	unsigned int	chip;
	u8		revision_id;
	int		sisvga_enabled;		/* PCI device was enabled */

	int		video_linelength;	/* real pitch */
	int		scrnpitchCRT1;		/* pitch regarding interlace */

	u16		DstColor;		/* For 2d acceleration */
	u32		SiS310_AccelDepth;
	u32		CommandReg;
	int		cmdqueuelength;		/* Current (for accel) */
	u32		cmdQueueSize;		/* Total size in KB */

	spinlock_t	lockaccel;		/* Do not use outside of kernel! */

	unsigned int	pcibus;
	unsigned int	pcislot;
	unsigned int	pcifunc;

	int		accel;
	int		engineok;

	u16		subsysvendor;
	u16		subsysdevice;

	u32		vbflags;		/* Replacing deprecated stuff from above */
	u32		currentvbflags;
	u32		vbflags2;

	int		lcdxres, lcdyres;
	int		lcddefmodeidx, tvdefmodeidx, defmodeidx;
	u32		CRT2LCDType;		/* defined in "SIS_LCD_TYPE" */
	u32		curFSTN, curDSTN;

	int		current_bpp;
	int		current_width;
	int		current_height;
	int		current_htotal;
	int		current_vtotal;
	int		current_linelength;
	__u32		current_pixclock;
	int		current_refresh_rate;

	unsigned int	current_base;

	u8		mode_no;
	u8		rate_idx;
	int		modechanged;
	unsigned char	modeprechange;

#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
	u8		sisfb_lastrates[128];
#endif

	int		newrom;
	int		haveXGIROM;
	int		registered;
	int		warncount;
#ifdef SIS_OLD_CONFIG_COMPAT
	int		ioctl32registered;
#endif

	int		sisvga_engine;
	int		hwcursor_size;
	int		CRT2_write_enable;
	u8		caps;

	u8		detectedpdc;
	u8		detectedpdca;
	u8		detectedlcda;

	SIS_IOTYPE1	*hwcursor_vbase;

	int		chronteltype;
	int		tvxpos, tvypos;
	u8		p2_1f,p2_20,p2_2b,p2_42,p2_43,p2_01,p2_02;
	int		tvx, tvy;

	u8		sisfblocked;

	struct sisfb_info sisfb_infoblock;

	struct sisfb_cmd sisfb_command;

	u32		sisfb_id;

	u8		sisfb_can_post;
	u8		sisfb_card_posted;
	u8		sisfb_was_boot_device;

	struct sis_video_info *next;
};

#endif