ski2c.c

linux-2.6.15.6

/******************************************************************************
 *
 * Name:	ski2c.c
 * Project:	Gigabit Ethernet Adapters, TWSI-Module
 * Version:	$Revision: 1.59 $
 * Date:	$Date: 2003/10/20 09:07:25 $
 * Purpose:	Functions to access Voltage and Temperature Sensor
 *
 ******************************************************************************/

/******************************************************************************
 *
 *	(C)Copyright 1998-2002 SysKonnect.
 *	(C)Copyright 2002-2003 Marvell.
 *
 *	This program is free software; you can redistribute it and/or modify
 *	it under the terms of the GNU General Public License as published by
 *	the Free Software Foundation; either version 2 of the License, or
 *	(at your option) any later version.
 *
 *	The information in this file is provided "AS IS" without warranty.
 *
 ******************************************************************************/

/*
 *	I2C Protocol
 */
#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
static const char SysKonnectFileId[] =
	"@(#) $Id: ski2c.c,v 1.59 2003/10/20 09:07:25 rschmidt Exp $ (C) Marvell. ";
#endif

#include "h/skdrv1st.h"		/* Driver Specific Definitions */
#include "h/lm80.h"
#include "h/skdrv2nd.h"		/* Adapter Control- and Driver specific Def. */

#ifdef __C2MAN__
/*
	I2C protocol implementation.

	General Description:

	The I2C protocol is used for the temperature sensors and for
	the serial EEPROM which hold the configuration.

	This file covers functions that allow to read write and do
	some bulk requests a specified I2C address.

	The Genesis has 2 I2C buses. One for the EEPROM which holds
	the VPD Data and one for temperature and voltage sensor.
	The following picture shows the I2C buses, I2C devices and
	their control registers.

	Note: The VPD functions are in skvpd.c
.
.	PCI Config I2C Bus for VPD Data:
.
.		      +------------+
.		      | VPD EEPROM |
.		      +------------+
.			     |
.			     | <-- I2C
.			     |
.		 +-----------+-----------+
.		 |			 |
.	+-----------------+	+-----------------+
.	| PCI_VPD_ADR_REG |	| PCI_VPD_DAT_REG |
.	+-----------------+	+-----------------+
.
.
.	I2C Bus for LM80 sensor:
.
.			+-----------------+
.			| Temperature and |
.			| Voltage Sensor  |
.			| 	LM80	  |
.			+-----------------+
.				|
.				|
.			I2C --> |
.				|
.			     +----+
.	     +-------------->| OR |<--+
.	     |		     +----+   |
.     +------+------+		      |
.     |		    |		      |
. +--------+	+--------+	+----------+
. | B2_I2C |	| B2_I2C |	|  B2_I2C  |
. | _CTRL  |	| _DATA  |	|   _SW    |
. +--------+	+--------+	+----------+
.
	The I2C bus may be driven by the B2_I2C_SW or by the B2_I2C_CTRL
	and B2_I2C_DATA registers.
	For driver software it is recommended to use the I2C control and
	data register, because I2C bus timing is done by the ASIC and
	an interrupt may be received when the I2C request is completed.

	Clock Rate Timing:			MIN	MAX	generated by
		VPD EEPROM:			50 kHz	100 kHz		HW
		LM80 over I2C Ctrl/Data reg.	50 kHz	100 kHz		HW
		LM80 over B2_I2C_SW register	0	400 kHz		SW

	Note:	The clock generated by the hardware is dependend on the
		PCI clock. If the PCI bus clock is 33 MHz, the I2C/VPD
		clock is 50 kHz.
 */
intro()
{}
#endif

#ifdef SK_DIAG
/*
 * I2C Fast Mode timing values used by the LM80.
 * If new devices are added to the I2C bus the timing values have to be checked.
 */
#ifndef I2C_SLOW_TIMING
#define	T_CLK_LOW			1300L	/* clock low time in ns */
#define	T_CLK_HIGH		 	 600L	/* clock high time in ns */
#define T_DATA_IN_SETUP		 100L	/* data in Set-up Time */
#define T_START_HOLD		 600L	/* start condition hold time */
#define T_START_SETUP		 600L	/* start condition Set-up time */
#define	T_STOP_SETUP		 600L	/* stop condition Set-up time */
#define T_BUS_IDLE			1300L	/* time the bus must free after Tx */
#define	T_CLK_2_DATA_OUT	 900L	/* max. clock low to data output valid */
#else	/* I2C_SLOW_TIMING */
/* I2C Standard Mode Timing */
#define	T_CLK_LOW			4700L	/* clock low time in ns */
#define	T_CLK_HIGH			4000L	/* clock high time in ns */
#define T_DATA_IN_SETUP		 250L	/* data in Set-up Time */
#define T_START_HOLD		4000L	/* start condition hold time */
#define T_START_SETUP		4700L	/* start condition Set-up time */
#define	T_STOP_SETUP		4000L	/* stop condition Set-up time */
#define T_BUS_IDLE			4700L	/* time the bus must free after Tx */
#endif	/* !I2C_SLOW_TIMING */

#define NS2BCLK(x)	(((x)*125)/10000)

/*
 * I2C Wire Operations
 *
 * About I2C_CLK_LOW():
 *
 * The Data Direction bit (I2C_DATA_DIR) has to be set to input when setting
 * clock to low, to prevent the ASIC and the I2C data client from driving the
 * serial data line simultaneously (ASIC: last bit of a byte = '1', I2C client
 * send an 'ACK'). See also Concentrator Bugreport No. 10192.
 */
#define I2C_DATA_HIGH(IoC)	SK_I2C_SET_BIT(IoC, I2C_DATA)
#define	I2C_DATA_LOW(IoC)	SK_I2C_CLR_BIT(IoC, I2C_DATA)
#define	I2C_DATA_OUT(IoC)	SK_I2C_SET_BIT(IoC, I2C_DATA_DIR)
#define	I2C_DATA_IN(IoC)	SK_I2C_CLR_BIT(IoC, I2C_DATA_DIR | I2C_DATA)
#define	I2C_CLK_HIGH(IoC)	SK_I2C_SET_BIT(IoC, I2C_CLK)
#define	I2C_CLK_LOW(IoC)	SK_I2C_CLR_BIT(IoC, I2C_CLK | I2C_DATA_DIR)
#define	I2C_START_COND(IoC)	SK_I2C_CLR_BIT(IoC, I2C_CLK)

#define NS2CLKT(x)	((x*125L)/10000)

/*--------------- I2C Interface Register Functions --------------- */

/*
 * sending one bit
 */
void SkI2cSndBit(
SK_IOC	IoC,	/* I/O Context */
SK_U8	Bit)	/* Bit to send */
{
	I2C_DATA_OUT(IoC);
	if (Bit) {
		I2C_DATA_HIGH(IoC);
	}
	else {
		I2C_DATA_LOW(IoC);
	}
	SkDgWaitTime(IoC, NS2BCLK(T_DATA_IN_SETUP));
	I2C_CLK_HIGH(IoC);
	SkDgWaitTime(IoC, NS2BCLK(T_CLK_HIGH));
	I2C_CLK_LOW(IoC);
}	/* SkI2cSndBit*/


/*
 * Signal a start to the I2C Bus.
 *
 * A start is signaled when data goes to low in a high clock cycle.
 *
 * Ends with Clock Low.
 *
 * Status: not tested
 */
void SkI2cStart(
SK_IOC	IoC)	/* I/O Context */
{
	/* Init data and Clock to output lines */
	/* Set Data high */
	I2C_DATA_OUT(IoC);
	I2C_DATA_HIGH(IoC);
	/* Set Clock high */
	I2C_CLK_HIGH(IoC);

	SkDgWaitTime(IoC, NS2BCLK(T_START_SETUP));

	/* Set Data Low */
	I2C_DATA_LOW(IoC);

	SkDgWaitTime(IoC, NS2BCLK(T_START_HOLD));

	/* Clock low without Data to Input */
	I2C_START_COND(IoC);

	SkDgWaitTime(IoC, NS2BCLK(T_CLK_LOW));
}	/* SkI2cStart */


void SkI2cStop(
SK_IOC	IoC)	/* I/O Context */
{
	/* Init data and Clock to output lines */
	/* Set Data low */
	I2C_DATA_OUT(IoC);
	I2C_DATA_LOW(IoC);

	SkDgWaitTime(IoC, NS2BCLK(T_CLK_2_DATA_OUT));

	/* Set Clock high */
	I2C_CLK_HIGH(IoC);

	SkDgWaitTime(IoC, NS2BCLK(T_STOP_SETUP));

	/*
	 * Set Data High:	Do it by setting the Data Line to Input.
	 *			Because of a pull up resistor the Data Line
	 *			floods to high.
	 */
	I2C_DATA_IN(IoC);

	/*
	 *	When I2C activity is stopped
	 *	 o	DATA should be set to input and
	 *	 o	CLOCK should be set to high!
	 */
	SkDgWaitTime(IoC, NS2BCLK(T_BUS_IDLE));
}	/* SkI2cStop */


/*
 * Receive just one bit via the I2C bus.
 *
 * Note:	Clock must be set to LOW before calling this function.
 *
 * Returns The received bit.
 */
int SkI2cRcvBit(
SK_IOC	IoC)	/* I/O Context */
{
	int	Bit;
	SK_U8	I2cSwCtrl;

	/* Init data as input line */
	I2C_DATA_IN(IoC);

	SkDgWaitTime(IoC, NS2BCLK(T_CLK_2_DATA_OUT));

	I2C_CLK_HIGH(IoC);

	SkDgWaitTime(IoC, NS2BCLK(T_CLK_HIGH));

	SK_I2C_GET_SW(IoC, &I2cSwCtrl);
	
	Bit = (I2cSwCtrl & I2C_DATA) ? 1 : 0;

	I2C_CLK_LOW(IoC);
	SkDgWaitTime(IoC, NS2BCLK(T_CLK_LOW-T_CLK_2_DATA_OUT));

	return(Bit);
}	/* SkI2cRcvBit */


/*
 * Receive an ACK.
 *
 * returns	0 If acknowledged
 *		1 in case of an error
 */
int SkI2cRcvAck(
SK_IOC	IoC)	/* I/O Context */
{
	/*
	 * Received bit must be zero.
	 */
	return(SkI2cRcvBit(IoC) != 0);
}	/* SkI2cRcvAck */


/*
 * Send an NACK.
 */
void SkI2cSndNAck(
SK_IOC	IoC)	/* I/O Context */
{
	/*
	 * Received bit must be zero.
	 */
	SkI2cSndBit(IoC, 1);
}	/* SkI2cSndNAck */


/*
 * Send an ACK.
 */
void SkI2cSndAck(
SK_IOC IoC)	/* I/O Context */
{
	/*
	 * Received bit must be zero.
	 */
	SkI2cSndBit(IoC, 0);
}	/* SkI2cSndAck */


/*
 * Send one byte to the I2C device and wait for ACK.
 *
 * Return acknowleged status.
 */
int SkI2cSndByte(
SK_IOC	IoC,	/* I/O Context */
int		Byte)	/* byte to send */
{
	int	i;

	for (i = 0; i < 8; i++) {
		if (Byte & (1<<(7-i))) {
			SkI2cSndBit(IoC, 1);
		}
		else {
			SkI2cSndBit(IoC, 0);
		}
	}

	return(SkI2cRcvAck(IoC));
}	/* SkI2cSndByte */


/*
 * Receive one byte and ack it.
 *
 * Return byte.
 */
int SkI2cRcvByte(
SK_IOC	IoC,	/* I/O Context */
int		Last)	/* Last Byte Flag */
{
	int	i;
	int	Byte = 0;

	for (i = 0; i < 8; i++) {
		Byte <<= 1;
		Byte |= SkI2cRcvBit(IoC);
	}

	if (Last) {
		SkI2cSndNAck(IoC);
	}
	else {
		SkI2cSndAck(IoC);
	}

	return(Byte);
}	/* SkI2cRcvByte */


/*
 * Start dialog and send device address
 *
 * Return 0 if acknowleged, 1 in case of an error
 */
int	SkI2cSndDev(
SK_IOC	IoC,	/* I/O Context */
int		Addr,	/* Device Address */
int		Rw)		/* Read / Write Flag */
{
	SkI2cStart(IoC);
	Rw = ~Rw;
	Rw &= I2C_WRITE;
	return(SkI2cSndByte(IoC, (Addr<<1) | Rw));
}	/* SkI2cSndDev */

#endif /* SK_DIAG */

/*----------------- I2C CTRL Register Functions ----------*/

/*
 * waits for a completion of an I2C transfer
 *
 * returns	0:	success, transfer completes
 *			1:	error,	 transfer does not complete, I2C transfer
 *						 killed, wait loop terminated.
 */
int	SkI2cWait(
SK_AC	*pAC,	/* Adapter Context */
SK_IOC	IoC,	/* I/O Context */
int		Event)	/* complete event to wait for (I2C_READ or I2C_WRITE) */
{
	SK_U64	StartTime;
	SK_U64	CurrentTime;
	SK_U32	I2cCtrl;

	StartTime = SkOsGetTime(pAC);
	
	do {
		CurrentTime = SkOsGetTime(pAC);

		if (CurrentTime - StartTime > SK_TICKS_PER_SEC / 8) {
			
			SK_I2C_STOP(IoC);
#ifndef SK_DIAG
			SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_I2C_E002, SKERR_I2C_E002MSG);
#endif /* !SK_DIAG */
			return(1);
		}
		
		SK_I2C_GET_CTL(IoC, &I2cCtrl);

#ifdef xYUKON_DBG
		printf("StartTime=%lu, CurrentTime=%lu\n",
			StartTime, CurrentTime);
		if (kbhit()) {
			return(1);
		}
#endif /* YUKON_DBG */
	
	} while ((I2cCtrl & I2C_FLAG) == (SK_U32)Event << 31);