📄 lpfc_sli.c
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} /* Check to see if any errors occurred during init */ if (status & HS_FFERM) { /* ERROR: During chipset initialization */ /* Adapter failed to init, chipset, status reg <status> */ lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "%d:0437 Adapter failed to init, " "chipset, status reg x%x\n", phba->brd_no, status); phba->hba_state = LPFC_HBA_ERROR; return -EIO; } if (i <= 5) { msleep(10); } else if (i <= 10) { msleep(500); } else { msleep(2500); } if (i == 15) { lpfc_sli_brdreset(phba, 0); } /* Read the HBA Host Status Register */ status = readl(phba->HSregaddr); } /* Check to see if any errors occurred during init */ if (status & HS_FFERM) { /* ERROR: During chipset initialization */ /* Adapter failed to init, chipset, status reg <status> */ lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "%d:0438 Adapter failed to init, chipset, " "status reg x%x\n", phba->brd_no, status); phba->hba_state = LPFC_HBA_ERROR; return -EIO; } /* Clear all interrupt enable conditions */ writel(0, phba->HCregaddr); readl(phba->HCregaddr); /* flush */ /* setup host attn register */ writel(0xffffffff, phba->HAregaddr); readl(phba->HAregaddr); /* flush */ return 0;}intlpfc_sli_hba_setup(struct lpfc_hba * phba){ LPFC_MBOXQ_t *pmb; uint32_t resetcount = 0, rc = 0, done = 0; pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); if (!pmb) { phba->hba_state = LPFC_HBA_ERROR; return -ENOMEM; } while (resetcount < 2 && !done) { phba->hba_state = 0; lpfc_sli_brdreset(phba, 0); msleep(2500); rc = lpfc_sli_chipset_init(phba); if (rc) break; resetcount++; /* Call pre CONFIG_PORT mailbox command initialization. A value of 0 * means the call was successful. Any other nonzero value is a failure, * but if ERESTART is returned, the driver may reset the HBA and try * again. */ rc = lpfc_config_port_prep(phba); if (rc == -ERESTART) { phba->hba_state = 0; continue; } else if (rc) { break; } phba->hba_state = LPFC_INIT_MBX_CMDS; lpfc_config_port(phba, pmb); rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); if (rc == MBX_SUCCESS) done = 1; else { lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "%d:0442 Adapter failed to init, mbxCmd x%x " "CONFIG_PORT, mbxStatus x%x Data: x%x\n", phba->brd_no, pmb->mb.mbxCommand, pmb->mb.mbxStatus, 0); phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE; } } if (!done) goto lpfc_sli_hba_setup_error; rc = lpfc_sli_ring_map(phba, pmb); if (rc) goto lpfc_sli_hba_setup_error; phba->sli.sli_flag |= LPFC_PROCESS_LA; rc = lpfc_config_port_post(phba); if (rc) goto lpfc_sli_hba_setup_error; goto lpfc_sli_hba_setup_exit;lpfc_sli_hba_setup_error: phba->hba_state = LPFC_HBA_ERROR;lpfc_sli_hba_setup_exit: mempool_free(pmb, phba->mbox_mem_pool); return rc;}static voidlpfc_mbox_abort(struct lpfc_hba * phba){ LPFC_MBOXQ_t *pmbox; MAILBOX_t *mb; if (phba->sli.mbox_active) { del_timer_sync(&phba->sli.mbox_tmo); phba->work_hba_events &= ~WORKER_MBOX_TMO; pmbox = phba->sli.mbox_active; mb = &pmbox->mb; phba->sli.mbox_active = NULL; if (pmbox->mbox_cmpl) { mb->mbxStatus = MBX_NOT_FINISHED; (pmbox->mbox_cmpl) (phba, pmbox); } phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; } /* Abort all the non active mailbox commands. */ spin_lock_irq(phba->host->host_lock); pmbox = lpfc_mbox_get(phba); while (pmbox) { mb = &pmbox->mb; if (pmbox->mbox_cmpl) { mb->mbxStatus = MBX_NOT_FINISHED; spin_unlock_irq(phba->host->host_lock); (pmbox->mbox_cmpl) (phba, pmbox); spin_lock_irq(phba->host->host_lock); } pmbox = lpfc_mbox_get(phba); } spin_unlock_irq(phba->host->host_lock); return;}/*! lpfc_mbox_timeout * * \pre * \post * \param hba Pointer to per struct lpfc_hba structure * \param l1 Pointer to the driver's mailbox queue. * \return * void * * \b Description: * * This routine handles mailbox timeout events at timer interrupt context. */voidlpfc_mbox_timeout(unsigned long ptr){ struct lpfc_hba *phba; unsigned long iflag; phba = (struct lpfc_hba *)ptr; spin_lock_irqsave(phba->host->host_lock, iflag); if (!(phba->work_hba_events & WORKER_MBOX_TMO)) { phba->work_hba_events |= WORKER_MBOX_TMO; if (phba->work_wait) wake_up(phba->work_wait); } spin_unlock_irqrestore(phba->host->host_lock, iflag);}voidlpfc_mbox_timeout_handler(struct lpfc_hba *phba){ LPFC_MBOXQ_t *pmbox; MAILBOX_t *mb; spin_lock_irq(phba->host->host_lock); if (!(phba->work_hba_events & WORKER_MBOX_TMO)) { spin_unlock_irq(phba->host->host_lock); return; } phba->work_hba_events &= ~WORKER_MBOX_TMO; pmbox = phba->sli.mbox_active; mb = &pmbox->mb; /* Mbox cmd <mbxCommand> timeout */ lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI, "%d:0310 Mailbox command x%x timeout Data: x%x x%x x%p\n", phba->brd_no, mb->mbxCommand, phba->hba_state, phba->sli.sli_flag, phba->sli.mbox_active); phba->sli.mbox_active = NULL; if (pmbox->mbox_cmpl) { mb->mbxStatus = MBX_NOT_FINISHED; spin_unlock_irq(phba->host->host_lock); (pmbox->mbox_cmpl) (phba, pmbox); spin_lock_irq(phba->host->host_lock); } phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; spin_unlock_irq(phba->host->host_lock); lpfc_mbox_abort(phba); return;}intlpfc_sli_issue_mbox(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmbox, uint32_t flag){ MAILBOX_t *mb; struct lpfc_sli *psli; uint32_t status, evtctr; uint32_t ha_copy; int i; unsigned long drvr_flag = 0; volatile uint32_t word0, ldata; void __iomem *to_slim; psli = &phba->sli; spin_lock_irqsave(phba->host->host_lock, drvr_flag); mb = &pmbox->mb; status = MBX_SUCCESS; if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) { /* Polling for a mbox command when another one is already active * is not allowed in SLI. Also, the driver must have established * SLI2 mode to queue and process multiple mbox commands. */ if (flag & MBX_POLL) { spin_unlock_irqrestore(phba->host->host_lock, drvr_flag); /* Mbox command <mbxCommand> cannot issue */ LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) return (MBX_NOT_FINISHED); } if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) { spin_unlock_irqrestore(phba->host->host_lock, drvr_flag); /* Mbox command <mbxCommand> cannot issue */ LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) return (MBX_NOT_FINISHED); } /* Handle STOP IOCB processing flag. This is only meaningful * if we are not polling for mbox completion. */ if (flag & MBX_STOP_IOCB) { flag &= ~MBX_STOP_IOCB; /* Now flag each ring */ for (i = 0; i < psli->num_rings; i++) { /* If the ring is active, flag it */ if (psli->ring[i].cmdringaddr) { psli->ring[i].flag |= LPFC_STOP_IOCB_MBX; } } } /* Another mailbox command is still being processed, queue this * command to be processed later. */ lpfc_mbox_put(phba, pmbox); /* Mbox cmd issue - BUSY */ lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI, "%d:0308 Mbox cmd issue - BUSY Data: x%x x%x x%x x%x\n", phba->brd_no, mb->mbxCommand, phba->hba_state, psli->sli_flag, flag); psli->slistat.mbox_busy++; spin_unlock_irqrestore(phba->host->host_lock, drvr_flag); return (MBX_BUSY); } /* Handle STOP IOCB processing flag. This is only meaningful * if we are not polling for mbox completion. */ if (flag & MBX_STOP_IOCB) { flag &= ~MBX_STOP_IOCB; if (flag == MBX_NOWAIT) { /* Now flag each ring */ for (i = 0; i < psli->num_rings; i++) { /* If the ring is active, flag it */ if (psli->ring[i].cmdringaddr) { psli->ring[i].flag |= LPFC_STOP_IOCB_MBX; } } } } psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE; /* If we are not polling, we MUST be in SLI2 mode */ if (flag != MBX_POLL) { if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) { psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; spin_unlock_irqrestore(phba->host->host_lock, drvr_flag); /* Mbox command <mbxCommand> cannot issue */ LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag); return (MBX_NOT_FINISHED); } /* timeout active mbox command */ mod_timer(&psli->mbox_tmo, jiffies + HZ * LPFC_MBOX_TMO); } /* Mailbox cmd <cmd> issue */ lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI, "%d:0309 Mailbox cmd x%x issue Data: x%x x%x x%x\n", phba->brd_no, mb->mbxCommand, phba->hba_state, psli->sli_flag, flag); psli->slistat.mbox_cmd++; evtctr = psli->slistat.mbox_event; /* next set own bit for the adapter and copy over command word */ mb->mbxOwner = OWN_CHIP; if (psli->sli_flag & LPFC_SLI2_ACTIVE) { /* First copy command data to host SLIM area */ lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE); } else { if (mb->mbxCommand == MBX_CONFIG_PORT) { /* copy command data into host mbox for cmpl */ lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE); } /* First copy mbox command data to HBA SLIM, skip past first word */ to_slim = phba->MBslimaddr + sizeof (uint32_t); lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0], MAILBOX_CMD_SIZE - sizeof (uint32_t)); /* Next copy over first word, with mbxOwner set */ ldata = *((volatile uint32_t *)mb); to_slim = phba->MBslimaddr; writel(ldata, to_slim); readl(to_slim); /* flush */ if (mb->mbxCommand == MBX_CONFIG_PORT) { /* switch over to host mailbox */ psli->sli_flag |= LPFC_SLI2_ACTIVE; } } wmb(); /* interrupt board to doit right away */ writel(CA_MBATT, phba->CAregaddr); readl(phba->CAregaddr); /* flush */ switch (flag) { case MBX_NOWAIT: /* Don't wait for it to finish, just return */ psli->mbox_active = pmbox; break; case MBX_POLL: i = 0; psli->mbox_active = NULL; if (psli->sli_flag & LPFC_SLI2_ACTIVE) { /* First read mbox status word */ word0 = *((volatile uint32_t *)&phba->slim2p->mbx); word0 = le32_to_cpu(word0); } else { /* First read mbox status word */ word0 = readl(phba->MBslimaddr); } /* Read the HBA Host Attention Register */ ha_copy = readl(phba->HAregaddr); /* Wait for command to complete */ while (((word0 & OWN_CHIP) == OWN_CHIP) || !(ha_copy & HA_MBATT)) { if (i++ >= 100) { psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; spin_unlock_irqrestore(phba->host->host_lock, drvr_flag); return (MBX_NOT_FINISHED); } /* Check if we took a mbox interrupt while we were polling */ if (((word0 & OWN_CHIP) != OWN_CHIP) && (evtctr != psli->slistat.mbox_event)) break; spin_unlock_irqrestore(phba->host->host_lock, drvr_flag); /* Can be in interrupt context, do not sleep */ /* (or might be called with interrupts disabled) */ mdelay(i); spin_lock_irqsave(phba->host->host_lock, drvr_flag); if (psli->sli_flag & LPFC_SLI2_ACTIVE) { /* First copy command data */ word0 = *((volatile uint32_t *) &phba->slim2p->mbx); word0 = le32_to_cpu(word0); if (mb->mbxCommand == MBX_CONFIG_PORT) { MAILBOX_t *slimmb; volatile uint32_t slimword0; /* Check real SLIM for any errors */ slimword0 = readl(phba->MBslimaddr); slimmb = (MAILBOX_t *) & slimword0; if (((slimword0 & OWN_CHIP) != OWN_CHIP) && slimmb->mbxStatus) { psli->sli_flag &= ~LPFC_SLI2_ACTIVE; word0 = slimword0; } } } else { /* First copy command data */ word0 = readl(phba->MBslimaddr); } /* Read the HBA Host Attention Register */ ha_copy = readl(phba->HAregaddr); } if (psli->sli_flag & LPFC_SLI2_ACTIVE) { /* copy results back to user */ lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb, MAILBOX_CMD_SIZE); } else { /* First copy command data */ lpfc_memcpy_from_slim(mb, phba->MBslimaddr, MAILBOX_CMD_SIZE); if ((mb->mbxCommand == MBX_DUMP_MEMORY) && pmbox->context2) { lpfc_memcpy_from_slim((void *)pmbox->context2, phba->MBslimaddr + DMP_RSP_OFFSET, mb->un.varDmp.word_cnt); } } writel(HA_MBATT, phba->HAregaddr); readl(phba->HAregaddr); /* flush */ psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; status = mb->mbxStatus; } spin_unlock_irqrestore(phba->host->host_lock, drvr_flag); return (status);}static intlpfc_sli_ringtx_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring, struct lpfc_iocbq * piocb)
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