aic79xx_reg.h_shipped

linux-2.6.15.6

#else
#define ahd_flags_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "FLAGS", 0xd8, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seqintctl_print;
#else
#define ahd_seqintctl_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "SEQINTCTL", 0xd9, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seqram_print;
#else
#define ahd_seqram_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "SEQRAM", 0xda, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_prgmcnt_print;
#else
#define ahd_prgmcnt_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "PRGMCNT", 0xde, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_accum_print;
#else
#define ahd_accum_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "ACCUM", 0xe0, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sindex_print;
#else
#define ahd_sindex_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "SINDEX", 0xe2, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_dindex_print;
#else
#define ahd_dindex_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "DINDEX", 0xe4, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_brkaddr1_print;
#else
#define ahd_brkaddr1_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "BRKADDR1", 0xe6, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_brkaddr0_print;
#else
#define ahd_brkaddr0_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "BRKADDR0", 0xe6, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_allones_print;
#else
#define ahd_allones_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "ALLONES", 0xe8, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_allzeros_print;
#else
#define ahd_allzeros_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "ALLZEROS", 0xea, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_none_print;
#else
#define ahd_none_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "NONE", 0xea, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sindir_print;
#else
#define ahd_sindir_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "SINDIR", 0xec, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_dindir_print;
#else
#define ahd_dindir_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "DINDIR", 0xed, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_function1_print;
#else
#define ahd_function1_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "FUNCTION1", 0xf0, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_stack_print;
#else
#define ahd_stack_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "STACK", 0xf2, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_curaddr_print;
#else
#define ahd_curaddr_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "CURADDR", 0xf4, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_intvec1_addr_print;
#else
#define ahd_intvec1_addr_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "INTVEC1_ADDR", 0xf4, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_intvec2_addr_print;
#else
#define ahd_intvec2_addr_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "INTVEC2_ADDR", 0xf6, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lastaddr_print;
#else
#define ahd_lastaddr_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "LASTADDR", 0xf6, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_longjmp_addr_print;
#else
#define ahd_longjmp_addr_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "LONGJMP_ADDR", 0xf8, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_accum_save_print;
#else
#define ahd_accum_save_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "ACCUM_SAVE", 0xfa, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_waiting_scb_tails_print;
#else
#define ahd_waiting_scb_tails_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "WAITING_SCB_TAILS", 0x100, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_ahd_pci_config_base_print;
#else
#define ahd_ahd_pci_config_base_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "AHD_PCI_CONFIG_BASE", 0x100, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_sram_base_print;
#else
#define ahd_sram_base_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "SRAM_BASE", 0x100, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_waiting_tid_head_print;
#else
#define ahd_waiting_tid_head_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "WAITING_TID_HEAD", 0x120, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_waiting_tid_tail_print;
#else
#define ahd_waiting_tid_tail_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "WAITING_TID_TAIL", 0x122, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_next_queued_scb_addr_print;
#else
#define ahd_next_queued_scb_addr_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "NEXT_QUEUED_SCB_ADDR", 0x124, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_complete_scb_head_print;
#else
#define ahd_complete_scb_head_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "COMPLETE_SCB_HEAD", 0x128, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_complete_scb_dmainprog_head_print;
#else
#define ahd_complete_scb_dmainprog_head_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "COMPLETE_SCB_DMAINPROG_HEAD", 0x12a, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_complete_dma_scb_head_print;
#else
#define ahd_complete_dma_scb_head_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "COMPLETE_DMA_SCB_HEAD", 0x12c, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_qfreeze_count_print;
#else
#define ahd_qfreeze_count_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "QFREEZE_COUNT", 0x12e, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_saved_mode_print;
#else
#define ahd_saved_mode_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "SAVED_MODE", 0x130, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_msg_out_print;
#else
#define ahd_msg_out_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "MSG_OUT", 0x131, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_dmaparams_print;
#else
#define ahd_dmaparams_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "DMAPARAMS", 0x132, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seq_flags_print;
#else
#define ahd_seq_flags_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "SEQ_FLAGS", 0x133, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_saved_scsiid_print;
#else
#define ahd_saved_scsiid_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "SAVED_SCSIID", 0x134, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_saved_lun_print;
#else
#define ahd_saved_lun_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "SAVED_LUN", 0x135, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_lastphase_print;
#else
#define ahd_lastphase_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "LASTPHASE", 0x136, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_qoutfifo_entry_valid_tag_print;
#else
#define ahd_qoutfifo_entry_valid_tag_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "QOUTFIFO_ENTRY_VALID_TAG", 0x137, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_shared_data_addr_print;
#else
#define ahd_shared_data_addr_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "SHARED_DATA_ADDR", 0x138, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_qoutfifo_next_addr_print;
#else
#define ahd_qoutfifo_next_addr_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "QOUTFIFO_NEXT_ADDR", 0x13c, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_kernel_tqinpos_print;
#else
#define ahd_kernel_tqinpos_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "KERNEL_TQINPOS", 0x140, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_tqinpos_print;
#else
#define ahd_tqinpos_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "TQINPOS", 0x141, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_arg_1_print;
#else
#define ahd_arg_1_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "ARG_1", 0x142, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_arg_2_print;
#else
#define ahd_arg_2_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "ARG_2", 0x143, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_last_msg_print;
#else
#define ahd_last_msg_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "LAST_MSG", 0x144, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scsiseq_template_print;
#else
#define ahd_scsiseq_template_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "SCSISEQ_TEMPLATE", 0x145, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_initiator_tag_print;
#else
#define ahd_initiator_tag_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "INITIATOR_TAG", 0x146, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_seq_flags2_print;
#else
#define ahd_seq_flags2_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "SEQ_FLAGS2", 0x147, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_allocfifo_scbptr_print;
#else
#define ahd_allocfifo_scbptr_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "ALLOCFIFO_SCBPTR", 0x148, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_int_coalescing_timer_print;
#else
#define ahd_int_coalescing_timer_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "INT_COALESCING_TIMER", 0x14a, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_int_coalescing_maxcmds_print;
#else
#define ahd_int_coalescing_maxcmds_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "INT_COALESCING_MAXCMDS", 0x14c, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_int_coalescing_mincmds_print;
#else
#define ahd_int_coalescing_mincmds_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "INT_COALESCING_MINCMDS", 0x14d, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_cmds_pending_print;
#else
#define ahd_cmds_pending_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "CMDS_PENDING", 0x14e, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_int_coalescing_cmdcount_print;
#else
#define ahd_int_coalescing_cmdcount_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "INT_COALESCING_CMDCOUNT", 0x150, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_local_hs_mailbox_print;
#else
#define ahd_local_hs_mailbox_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "LOCAL_HS_MAILBOX", 0x151, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_cmdsize_table_print;
#else
#define ahd_cmdsize_table_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "CMDSIZE_TABLE", 0x152, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_base_print;
#else
#define ahd_scb_base_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "SCB_BASE", 0x180, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_residual_datacnt_print;
#else
#define ahd_scb_residual_datacnt_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "SCB_RESIDUAL_DATACNT", 0x180, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_residual_sgptr_print;
#else
#define ahd_scb_residual_sgptr_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "SCB_RESIDUAL_SGPTR", 0x184, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_scsi_status_print;
#else
#define ahd_scb_scsi_status_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "SCB_SCSI_STATUS", 0x188, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_target_phases_print;
#else
#define ahd_scb_target_phases_print(regvalue, cur_col, wrap) \
    ahd_print_register(NULL, 0, "SCB_TARGET_PHASES", 0x189, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahd_reg_print_t ahd_scb_target_data_dir_print;