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📄 i2ellis.h

📁 linux-2.6.15.6
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/*********************************************************************************   (c) 1999 by Computone Corporation************************************************************************************   PACKAGE:     Linux tty Device Driver for IntelliPort II family of multiport*                serial I/O controllers.**   DESCRIPTION: Mainline code for the device driver********************************************************************************///------------------------------------------------------------------------------// i2ellis.h//// IntelliPort-II and IntelliPort-IIEX//// Extremely// Low// Level// Interface// Services//// Structure Definitions and declarations for "ELLIS" service routines found in// i2ellis.c//// These routines are based on properties of the IntelliPort-II and -IIEX// hardware and bootstrap firmware, and are not sensitive to particular// conventions of any particular loadware.//// Unlike i2hw.h, which provides IRONCLAD hardware definitions, the material// here and in i2ellis.c is intended to provice a useful, but not required,// layer of insulation from the hardware specifics.//------------------------------------------------------------------------------#ifndef  I2ELLIS_H   /* To prevent multiple includes */#define  I2ELLIS_H   1//------------------------------------------------// Revision History://// 30 September 1991 MAG First Draft Started// 12 October   1991 ...continued...//// 20 December  1996 AKM Linux version//-------------------------------------------------//----------------------// Mandatory Includes://----------------------#include <linux/config.h>#include "ip2types.h"#include "i2hw.h"       // The hardware definitions//------------------------------------------// STAT_BOXIDS packets//------------------------------------------#define MAX_BOX		4typedef struct _bidStat{	unsigned char bid_value[MAX_BOX];} bidStat, *bidStatPtr;// This packet is sent in response to a CMD_GET_BOXIDS bypass command. For -IIEX// boards, reports the hardware-specific "asynchronous resource register" on// each expansion box. Boxes not present report 0xff. For -II boards, the first// element contains 0x80 for 8-port, 0x40 for 4-port boards.// Box IDs aka ARR or Async Resource Register (more than you want to know)//   7   6   5   4   3   2   1   0//   F   F   N   N   L   S   S   S//   =============================//   F   F   -  Product Family Designator//   =====+++++++++++++++++++++++++++++++//   0   0   -  Intelliport II EX / ISA-8//   1   0   -  IntelliServer//   0   1   -  SAC - Port Device (Intelliport III ??? )//           =====+++++++++++++++++++++++++++++++++++++++//           N   N   -  Number of Ports//           0   0   -  8  (eight)//           0   1   -  4  (four)//           1   0   -  12 (twelve)//           1   1   -  16 (sixteen)//                   =++++++++++++++++++++++++++++++++++//                   L  -   LCD Display Module Present//                   0  -   No//                   1  -   LCD module present//                   =========+++++++++++++++++++++++++++++++++++++//                      S   S   S - Async Signals Supported Designator//                      0   0   0 - 8dss, Mod DCE DB25 Female//                      0   0   1 - 6dss, RJ-45//                      0   1   0 - RS-232/422 dss, DB25 Female//                      0   1   1 - RS-232/422 dss, separate 232/422 DB25 Female//                      1   0   0 - 6dss, 921.6 I/F with ST654's//                      1   0   1 - RS-423/232 8dss, RJ-45 10Pin//                      1   1   0 - 6dss, Mod DCE DB25 Female//                      1   1   1 - NO BOX PRESENT#define FF(c)	((c & 0xC0) >> 6)#define NN(c)	((c & 0x30) >> 4)#define L(c)	((c & 0x08) >> 3)#define SSS(c)	 (c & 0x07)#define BID_HAS_654(x)	(SSS(x) == 0x04)#define BID_NO_BOX	0xff /* no box */#define BID_8PORT  	0x80 /* IP2-8 port */#define BID_4PORT   	0x81 /* IP2-4 port */#define BID_EXP_MASK   	0x30 /* IP2-EX  */#define BID_EXP_8PORT	0x00 /*     8, */#define BID_EXP_4PORT	0x10 /*     4, */#define BID_EXP_UNDEF	0x20 /*     UNDEF, */#define BID_EXP_16PORT	0x30 /*    16, */#define BID_LCD_CTRL   	0x08 /* LCD Controller */#define BID_LCD_NONE	0x00 /* - no controller present */#define BID_LCD_PRES   	0x08 /* - controller present */#define BID_CON_MASK	0x07 /* - connector pinouts */#define BID_CON_DB25	0x00 /* - DB-25 F */#define BID_CON_RJ45	0x01 /* - rj45 *///------------------------------------------------------------------------------// i2eBordStr//// This structure contains all the information the ELLIS routines require in// dealing with a particular board.//------------------------------------------------------------------------------// There are some queues here which are guaranteed to never contain the entry// for a single channel twice. So they must be slightly larger to allow// unambiguous full/empty management//#define CH_QUEUE_SIZE ABS_MOST_PORTS+2typedef struct _i2eBordStr{	porStr         i2ePom;	// Structure containing the power-on message.	unsigned short i2ePomSize;						// The number of bytes actually read if						// different from sizeof i2ePom, indicates						// there is an error!	unsigned short i2eStartMail;						// Contains whatever inbound mailbox data						// present at startup. NO_MAIL_HERE indicates						// nothing was present. No special						// significance as of this writing, but may be						// useful for diagnostic reasons.	unsigned short i2eValid;						// Indicates validity of the structure; if						// i2eValid == I2E_MAGIC, then we can trust						// the other fields. Some (especially						// initialization) functions are good about						// checking for validity.  Many functions do						// not, it being assumed that the larger						// context assures we are using a valid						// i2eBordStrPtr.	unsigned short i2eError;						// Used for returning an error condition from						// several functions which use i2eBordStrPtr						// as an argument.	// Accelerators to characterize separate features of a board, derived from a	// number of sources.	unsigned short i2eFifoSize;						// Always, the size of the FIFO. For						// IntelliPort-II, always the same, for -IIEX						// taken from the Power-On reset message.	volatile 	unsigned short i2eFifoRemains;						// Used during normal operation to indicate a						// lower bound on the amount of data which						// might be in the outbound fifo.	unsigned char  i2eFifoStyle;						// Accelerator which tells which style (-II or						// -IIEX) FIFO we are using.	unsigned char  i2eDataWidth16;						// Accelerator which tells whether we should						// do 8 or 16-bit data transfers.	unsigned char  i2eMaxIrq;						// The highest allowable IRQ, based on the						// slot size.	unsigned char  i2eChangeIrq;						// Whether tis valid to change IRQ's						// ISA = ok, EISA, MicroChannel, no	// Accelerators for various addresses on the board	int            i2eBase;        // I/O Address of the Board	int            i2eData;        // From here data transfers happen	int            i2eStatus;      // From here status reads happen	int            i2ePointer;     // (IntelliPort-II: pointer/commands)	int            i2eXMail;       // (IntelliPOrt-IIEX: mailboxes	int            i2eXMask;       // (IntelliPort-IIEX: mask write	//-------------------------------------------------------	// Information presented in a common format across boards	// For each box, bit map of the channels present.  Box closest to 	// the host is box 0. LSB is channel 0. IntelliPort-II (non-expandable)	// is taken to be box 0. These are derived from product i.d. registers.	unsigned short i2eChannelMap[ABS_MAX_BOXES];	// Same as above, except each is derived from firmware attempting to detect	// the uart presence (by reading a valid GFRCR register). If bits are set in	// i2eChannelMap and not in i2eGoodMap, there is a potential problem.	unsigned short i2eGoodMap[ABS_MAX_BOXES];	// ---------------------------	// For indirect function calls	// Routine to cause an N-millisecond delay: Patched by the ii2Initialize	// function.	void  (*i2eDelay)(unsigned int);	// Routine to write N bytes to the board through the FIFO. Returns true if	// all copacetic, otherwise returns false and error is in i2eError field.	// IF COUNT IS ODD, ROUNDS UP TO THE NEXT EVEN NUMBER.	int   (*i2eWriteBuf)(struct _i2eBordStr *, unsigned char *, int);	// Routine to read N bytes from the board through the FIFO. Returns true if	// copacetic, otherwise returns false and error in i2eError.	// IF COUNT IS ODD, ROUNDS UP TO THE NEXT EVEN NUMBER.	int   (*i2eReadBuf)(struct _i2eBordStr *, unsigned char *, int);	// Returns a word from FIFO. Will use 2 byte operations if needed.	unsigned short (*i2eReadWord)(struct _i2eBordStr *);	// Writes a word to FIFO. Will use 2 byte operations if needed.	void  (*i2eWriteWord)(struct _i2eBordStr *, unsigned short);	// Waits specified time for the Transmit FIFO to go empty. Returns true if	//  ok, otherwise returns false and error in i2eError.	int   (*i2eWaitForTxEmpty)(struct _i2eBordStr *, int);	// Returns true or false according to whether the outgoing mailbox is empty.	int   (*i2eTxMailEmpty)(struct _i2eBordStr *);	// Checks whether outgoing mailbox is empty.  If so, sends mail and returns	// true.  Otherwise returns false.	int   (*i2eTrySendMail)(struct _i2eBordStr *, unsigned char);	// If no mail available, returns NO_MAIL_HERE, else returns the value in the	// mailbox (guaranteed can't be NO_MAIL_HERE).	unsigned short (*i2eGetMail)(struct _i2eBordStr *);	// Enables the board to interrupt the host when it writes to the mailbox.	// Irqs will not occur, however, until the loadware separately enables	// interrupt generation to the host.  The standard loadware does this in	// response to a command packet sent by the host. (Also, disables	// any other potential interrupt sources from the board -- other than the	// inbound mailbox).	void  (*i2eEnableMailIrq)(struct _i2eBordStr *);	// Writes an arbitrary value to the mask register.	void  (*i2eWriteMask)(struct _i2eBordStr *, unsigned char);	// State information	// During downloading, indicates the number of blocks remaining to download	// to the board.	short i2eToLoad;	// State of board (see manifests below) (e.g., whether in reset condition,	// whether standard loadware is installed, etc.	unsigned char  i2eState;	// These three fields are only valid when there is loadware running on the	// board. (i2eState == II_STATE_LOADED or i2eState == II_STATE_STDLOADED )	unsigned char  i2eLVersion;  // Loadware version	unsigned char  i2eLRevision; // Loadware revision	unsigned char  i2eLSub;      // Loadware subrevision	// Flags which only have meaning in the context of the standard loadware.	// Somewhat violates the layering concept, but there is so little additional	// needed at the board level (while much additional at the channel level),	// that this beats maintaining two different per-board structures.	// Indicates which IRQ the board has been initialized (from software) to use	// For MicroChannel boards, any value different from IRQ_UNDEFINED means	// that the software command has been sent to enable interrupts (or specify	// they are disabled). Special value: IRQ_UNDEFINED indicates that the	// software command to select the interrupt has not yet been sent, therefore	// (since the standard loadware insists that it be sent before any other	// packets are sent) no other packets should be sent yet.	unsigned short i2eUsingIrq;

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