📄 mpi_targ.h
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#define TARGET_ASSIST_EXT_EEDP_T10_CHK_APPTAG (0x0200)#define TARGET_ASSIST_EXT_EEDP_T10_CHK_REFTAG (0x0400)#define TARGET_ASSIST_EXT_EEDP_T10_CHK_SHIFT (8)#define TARGET_ASSIST_EXT_EEDP_INC_SEC_APPTAG (0x1000)#define TARGET_ASSIST_EXT_EEDP_INC_PRI_APPTAG (0x2000)#define TARGET_ASSIST_EXT_EEDP_INC_SEC_REFTAG (0x4000)#define TARGET_ASSIST_EXT_EEDP_INC_PRI_REFTAG (0x8000)/****************************************************************************//* Target Status Send Request *//****************************************************************************/typedef struct _MSG_TARGET_STATUS_SEND_REQUEST{ U8 StatusCode; /* 00h */ U8 StatusFlags; /* 01h */ U8 ChainOffset; /* 02h */ U8 Function; /* 03h */ U16 QueueTag; /* 04h */ U8 Reserved; /* 06h */ U8 MsgFlags; /* 07h */ U32 MsgContext; /* 08h */ U32 ReplyWord; /* 0Ch */ U8 LUN[8]; /* 10h */ SGE_SIMPLE_UNION StatusDataSGE; /* 18h */} MSG_TARGET_STATUS_SEND_REQUEST, MPI_POINTER PTR_MSG_TARGET_STATUS_SEND_REQUEST, TargetStatusSendRequest_t, MPI_POINTER pTargetStatusSendRequest_t;#define TARGET_STATUS_SEND_FLAGS_AUTO_GOOD_STATUS (0x01)#define TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY (0x04)#define TARGET_STATUS_SEND_FLAGS_CONFIRMED (0x08)#define TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER (0x80)/* * NOTE: FCP_RSP data is big-endian. When used on a little-endian system, this * structure properly orders the bytes. */typedef struct _MPI_TARGET_FCP_RSP_BUFFER{ U8 Reserved0[8]; /* 00h */ U8 Reserved1[2]; /* 08h */ U8 FcpFlags; /* 0Ah */ U8 FcpStatus; /* 0Bh */ U32 FcpResid; /* 0Ch */ U32 FcpSenseLength; /* 10h */ U32 FcpResponseLength; /* 14h */ U8 FcpResponseData[8]; /* 18h */ U8 FcpSenseData[32]; /* Pad to 64 bytes */ /* 20h */} MPI_TARGET_FCP_RSP_BUFFER, MPI_POINTER PTR_MPI_TARGET_FCP_RSP_BUFFER, MpiTargetFcpRspBuffer, MPI_POINTER pMpiTargetFcpRspBuffer;/* * NOTE: The SPI status IU is big-endian. When used on a little-endian system, * this structure properly orders the bytes. */typedef struct _MPI_TARGET_SCSI_SPI_STATUS_IU{ U8 Reserved0; /* 00h */ U8 Reserved1; /* 01h */ U8 Valid; /* 02h */ U8 Status; /* 03h */ U32 SenseDataListLength; /* 04h */ U32 PktFailuresListLength; /* 08h */ U8 SenseData[52]; /* Pad the IU to 64 bytes */ /* 0Ch */} MPI_TARGET_SCSI_SPI_STATUS_IU, MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_STATUS_IU, TargetScsiSpiStatusIU_t, MPI_POINTER pTargetScsiSpiStatusIU_t;/* * NOTE: The SSP status IU is big-endian. When used on a little-endian system, * this structure properly orders the bytes. */typedef struct _MPI_TARGET_SSP_RSP_IU{ U32 Reserved0[6]; /* reserved for SSP header */ /* 00h */ /* start of RESPONSE information unit */ U32 Reserved1; /* 18h */ U32 Reserved2; /* 1Ch */ U16 Reserved3; /* 20h */ U8 DataPres; /* lower 2 bits */ /* 22h */ U8 Status; /* 23h */ U32 Reserved4; /* 24h */ U32 SenseDataLength; /* 28h */ U32 ResponseDataLength; /* 2Ch */ U8 ResponseSenseData[4]; /* 30h */} MPI_TARGET_SSP_RSP_IU, MPI_POINTER PTR_MPI_TARGET_SSP_RSP_IU, MpiTargetSspRspIu_t, MPI_POINTER pMpiTargetSspRspIu_t;/****************************************************************************//* Target Mode Abort Request *//****************************************************************************/typedef struct _MSG_TARGET_MODE_ABORT_REQUEST{ U8 AbortType; /* 00h */ U8 Reserved; /* 01h */ U8 ChainOffset; /* 02h */ U8 Function; /* 03h */ U16 Reserved1; /* 04h */ U8 Reserved2; /* 06h */ U8 MsgFlags; /* 07h */ U32 MsgContext; /* 08h */ U32 ReplyWord; /* 0Ch */ U32 MsgContextToAbort; /* 10h */} MSG_TARGET_MODE_ABORT, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT, TargetModeAbort_t, MPI_POINTER pTargetModeAbort_t;#define TARGET_MODE_ABORT_TYPE_ALL_CMD_BUFFERS (0x00)#define TARGET_MODE_ABORT_TYPE_ALL_IO (0x01)#define TARGET_MODE_ABORT_TYPE_EXACT_IO (0x02)#define TARGET_MODE_ABORT_TYPE_EXACT_IO_REQUEST (0x03)/* Target Mode Abort Reply */typedef struct _MSG_TARGET_MODE_ABORT_REPLY{ U16 Reserved; /* 00h */ U8 MsgLength; /* 02h */ U8 Function; /* 03h */ U16 Reserved1; /* 04h */ U8 Reserved2; /* 06h */ U8 MsgFlags; /* 07h */ U32 MsgContext; /* 08h */ U16 Reserved3; /* 0Ch */ U16 IOCStatus; /* 0Eh */ U32 IOCLogInfo; /* 10h */ U32 AbortCount; /* 14h */} MSG_TARGET_MODE_ABORT_REPLY, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT_REPLY, TargetModeAbortReply_t, MPI_POINTER pTargetModeAbortReply_t;/****************************************************************************//* Target Mode Context Reply *//****************************************************************************/#define TARGET_MODE_REPLY_IO_INDEX_MASK (0x00003FFF)#define TARGET_MODE_REPLY_IO_INDEX_SHIFT (0)#define TARGET_MODE_REPLY_INITIATOR_INDEX_MASK (0x03FFC000)#define TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT (14)#define TARGET_MODE_REPLY_ALIAS_MASK (0x04000000)#define TARGET_MODE_REPLY_ALIAS_SHIFT (26)#define TARGET_MODE_REPLY_PORT_MASK (0x10000000)#define TARGET_MODE_REPLY_PORT_SHIFT (28)#define GET_IO_INDEX(x) (((x) & TARGET_MODE_REPLY_IO_INDEX_MASK) \ >> TARGET_MODE_REPLY_IO_INDEX_SHIFT)#define SET_IO_INDEX(t, i) \ ((t) = ((t) & ~TARGET_MODE_REPLY_IO_INDEX_MASK) | \ (((i) << TARGET_MODE_REPLY_IO_INDEX_SHIFT) & \ TARGET_MODE_REPLY_IO_INDEX_MASK))#define GET_INITIATOR_INDEX(x) (((x) & TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) \ >> TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT)#define SET_INITIATOR_INDEX(t, ii) \ ((t) = ((t) & ~TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) | \ (((ii) << TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT) & \ TARGET_MODE_REPLY_INITIATOR_INDEX_MASK))#define GET_ALIAS(x) (((x) & TARGET_MODE_REPLY_ALIAS_MASK) \ >> TARGET_MODE_REPLY_ALIAS_SHIFT)#define SET_ALIAS(t, a) ((t) = ((t) & ~TARGET_MODE_REPLY_ALIAS_MASK) | \ (((a) << TARGET_MODE_REPLY_ALIAS_SHIFT) & \ TARGET_MODE_REPLY_ALIAS_MASK))#define GET_PORT(x) (((x) & TARGET_MODE_REPLY_PORT_MASK) \ >> TARGET_MODE_REPLY_PORT_SHIFT)#define SET_PORT(t, p) ((t) = ((t) & ~TARGET_MODE_REPLY_PORT_MASK) | \ (((p) << TARGET_MODE_REPLY_PORT_SHIFT) & \ TARGET_MODE_REPLY_PORT_MASK))/* the following obsolete values are for MPI v1.0 support */#define TARGET_MODE_REPLY_0100_MASK_HOST_INDEX (0x000003FF)#define TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX (0)#define TARGET_MODE_REPLY_0100_MASK_IOC_INDEX (0x001FF800)#define TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX (11)#define TARGET_MODE_REPLY_0100_PORT_MASK (0x00400000)#define TARGET_MODE_REPLY_0100_PORT_SHIFT (22)#define TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX (0x1F800000)#define TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX (23)#define GET_HOST_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) \ >> TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX)#define SET_HOST_INDEX_0100(t, hi) \ ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) | \ (((hi) << TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX) & \ TARGET_MODE_REPLY_0100_MASK_HOST_INDEX))#define GET_IOC_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) \ >> TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX)#define SET_IOC_INDEX_0100(t, ii) \ ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) | \ (((ii) << TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX) & \ TARGET_MODE_REPLY_0100_MASK_IOC_INDEX))#define GET_INITIATOR_INDEX_0100(x) \ (((x) & TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) \ >> TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX)#define SET_INITIATOR_INDEX_0100(t, ii) \ ((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) | \ (((ii) << TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX) & \ TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX))#endif
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