📄 mpi_cnfg.h
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U8 Reserved[3]; /* 11h */ U32 ClassCode; /* 14h */ U16 SubsystemVendorID; /* 18h */ U16 SubsystemID; /* 1Ah */} CONFIG_PAGE_IOC_0, MPI_POINTER PTR_CONFIG_PAGE_IOC_0, IOCPage0_t, MPI_POINTER pIOCPage0_t;#define MPI_IOCPAGE0_PAGEVERSION (0x01)typedef struct _CONFIG_PAGE_IOC_1{ CONFIG_PAGE_HEADER Header; /* 00h */ U32 Flags; /* 04h */ U32 CoalescingTimeout; /* 08h */ U8 CoalescingDepth; /* 0Ch */ U8 PCISlotNum; /* 0Dh */ U8 Reserved[2]; /* 0Eh */} CONFIG_PAGE_IOC_1, MPI_POINTER PTR_CONFIG_PAGE_IOC_1, IOCPage1_t, MPI_POINTER pIOCPage1_t;#define MPI_IOCPAGE1_PAGEVERSION (0x03)/* defines for the Flags field */#define MPI_IOCPAGE1_EEDP_MODE_MASK (0x07000000)#define MPI_IOCPAGE1_EEDP_MODE_OFF (0x00000000)#define MPI_IOCPAGE1_EEDP_MODE_T10 (0x01000000)#define MPI_IOCPAGE1_EEDP_MODE_LSI_1 (0x02000000)#define MPI_IOCPAGE1_INITIATOR_CONTEXT_REPLY_DISABLE (0x00000010)#define MPI_IOCPAGE1_REPLY_COALESCING (0x00000001)#define MPI_IOCPAGE1_PCISLOTNUM_UNKNOWN (0xFF)typedef struct _CONFIG_PAGE_IOC_2_RAID_VOL{ U8 VolumeID; /* 00h */ U8 VolumeBus; /* 01h */ U8 VolumeIOC; /* 02h */ U8 VolumePageNumber; /* 03h */ U8 VolumeType; /* 04h */ U8 Flags; /* 05h */ U16 Reserved3; /* 06h */} CONFIG_PAGE_IOC_2_RAID_VOL, MPI_POINTER PTR_CONFIG_PAGE_IOC_2_RAID_VOL, ConfigPageIoc2RaidVol_t, MPI_POINTER pConfigPageIoc2RaidVol_t;/* IOC Page 2 Volume RAID Type values, also used in RAID Volume pages */#define MPI_RAID_VOL_TYPE_IS (0x00)#define MPI_RAID_VOL_TYPE_IME (0x01)#define MPI_RAID_VOL_TYPE_IM (0x02)#define MPI_RAID_VOL_TYPE_RAID_5 (0x03)#define MPI_RAID_VOL_TYPE_RAID_6 (0x04)#define MPI_RAID_VOL_TYPE_RAID_10 (0x05)#define MPI_RAID_VOL_TYPE_RAID_50 (0x06)#define MPI_RAID_VOL_TYPE_UNKNOWN (0xFF)/* IOC Page 2 Volume Flags values */#define MPI_IOCPAGE2_FLAG_VOLUME_INACTIVE (0x08)/* * Host code (drivers, BIOS, utilities, etc.) should leave this define set to * one and check Header.PageLength at runtime. */#ifndef MPI_IOC_PAGE_2_RAID_VOLUME_MAX#define MPI_IOC_PAGE_2_RAID_VOLUME_MAX (1)#endiftypedef struct _CONFIG_PAGE_IOC_2{ CONFIG_PAGE_HEADER Header; /* 00h */ U32 CapabilitiesFlags; /* 04h */ U8 NumActiveVolumes; /* 08h */ U8 MaxVolumes; /* 09h */ U8 NumActivePhysDisks; /* 0Ah */ U8 MaxPhysDisks; /* 0Bh */ CONFIG_PAGE_IOC_2_RAID_VOL RaidVolume[MPI_IOC_PAGE_2_RAID_VOLUME_MAX];/* 0Ch */} CONFIG_PAGE_IOC_2, MPI_POINTER PTR_CONFIG_PAGE_IOC_2, IOCPage2_t, MPI_POINTER pIOCPage2_t;#define MPI_IOCPAGE2_PAGEVERSION (0x03)/* IOC Page 2 Capabilities flags */#define MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT (0x00000001)#define MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT (0x00000002)#define MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT (0x00000004)#define MPI_IOCPAGE2_CAP_FLAGS_RAID_5_SUPPORT (0x00000008)#define MPI_IOCPAGE2_CAP_FLAGS_RAID_6_SUPPORT (0x00000010)#define MPI_IOCPAGE2_CAP_FLAGS_RAID_10_SUPPORT (0x00000020)#define MPI_IOCPAGE2_CAP_FLAGS_RAID_50_SUPPORT (0x00000040)#define MPI_IOCPAGE2_CAP_FLAGS_SES_SUPPORT (0x20000000)#define MPI_IOCPAGE2_CAP_FLAGS_SAFTE_SUPPORT (0x40000000)#define MPI_IOCPAGE2_CAP_FLAGS_CROSS_CHANNEL_SUPPORT (0x80000000)typedef struct _IOC_3_PHYS_DISK{ U8 PhysDiskID; /* 00h */ U8 PhysDiskBus; /* 01h */ U8 PhysDiskIOC; /* 02h */ U8 PhysDiskNum; /* 03h */} IOC_3_PHYS_DISK, MPI_POINTER PTR_IOC_3_PHYS_DISK, Ioc3PhysDisk_t, MPI_POINTER pIoc3PhysDisk_t;/* * Host code (drivers, BIOS, utilities, etc.) should leave this define set to * one and check Header.PageLength at runtime. */#ifndef MPI_IOC_PAGE_3_PHYSDISK_MAX#define MPI_IOC_PAGE_3_PHYSDISK_MAX (1)#endiftypedef struct _CONFIG_PAGE_IOC_3{ CONFIG_PAGE_HEADER Header; /* 00h */ U8 NumPhysDisks; /* 04h */ U8 Reserved1; /* 05h */ U16 Reserved2; /* 06h */ IOC_3_PHYS_DISK PhysDisk[MPI_IOC_PAGE_3_PHYSDISK_MAX]; /* 08h */} CONFIG_PAGE_IOC_3, MPI_POINTER PTR_CONFIG_PAGE_IOC_3, IOCPage3_t, MPI_POINTER pIOCPage3_t;#define MPI_IOCPAGE3_PAGEVERSION (0x00)typedef struct _IOC_4_SEP{ U8 SEPTargetID; /* 00h */ U8 SEPBus; /* 01h */ U16 Reserved; /* 02h */} IOC_4_SEP, MPI_POINTER PTR_IOC_4_SEP, Ioc4Sep_t, MPI_POINTER pIoc4Sep_t;/* * Host code (drivers, BIOS, utilities, etc.) should leave this define set to * one and check Header.PageLength at runtime. */#ifndef MPI_IOC_PAGE_4_SEP_MAX#define MPI_IOC_PAGE_4_SEP_MAX (1)#endiftypedef struct _CONFIG_PAGE_IOC_4{ CONFIG_PAGE_HEADER Header; /* 00h */ U8 ActiveSEP; /* 04h */ U8 MaxSEP; /* 05h */ U16 Reserved1; /* 06h */ IOC_4_SEP SEP[MPI_IOC_PAGE_4_SEP_MAX]; /* 08h */} CONFIG_PAGE_IOC_4, MPI_POINTER PTR_CONFIG_PAGE_IOC_4, IOCPage4_t, MPI_POINTER pIOCPage4_t;#define MPI_IOCPAGE4_PAGEVERSION (0x00)typedef struct _IOC_5_HOT_SPARE{ U8 PhysDiskNum; /* 00h */ U8 Reserved; /* 01h */ U8 HotSparePool; /* 02h */ U8 Flags; /* 03h */} IOC_5_HOT_SPARE, MPI_POINTER PTR_IOC_5_HOT_SPARE, Ioc5HotSpare_t, MPI_POINTER pIoc5HotSpare_t;/* IOC Page 5 HotSpare Flags */#define MPI_IOC_PAGE_5_HOT_SPARE_ACTIVE (0x01)/* * Host code (drivers, BIOS, utilities, etc.) should leave this define set to * one and check Header.PageLength at runtime. */#ifndef MPI_IOC_PAGE_5_HOT_SPARE_MAX#define MPI_IOC_PAGE_5_HOT_SPARE_MAX (1)#endiftypedef struct _CONFIG_PAGE_IOC_5{ CONFIG_PAGE_HEADER Header; /* 00h */ U32 Reserved1; /* 04h */ U8 NumHotSpares; /* 08h */ U8 Reserved2; /* 09h */ U16 Reserved3; /* 0Ah */ IOC_5_HOT_SPARE HotSpare[MPI_IOC_PAGE_5_HOT_SPARE_MAX]; /* 0Ch */} CONFIG_PAGE_IOC_5, MPI_POINTER PTR_CONFIG_PAGE_IOC_5, IOCPage5_t, MPI_POINTER pIOCPage5_t;#define MPI_IOCPAGE5_PAGEVERSION (0x00)/***************************************************************************** BIOS Config Pages****************************************************************************/typedef struct _CONFIG_PAGE_BIOS_1{ CONFIG_PAGE_HEADER Header; /* 00h */ U32 BiosOptions; /* 04h */ U32 IOCSettings; /* 08h */ U32 Reserved1; /* 0Ch */ U32 DeviceSettings; /* 10h */ U16 NumberOfDevices; /* 14h */ U16 Reserved2; /* 16h */ U16 IOTimeoutBlockDevicesNonRM; /* 18h */ U16 IOTimeoutSequential; /* 1Ah */ U16 IOTimeoutOther; /* 1Ch */ U16 IOTimeoutBlockDevicesRM; /* 1Eh */} CONFIG_PAGE_BIOS_1, MPI_POINTER PTR_CONFIG_PAGE_BIOS_1, BIOSPage1_t, MPI_POINTER pBIOSPage1_t;#define MPI_BIOSPAGE1_PAGEVERSION (0x02)/* values for the BiosOptions field */#define MPI_BIOSPAGE1_OPTIONS_SPI_ENABLE (0x00000400)#define MPI_BIOSPAGE1_OPTIONS_FC_ENABLE (0x00000200)#define MPI_BIOSPAGE1_OPTIONS_SAS_ENABLE (0x00000100)#define MPI_BIOSPAGE1_OPTIONS_DISABLE_BIOS (0x00000001)/* values for the IOCSettings field */#define MPI_BIOSPAGE1_IOCSET_MASK_PORT_ENABLE_DELAY (0x00F00000)#define MPI_BIOSPAGE1_IOCSET_SHIFT_PORT_ENABLE_DELAY (20)#define MPI_BIOSPAGE1_IOCSET_MASK_BOOT_PREFERENCE (0x00030000)#define MPI_BIOSPAGE1_IOCSET_ENCLOSURE_SLOT_BOOT (0x00000000)#define MPI_BIOSPAGE1_IOCSET_SAS_ADDRESS_BOOT (0x00010000)#define MPI_BIOSPAGE1_IOCSET_MASK_MAX_TARGET_SPIN_UP (0x0000F000)#define MPI_BIOSPAGE1_IOCSET_SHIFT_MAX_TARGET_SPIN_UP (12)#define MPI_BIOSPAGE1_IOCSET_MASK_SPINUP_DELAY (0x00000F00)#define MPI_BIOSPAGE1_IOCSET_SHIFT_SPINUP_DELAY (8)#define MPI_BIOSPAGE1_IOCSET_MASK_RM_SETTING (0x000000C0)#define MPI_BIOSPAGE1_IOCSET_NONE_RM_SETTING (0x00000000)#define MPI_BIOSPAGE1_IOCSET_BOOT_RM_SETTING (0x00000040)#define MPI_BIOSPAGE1_IOCSET_MEDIA_RM_SETTING (0x00000080)#define MPI_BIOSPAGE1_IOCSET_MASK_ADAPTER_SUPPORT (0x00000030)#define MPI_BIOSPAGE1_IOCSET_NO_SUPPORT (0x00000000)#define MPI_BIOSPAGE1_IOCSET_BIOS_SUPPORT (0x00000010)#define MPI_BIOSPAGE1_IOCSET_OS_SUPPORT (0x00000020)#define MPI_BIOSPAGE1_IOCSET_ALL_SUPPORT (0x00000030)#define MPI_BIOSPAGE1_IOCSET_ALTERNATE_CHS (0x00000008)/* values for the DeviceSettings field */#define MPI_BIOSPAGE1_DEVSET_DISABLE_SEQ_LUN (0x00000008)#define MPI_BIOSPAGE1_DEVSET_DISABLE_RM_LUN (0x00000004)#define MPI_BIOSPAGE1_DEVSET_DISABLE_NON_RM_LUN (0x00000002)#define MPI_BIOSPAGE1_DEVSET_DISABLE_OTHER_LUN (0x00000001)typedef struct _MPI_BOOT_DEVICE_ADAPTER_ORDER{ U32 Reserved1; /* 00h */ U32 Reserved2; /* 04h */ U32 Reserved3; /* 08h */ U32 Reserved4; /* 0Ch */⌨️ 快捷键说明
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