📄 ohci-hcd.c
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* depending on usb keyboards may be usable even if the * BIOS/SMM code seems pretty broken. */ temp = 500; /* arbitrary: five seconds */ ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable); ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus); while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) { msleep (10); if (--temp == 0) { ohci_err (ohci, "USB HC takeover failed!" " (BIOS/SMM bug)\n"); return -EBUSY; } } ohci_usb_reset (ohci); }#endif /* Disable HC interrupts */ ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable); // flush the writes (void) ohci_readl (ohci, &ohci->regs->control); /* Read the number of ports unless overridden */ if (ohci->num_ports == 0) ohci->num_ports = roothub_a(ohci) & RH_A_NDP; if (ohci->hcca) return 0; ohci->hcca = dma_alloc_coherent (ohci_to_hcd(ohci)->self.controller, sizeof *ohci->hcca, &ohci->hcca_dma, 0); if (!ohci->hcca) return -ENOMEM; if ((ret = ohci_mem_init (ohci)) < 0) ohci_stop (ohci_to_hcd(ohci)); return ret;}/*-------------------------------------------------------------------------*//* Start an OHCI controller, set the BUS operational * resets USB and controller * enable interrupts */static int ohci_run (struct ohci_hcd *ohci){ u32 mask, temp; int first = ohci->fminterval == 0; disable (ohci); /* boot firmware should have set this up (5.1.1.3.1) */ if (first) { temp = ohci_readl (ohci, &ohci->regs->fminterval); ohci->fminterval = temp & 0x3fff; if (ohci->fminterval != FI) ohci_dbg (ohci, "fminterval delta %d\n", ohci->fminterval - FI); ohci->fminterval |= FSMP (ohci->fminterval) << 16; /* also: power/overcurrent flags in roothub.a */ } /* Reset USB nearly "by the book". RemoteWakeupConnected * saved if boot firmware (BIOS/SMM/...) told us it's connected * (for OHCI integrated on mainboard, it normally is) */ ohci->hc_control = ohci_readl (ohci, &ohci->regs->control); ohci_dbg (ohci, "resetting from state '%s', control = 0x%x\n", hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS), ohci->hc_control); if (ohci->hc_control & OHCI_CTRL_RWC && !(ohci->flags & OHCI_QUIRK_AMD756)) ohci_to_hcd(ohci)->can_wakeup = 1; switch (ohci->hc_control & OHCI_CTRL_HCFS) { case OHCI_USB_OPER: temp = 0; break; case OHCI_USB_SUSPEND: case OHCI_USB_RESUME: ohci->hc_control &= OHCI_CTRL_RWC; ohci->hc_control |= OHCI_USB_RESUME; temp = 10 /* msec wait */; break; // case OHCI_USB_RESET: default: ohci->hc_control &= OHCI_CTRL_RWC; ohci->hc_control |= OHCI_USB_RESET; temp = 50 /* msec wait */; break; } ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); // flush the writes (void) ohci_readl (ohci, &ohci->regs->control); msleep(temp); temp = roothub_a (ohci); if (!(temp & RH_A_NPS)) { /* power down each port */ for (temp = 0; temp < ohci->num_ports; temp++) ohci_writel (ohci, RH_PS_LSDA, &ohci->regs->roothub.portstatus [temp]); } // flush those writes (void) ohci_readl (ohci, &ohci->regs->control); memset (ohci->hcca, 0, sizeof (struct ohci_hcca)); /* 2msec timelimit here means no irqs/preempt */ spin_lock_irq (&ohci->lock);retry: /* HC Reset requires max 10 us delay */ ohci_writel (ohci, OHCI_HCR, &ohci->regs->cmdstatus); temp = 30; /* ... allow extra time */ while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) { if (--temp == 0) { spin_unlock_irq (&ohci->lock); ohci_err (ohci, "USB HC reset timed out!\n"); return -1; } udelay (1); } /* now we're in the SUSPEND state ... must go OPERATIONAL * within 2msec else HC enters RESUME * * ... but some hardware won't init fmInterval "by the book" * (SiS, OPTi ...), so reset again instead. SiS doesn't need * this if we write fmInterval after we're OPERATIONAL. * Unclear about ALi, ServerWorks, and others ... this could * easily be a longstanding bug in chip init on Linux. */ if (ohci->flags & OHCI_QUIRK_INITRESET) { ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); // flush those writes (void) ohci_readl (ohci, &ohci->regs->control); } /* Tell the controller where the control and bulk lists are * The lists are empty now. */ ohci_writel (ohci, 0, &ohci->regs->ed_controlhead); ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead); /* a reset clears this */ ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca); periodic_reinit (ohci); /* some OHCI implementations are finicky about how they init. * bogus values here mean not even enumeration could work. */ if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0 || !ohci_readl (ohci, &ohci->regs->periodicstart)) { if (!(ohci->flags & OHCI_QUIRK_INITRESET)) { ohci->flags |= OHCI_QUIRK_INITRESET; ohci_dbg (ohci, "enabling initreset quirk\n"); goto retry; } spin_unlock_irq (&ohci->lock); ohci_err (ohci, "init err (%08x %04x)\n", ohci_readl (ohci, &ohci->regs->fminterval), ohci_readl (ohci, &ohci->regs->periodicstart)); return -EOVERFLOW; } /* start controller operations */ ohci->hc_control &= OHCI_CTRL_RWC; ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER; ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); ohci_to_hcd(ohci)->state = HC_STATE_RUNNING; /* wake on ConnectStatusChange, matching external hubs */ ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status); /* Choose the interrupts we care about now, others later on demand */ mask = OHCI_INTR_INIT; ohci_writel (ohci, mask, &ohci->regs->intrstatus); ohci_writel (ohci, mask, &ohci->regs->intrenable); /* handle root hub init quirks ... */ temp = roothub_a (ohci); temp &= ~(RH_A_PSM | RH_A_OCPM); if (ohci->flags & OHCI_QUIRK_SUPERIO) { /* NSC 87560 and maybe others */ temp |= RH_A_NOCP; temp &= ~(RH_A_POTPGT | RH_A_NPS); ohci_writel (ohci, temp, &ohci->regs->roothub.a); } else if ((ohci->flags & OHCI_QUIRK_AMD756) || distrust_firmware) { /* hub power always on; required for AMD-756 and some * Mac platforms. ganged overcurrent reporting, if any. */ temp |= RH_A_NPS; ohci_writel (ohci, temp, &ohci->regs->roothub.a); } ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status); ohci_writel (ohci, (temp & RH_A_NPS) ? 0 : RH_B_PPCM, &ohci->regs->roothub.b); // flush those writes (void) ohci_readl (ohci, &ohci->regs->control); spin_unlock_irq (&ohci->lock); // POTPGT delay is bits 24-31, in 2 ms units. mdelay ((temp >> 23) & 0x1fe); ohci_to_hcd(ohci)->state = HC_STATE_RUNNING; ohci_dump (ohci, 1); if (ohci_to_hcd(ohci)->self.root_hub == NULL) { register_reboot_notifier (&ohci->reboot_notifier); create_debug_files (ohci); } return 0;}/*-------------------------------------------------------------------------*//* an interrupt happens */static irqreturn_t ohci_irq (struct usb_hcd *hcd, struct pt_regs *ptregs){ struct ohci_hcd *ohci = hcd_to_ohci (hcd); struct ohci_regs __iomem *regs = ohci->regs; int ints; /* we can eliminate a (slow) ohci_readl() if _only_ WDH caused this irq */ if ((ohci->hcca->done_head != 0) && ! (hc32_to_cpup (ohci, &ohci->hcca->done_head) & 0x01)) { ints = OHCI_INTR_WDH; /* cardbus/... hardware gone before remove() */ } else if ((ints = ohci_readl (ohci, ®s->intrstatus)) == ~(u32)0) { disable (ohci); ohci_dbg (ohci, "device removed!\n"); return IRQ_HANDLED; /* interrupt for some other device? */ } else if ((ints &= ohci_readl (ohci, ®s->intrenable)) == 0) { return IRQ_NOTMINE; } if (ints & OHCI_INTR_UE) { disable (ohci); ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n"); // e.g. due to PCI Master/Target Abort ohci_dump (ohci, 1); ohci_usb_reset (ohci); } if (ints & OHCI_INTR_RD) { ohci_vdbg (ohci, "resume detect\n"); ohci_writel (ohci, OHCI_INTR_RD, ®s->intrstatus); if (hcd->state != HC_STATE_QUIESCING) usb_hcd_resume_root_hub(hcd); } if (ints & OHCI_INTR_WDH) { if (HC_IS_RUNNING(hcd->state)) ohci_writel (ohci, OHCI_INTR_WDH, ®s->intrdisable); spin_lock (&ohci->lock); dl_done_list (ohci, ptregs); spin_unlock (&ohci->lock); if (HC_IS_RUNNING(hcd->state)) ohci_writel (ohci, OHCI_INTR_WDH, ®s->intrenable); } /* could track INTR_SO to reduce available PCI/... bandwidth */ /* handle any pending URB/ED unlinks, leaving INTR_SF enabled * when there's still unlinking to be done (next frame). */ spin_lock (&ohci->lock); if (ohci->ed_rm_list) finish_unlinks (ohci, ohci_frame_no(ohci), ptregs); if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list && HC_IS_RUNNING(hcd->state)) ohci_writel (ohci, OHCI_INTR_SF, ®s->intrdisable); spin_unlock (&ohci->lock); if (HC_IS_RUNNING(hcd->state)) { ohci_writel (ohci, ints, ®s->intrstatus); ohci_writel (ohci, OHCI_INTR_MIE, ®s->intrenable); // flush those writes (void) ohci_readl (ohci, &ohci->regs->control); } return IRQ_HANDLED;}/*-------------------------------------------------------------------------*/static void ohci_stop (struct usb_hcd *hcd){ struct ohci_hcd *ohci = hcd_to_ohci (hcd); ohci_dbg (ohci, "stop %s controller (state 0x%02x)\n", hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS), hcd->state); ohci_dump (ohci, 1); flush_scheduled_work(); ohci_usb_reset (ohci); ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable); remove_debug_files (ohci); unregister_reboot_notifier (&ohci->reboot_notifier); ohci_mem_cleanup (ohci); if (ohci->hcca) { dma_free_coherent (hcd->self.controller, sizeof *ohci->hcca, ohci->hcca, ohci->hcca_dma); ohci->hcca = NULL; ohci->hcca_dma = 0; }}/*-------------------------------------------------------------------------*//* must not be called from interrupt context */#ifdef CONFIG_PMstatic int ohci_restart (struct ohci_hcd *ohci){ int temp; int i; struct urb_priv *priv; struct usb_device *root = ohci_to_hcd(ohci)->self.root_hub; /* mark any devices gone, so they do nothing till khubd disconnects. * recycle any "live" eds/tds (and urbs) right away. * later, khubd disconnect processing will recycle the other state, * (either as disconnect/reconnect, or maybe someday as a reset). */ spin_lock_irq(&ohci->lock); disable (ohci); for (i = 0; i < root->maxchild; i++) { if (root->children [i]) usb_set_device_state (root->children[i], USB_STATE_NOTATTACHED); } if (!list_empty (&ohci->pending)) ohci_dbg(ohci, "abort schedule...\n"); list_for_each_entry (priv, &ohci->pending, pending) { struct urb *urb = priv->td[0]->urb; struct ed *ed = priv->ed; switch (ed->state) { case ED_OPER: ed->state = ED_UNLINK; ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE); ed_deschedule (ohci, ed); ed->ed_next = ohci->ed_rm_list; ed->ed_prev = NULL; ohci->ed_rm_list = ed; /* FALLTHROUGH */ case ED_UNLINK: break; default: ohci_dbg(ohci, "bogus ed %p state %d\n", ed, ed->state); } spin_lock (&urb->lock); urb->status = -ESHUTDOWN; spin_unlock (&urb->lock); } finish_unlinks (ohci, 0, NULL); spin_unlock_irq(&ohci->lock); /* paranoia, in case that didn't work: */ /* empty the interrupt branches */ for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0; for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0; /* no EDs to remove */ ohci->ed_rm_list = NULL; /* empty control and bulk lists */ ohci->ed_controltail = NULL; ohci->ed_bulktail = NULL; if ((temp = ohci_run (ohci)) < 0) { ohci_err (ohci, "can't restart, %d\n", temp); return temp; } else { /* here we "know" root ports should always stay powered, * and that if we try to turn them back on the root hub * will respond to CSC processing. */ i = ohci->num_ports; while (i--) ohci_writel (ohci, RH_PS_PSS, &ohci->regs->roothub.portstatus [temp]); ohci_dbg (ohci, "restart complete\n"); } return 0;}#endif/*-------------------------------------------------------------------------*/#define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESCMODULE_AUTHOR (DRIVER_AUTHOR);MODULE_DESCRIPTION (DRIVER_INFO);MODULE_LICENSE ("GPL");#ifdef CONFIG_PCI#include "ohci-pci.c"#endif#ifdef CONFIG_SA1111#include "ohci-sa1111.c"#endif#ifdef CONFIG_ARCH_S3C2410#include "ohci-s3c2410.c"#endif#ifdef CONFIG_ARCH_OMAP#include "ohci-omap.c"#endif#ifdef CONFIG_ARCH_LH7A404#include "ohci-lh7a404.c"#endif#ifdef CONFIG_PXA27x#include "ohci-pxa27x.c"#endif#ifdef CONFIG_SOC_AU1X00#include "ohci-au1xxx.c"#endif#ifdef CONFIG_USB_OHCI_HCD_PPC_SOC#include "ohci-ppc-soc.c"#endif#if !(defined(CONFIG_PCI) \ || defined(CONFIG_SA1111) \ || defined(CONFIG_ARCH_S3C2410) \ || defined(CONFIG_ARCH_OMAP) \ || defined (CONFIG_ARCH_LH7A404) \ || defined (CONFIG_PXA27x) \ || defined (CONFIG_SOC_AU1X00) \ || defined (CONFIG_USB_OHCI_HCD_PPC_SOC) \ )#error "missing bus glue for ohci-hcd"#endif
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