zr36060.c

linux-2.6.15.6

static int
zr36060_set_sof (struct zr36060 *ptr)
{
	char sof_data[34];	// max. size of register set
	int i;

	dprintk(3, "%s: write SOF (%dx%d, %d components)\n", ptr->name,
		ptr->width, ptr->height, NO_OF_COMPONENTS);
	sof_data[0] = 0xff;
	sof_data[1] = 0xc0;
	sof_data[2] = 0x00;
	sof_data[3] = (3 * NO_OF_COMPONENTS) + 8;
	sof_data[4] = BASELINE_PRECISION;	// only '8' possible with zr36060
	sof_data[5] = (ptr->height) >> 8;
	sof_data[6] = (ptr->height) & 0xff;
	sof_data[7] = (ptr->width) >> 8;
	sof_data[8] = (ptr->width) & 0xff;
	sof_data[9] = NO_OF_COMPONENTS;
	for (i = 0; i < NO_OF_COMPONENTS; i++) {
		sof_data[10 + (i * 3)] = i;	// index identifier
		sof_data[11 + (i * 3)] = (ptr->h_samp_ratio[i] << 4) |
					 (ptr->v_samp_ratio[i]); // sampling ratios
		sof_data[12 + (i * 3)] = zr36060_tq[i];	// Q table selection
	}
	return zr36060_pushit(ptr, ZR060_SOF_IDX,
			      (3 * NO_OF_COMPONENTS) + 10, sof_data);
}

/* ------------------------------------------------------------------------- */

/* SOS (start of scan) segment depends on the used scan components 
                        of each color component */

static int
zr36060_set_sos (struct zr36060 *ptr)
{
	char sos_data[16];	// max. size of register set
	int i;

	dprintk(3, "%s: write SOS\n", ptr->name);
	sos_data[0] = 0xff;
	sos_data[1] = 0xda;
	sos_data[2] = 0x00;
	sos_data[3] = 2 + 1 + (2 * NO_OF_COMPONENTS) + 3;
	sos_data[4] = NO_OF_COMPONENTS;
	for (i = 0; i < NO_OF_COMPONENTS; i++) {
		sos_data[5 + (i * 2)] = i;	// index
		sos_data[6 + (i * 2)] = (zr36060_td[i] << 4) |
				        zr36060_ta[i]; // AC/DC tbl.sel.
	}
	sos_data[2 + 1 + (2 * NO_OF_COMPONENTS) + 2] = 00;	// scan start
	sos_data[2 + 1 + (2 * NO_OF_COMPONENTS) + 3] = 0x3f;
	sos_data[2 + 1 + (2 * NO_OF_COMPONENTS) + 4] = 00;
	return zr36060_pushit(ptr, ZR060_SOS_IDX,
			      4 + 1 + (2 * NO_OF_COMPONENTS) + 3,
			      sos_data);
}

/* ------------------------------------------------------------------------- */

/* DRI (define restart interval) */

static int
zr36060_set_dri (struct zr36060 *ptr)
{
	char dri_data[6];	// max. size of register set

	dprintk(3, "%s: write DRI\n", ptr->name);
	dri_data[0] = 0xff;
	dri_data[1] = 0xdd;
	dri_data[2] = 0x00;
	dri_data[3] = 0x04;
	dri_data[4] = (ptr->dri) >> 8;
	dri_data[5] = (ptr->dri) & 0xff;
	return zr36060_pushit(ptr, ZR060_DRI_IDX, 6, dri_data);
}

/* =========================================================================
   Setup function:

   Setup compression/decompression of Zoran's JPEG processor
   ( see also zoran 36060 manual )

   ... sorry for the spaghetti code ...
   ========================================================================= */
static void
zr36060_init (struct zr36060 *ptr)
{
	int sum = 0;
	long bitcnt, tmp;

	if (ptr->mode == CODEC_DO_COMPRESSION) {
		dprintk(2, "%s: COMPRESSION SETUP\n", ptr->name);

		zr36060_write(ptr, ZR060_LOAD, ZR060_LOAD_SyncRst);

		/* 060 communicates with 067 in master mode */
		zr36060_write(ptr, ZR060_CIR, ZR060_CIR_CodeMstr);

		/* Compression with or without variable scale factor */
		/*FIXME: What about ptr->bitrate_ctrl? */
		zr36060_write(ptr, ZR060_CMR,
			      ZR060_CMR_Comp | ZR060_CMR_Pass2 |
			      ZR060_CMR_BRB);

		/* Must be zero */
		zr36060_write(ptr, ZR060_MBZ, 0x00);
		zr36060_write(ptr, ZR060_TCR_HI, 0x00);
		zr36060_write(ptr, ZR060_TCR_LO, 0x00);

		/* Disable all IRQs - no DataErr means autoreset */
		zr36060_write(ptr, ZR060_IMR, 0);

		/* volume control settings */
		zr36060_write(ptr, ZR060_SF_HI, ptr->scalefact >> 8);
		zr36060_write(ptr, ZR060_SF_LO, ptr->scalefact & 0xff);

		zr36060_write(ptr, ZR060_AF_HI, 0xff);
		zr36060_write(ptr, ZR060_AF_M, 0xff);
		zr36060_write(ptr, ZR060_AF_LO, 0xff);

		/* setup the variable jpeg tables */
		sum += zr36060_set_sof(ptr);
		sum += zr36060_set_sos(ptr);
		sum += zr36060_set_dri(ptr);

		/* setup the fixed jpeg tables - maybe variable, though -
		 * (see table init section above) */
		sum +=
		    zr36060_pushit(ptr, ZR060_DQT_IDX, sizeof(zr36060_dqt),
				   zr36060_dqt);
		sum +=
		    zr36060_pushit(ptr, ZR060_DHT_IDX, sizeof(zr36060_dht),
				   zr36060_dht);
		zr36060_write(ptr, ZR060_APP_IDX, 0xff);
		zr36060_write(ptr, ZR060_APP_IDX + 1, 0xe0 + ptr->app.appn);
		zr36060_write(ptr, ZR060_APP_IDX + 2, 0x00);
		zr36060_write(ptr, ZR060_APP_IDX + 3, ptr->app.len + 2);
		sum += zr36060_pushit(ptr, ZR060_APP_IDX + 4, 60,
				      ptr->app.data) + 4;
		zr36060_write(ptr, ZR060_COM_IDX, 0xff);
		zr36060_write(ptr, ZR060_COM_IDX + 1, 0xfe);
		zr36060_write(ptr, ZR060_COM_IDX + 2, 0x00);
		zr36060_write(ptr, ZR060_COM_IDX + 3, ptr->com.len + 2);
		sum += zr36060_pushit(ptr, ZR060_COM_IDX + 4, 60,
				      ptr->com.data) + 4;

		/* setup misc. data for compression (target code sizes) */

		/* size of compressed code to reach without header data */
		sum = ptr->real_code_vol - sum;
		bitcnt = sum << 3;	/* need the size in bits */

		tmp = bitcnt >> 16;
		dprintk(3,
			"%s: code: csize=%d, tot=%d, bit=%ld, highbits=%ld\n",
			ptr->name, sum, ptr->real_code_vol, bitcnt, tmp);
		zr36060_write(ptr, ZR060_TCV_NET_HI, tmp >> 8);
		zr36060_write(ptr, ZR060_TCV_NET_MH, tmp & 0xff);
		tmp = bitcnt & 0xffff;
		zr36060_write(ptr, ZR060_TCV_NET_ML, tmp >> 8);
		zr36060_write(ptr, ZR060_TCV_NET_LO, tmp & 0xff);

		bitcnt -= bitcnt >> 7;	// bits without stuffing
		bitcnt -= ((bitcnt * 5) >> 6);	// bits without eob

		tmp = bitcnt >> 16;
		dprintk(3, "%s: code: nettobit=%ld, highnettobits=%ld\n",
			ptr->name, bitcnt, tmp);
		zr36060_write(ptr, ZR060_TCV_DATA_HI, tmp >> 8);
		zr36060_write(ptr, ZR060_TCV_DATA_MH, tmp & 0xff);
		tmp = bitcnt & 0xffff;
		zr36060_write(ptr, ZR060_TCV_DATA_ML, tmp >> 8);
		zr36060_write(ptr, ZR060_TCV_DATA_LO, tmp & 0xff);

		/* JPEG markers to be included in the compressed stream */
		zr36060_write(ptr, ZR060_MER,
			      ZR060_MER_DQT | ZR060_MER_DHT |
			      ((ptr->com.len > 0) ? ZR060_MER_Com : 0) |
			      ((ptr->app.len > 0) ? ZR060_MER_App : 0));

		/* Setup the Video Frontend */
		/* Limit pixel range to 16..235 as per CCIR-601 */
		zr36060_write(ptr, ZR060_VCR, ZR060_VCR_Range);

	} else {
		dprintk(2, "%s: EXPANSION SETUP\n", ptr->name);

		zr36060_write(ptr, ZR060_LOAD, ZR060_LOAD_SyncRst);

		/* 060 communicates with 067 in master mode */
		zr36060_write(ptr, ZR060_CIR, ZR060_CIR_CodeMstr);

		/* Decompression */
		zr36060_write(ptr, ZR060_CMR, 0);

		/* Must be zero */
		zr36060_write(ptr, ZR060_MBZ, 0x00);
		zr36060_write(ptr, ZR060_TCR_HI, 0x00);
		zr36060_write(ptr, ZR060_TCR_LO, 0x00);

		/* Disable all IRQs - no DataErr means autoreset */
		zr36060_write(ptr, ZR060_IMR, 0);

		/* setup misc. data for expansion */
		zr36060_write(ptr, ZR060_MER, 0);

		/* setup the fixed jpeg tables - maybe variable, though -
		 * (see table init section above) */
		zr36060_pushit(ptr, ZR060_DHT_IDX, sizeof(zr36060_dht),
			       zr36060_dht);

		/* Setup the Video Frontend */
		//zr36060_write(ptr, ZR060_VCR, ZR060_VCR_FIExt);
		//this doesn't seem right and doesn't work...
		zr36060_write(ptr, ZR060_VCR, ZR060_VCR_Range);
	}

	/* Load the tables */
	zr36060_write(ptr, ZR060_LOAD,
		      ZR060_LOAD_SyncRst | ZR060_LOAD_Load);
	zr36060_wait_end(ptr);
	dprintk(2, "%s: Status after table preload: 0x%02x\n", ptr->name,
		ptr->status);

	if (ptr->status & ZR060_CFSR_Busy) {
		dprintk(1, KERN_ERR "%s: init aborted!\n", ptr->name);
		return;		// something is wrong, its timed out!!!!
	}
}

/* =========================================================================
   CODEC API FUNCTIONS

   this functions are accessed by the master via the API structure
   ========================================================================= */

/* set compression/expansion mode and launches codec -
   this should be the last call from the master before starting processing */
static int
zr36060_set_mode (struct videocodec *codec,
		  int                mode)
{
	struct zr36060 *ptr = (struct zr36060 *) codec->data;

	dprintk(2, "%s: set_mode %d call\n", ptr->name, mode);

	if ((mode != CODEC_DO_EXPANSION) && (mode != CODEC_DO_COMPRESSION))
		return -EINVAL;

	ptr->mode = mode;
	zr36060_init(ptr);

	return 0;
}

/* set picture size (norm is ignored as the codec doesn't know about it) */
static int
zr36060_set_video (struct videocodec   *codec,
		   struct tvnorm       *norm,
		   struct vfe_settings *cap,
		   struct vfe_polarity *pol)
{
	struct zr36060 *ptr = (struct zr36060 *) codec->data;
	u32 reg;
	int size;

	dprintk(2, "%s: set_video %d/%d-%dx%d (%%%d) call\n", ptr->name,
		cap->x, cap->y, cap->width, cap->height, cap->decimation);

	/* if () return -EINVAL;
	 * trust the master driver that it knows what it does - so
	 * we allow invalid startx/y and norm for now ... */
	ptr->width = cap->width / (cap->decimation & 0xff);
	ptr->height = cap->height / (cap->decimation >> 8);

	zr36060_write(ptr, ZR060_LOAD, ZR060_LOAD_SyncRst);

	/* Note that VSPol/HSPol bits in zr36060 have the opposite
	 * meaning of their zr360x7 counterparts with the same names
	 * N.b. for VSPol this is only true if FIVEdge = 0 (default,
	 * left unchanged here - in accordance with datasheet).
	*/
	reg = (!pol->vsync_pol ? ZR060_VPR_VSPol : 0)
	    | (!pol->hsync_pol ? ZR060_VPR_HSPol : 0)
	    | (pol->field_pol ? ZR060_VPR_FIPol : 0)
	    | (pol->blank_pol ? ZR060_VPR_BLPol : 0)
	    | (pol->subimg_pol ? ZR060_VPR_SImgPol : 0)
	    | (pol->poe_pol ? ZR060_VPR_PoePol : 0)
	    | (pol->pvalid_pol ? ZR060_VPR_PValPol : 0)
	    | (pol->vclk_pol ? ZR060_VPR_VCLKPol : 0);
	zr36060_write(ptr, ZR060_VPR, reg);

	reg = 0;
	switch (cap->decimation & 0xff) {
	default:
	case 1:
		break;

	case 2:
		reg |= ZR060_SR_HScale2;
		break;

	case 4:
		reg |= ZR060_SR_HScale4;
		break;
	}

	switch (cap->decimation >> 8) {
	default:
	case 1:
		break;

	case 2:
		reg |= ZR060_SR_VScale;
		break;
	}
	zr36060_write(ptr, ZR060_SR, reg);

	zr36060_write(ptr, ZR060_BCR_Y, 0x00);
	zr36060_write(ptr, ZR060_BCR_U, 0x80);
	zr36060_write(ptr, ZR060_BCR_V, 0x80);

	/* sync generator */

	reg = norm->Ht - 1;	/* Vtotal */
	zr36060_write(ptr, ZR060_SGR_VTOTAL_HI, (reg >> 8) & 0xff);
	zr36060_write(ptr, ZR060_SGR_VTOTAL_LO, (reg >> 0) & 0xff);

	reg = norm->Wt - 1;	/* Htotal */
	zr36060_write(ptr, ZR060_SGR_HTOTAL_HI, (reg >> 8) & 0xff);
	zr36060_write(ptr, ZR060_SGR_HTOTAL_LO, (reg >> 0) & 0xff);

	reg = 6 - 1;		/* VsyncSize */
	zr36060_write(ptr, ZR060_SGR_VSYNC, reg);

	//reg   = 30 - 1;               /* HsyncSize */
///*CP*/        reg = (zr->params.norm == 1 ? 57 : 68);
	reg = 68;