z90hardware.c

linux-2.6.15.6

		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
		{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
	},

	{
		0x04,
		0x00,
		0x000F,
		{0x00,0x00},
		0x0003,
		0x0000,
		0x0000,
		{0x01,0x00,0x01}
	}
};

static struct cca_public_key static_public_key = {
	{
		0x1E,
		0x00,
		0x0000,
		{0x00,0x00,0x00,0x00}
	},

	{
		0x04,
		0x00,
		0x0000,
		{0x00,0x00},
		0x0000,
		0x0000,
		0x0000,
		{0x01,0x00,0x01}
	}
};

#define FIXED_TYPE6_ME_LEN 0x0000025F

#define FIXED_TYPE6_ME_EN_LEN 0x000000F0

#define FIXED_TYPE6_ME_LENX 0x000002CB

#define FIXED_TYPE6_ME_EN_LENX 0x0000015C

static struct cca_public_sec static_cca_pub_sec = {
	0x04,
	0x00,
	0x000f,
	{0x00,0x00},
	0x0003,
	0x0000,
	0x0000,
	{0x01,0x00,0x01}
};

#define FIXED_TYPE6_CR_LEN 0x00000177

#define FIXED_TYPE6_CR_LENX 0x000001E3

#define MAX_RESPONSE_SIZE 0x00000710

#define MAX_RESPONSEX_SIZE 0x0000077C

#define RESPONSE_CPRB_SIZE  0x000006B8
#define RESPONSE_CPRBX_SIZE 0x00000724

struct error_hdr {
	unsigned char reserved1;
	unsigned char type;
	unsigned char reserved2[2];
	unsigned char reply_code;
	unsigned char reserved3[3];
};

#define TYPE82_RSP_CODE 0x82

#define REP82_ERROR_MACHINE_FAILURE  0x10
#define REP82_ERROR_PREEMPT_FAILURE  0x12
#define REP82_ERROR_CHECKPT_FAILURE  0x14
#define REP82_ERROR_MESSAGE_TYPE     0x20
#define REP82_ERROR_INVALID_COMM_CD  0x21
#define REP82_ERROR_INVALID_MSG_LEN  0x23
#define REP82_ERROR_RESERVD_FIELD    0x24
#define REP82_ERROR_FORMAT_FIELD     0x29
#define REP82_ERROR_INVALID_COMMAND  0x30
#define REP82_ERROR_MALFORMED_MSG    0x40
#define REP82_ERROR_RESERVED_FIELDO  0x50
#define REP82_ERROR_WORD_ALIGNMENT   0x60
#define REP82_ERROR_MESSAGE_LENGTH   0x80
#define REP82_ERROR_OPERAND_INVALID  0x82
#define REP82_ERROR_OPERAND_SIZE     0x84
#define REP82_ERROR_EVEN_MOD_IN_OPND 0x85
#define REP82_ERROR_RESERVED_FIELD   0x88
#define REP82_ERROR_TRANSPORT_FAIL   0x90
#define REP82_ERROR_PACKET_TRUNCATED 0xA0
#define REP82_ERROR_ZERO_BUFFER_LEN  0xB0

#define CALLER_HEADER 12

static inline int
testq(int q_nr, int *q_depth, int *dev_type, struct ap_status_word *stat)
{
	int ccode;

	asm volatile
#ifdef __s390x__
	("	llgfr	0,%4		\n"
	 "	slgr	1,1		\n"
	 "	lgr	2,1		\n"
	 "0:	.long	0xb2af0000	\n"
	 "1:	ipm	%0		\n"
	 "	srl	%0,28		\n"
	 "	iihh	%0,0		\n"
	 "	iihl	%0,0		\n"
	 "	lgr	%1,1		\n"
	 "	lgr	%3,2		\n"
	 "	srl	%3,24		\n"
	 "	sll	2,24		\n"
	 "	srl	2,24		\n"
	 "	lgr	%2,2		\n"
	 "2:				\n"
	 ".section .fixup,\"ax\"	\n"
	 "3:				\n"
	 "	lhi	%0,%h5		\n"
	 "	jg	2b		\n"
	 ".previous			\n"
	 ".section __ex_table,\"a\"	\n"
	 "	.align	8		\n"
	 "	.quad	0b,3b		\n"
	 "	.quad	1b,3b		\n"
	 ".previous"
	 :"=d" (ccode),"=d" (*stat),"=d" (*q_depth), "=d" (*dev_type)
	 :"d" (q_nr), "K" (DEV_TSQ_EXCEPTION)
	 :"cc","0","1","2","memory");
#else
	("	lr	0,%4		\n"
	 "	slr	1,1		\n"
	 "	lr	2,1		\n"
	 "0:	.long	0xb2af0000	\n"
	 "1:	ipm	%0		\n"
	 "	srl	%0,28		\n"
	 "	lr	%1,1		\n"
	 "	lr	%3,2		\n"
	 "	srl	%3,24		\n"
	 "	sll	2,24		\n"
	 "	srl	2,24		\n"
	 "	lr	%2,2		\n"
	 "2:				\n"
	 ".section .fixup,\"ax\"	\n"
	 "3:				\n"
	 "	lhi	%0,%h5		\n"
	 "	bras	1,4f		\n"
	 "	.long	2b		\n"
	 "4:				\n"
	 "	l	1,0(1)		\n"
	 "	br	1		\n"
	 ".previous			\n"
	 ".section __ex_table,\"a\"	\n"
	 "	.align	4		\n"
	 "	.long	0b,3b		\n"
	 "	.long	1b,3b		\n"
	 ".previous"
	 :"=d" (ccode),"=d" (*stat),"=d" (*q_depth), "=d" (*dev_type)
	 :"d" (q_nr), "K" (DEV_TSQ_EXCEPTION)
	 :"cc","0","1","2","memory");
#endif
	return ccode;
}

static inline int
resetq(int q_nr, struct ap_status_word *stat_p)
{
	int ccode;

	asm volatile
#ifdef __s390x__
	("	llgfr	0,%2		\n"
	 "	lghi	1,1		\n"
	 "	sll	1,24		\n"
	 "	or	0,1		\n"
	 "	slgr	1,1		\n"
	 "	lgr	2,1		\n"
	 "0:	.long	0xb2af0000	\n"
	 "1:	ipm	%0		\n"
	 "	srl	%0,28		\n"
	 "	iihh	%0,0		\n"
	 "	iihl	%0,0		\n"
	 "	lgr	%1,1		\n"
	 "2:				\n"
	 ".section .fixup,\"ax\"	\n"
	 "3:				\n"
	 "	lhi	%0,%h3		\n"
	 "	jg	2b		\n"
	 ".previous			\n"
	 ".section __ex_table,\"a\"	\n"
	 "	.align	8		\n"
	 "	.quad	0b,3b		\n"
	 "	.quad	1b,3b		\n"
	 ".previous"
	 :"=d" (ccode),"=d" (*stat_p)
	 :"d" (q_nr), "K" (DEV_RSQ_EXCEPTION)
	 :"cc","0","1","2","memory");
#else
	("	lr	0,%2		\n"
	 "	lhi	1,1		\n"
	 "	sll	1,24		\n"
	 "	or	0,1		\n"
	 "	slr	1,1		\n"
	 "	lr	2,1		\n"
	 "0:	.long	0xb2af0000	\n"
	 "1:	ipm	%0		\n"
	 "	srl	%0,28		\n"
	 "	lr	%1,1		\n"
	 "2:				\n"
	 ".section .fixup,\"ax\"	\n"
	 "3:				\n"
	 "	lhi	%0,%h3		\n"
	 "	bras	1,4f		\n"
	 "	.long	2b		\n"
	 "4:				\n"
	 "	l	1,0(1)		\n"
	 "	br	1		\n"
	 ".previous			\n"
	 ".section __ex_table,\"a\"	\n"
	 "	.align	4		\n"
	 "	.long	0b,3b		\n"
	 "	.long	1b,3b		\n"
	 ".previous"
	 :"=d" (ccode),"=d" (*stat_p)
	 :"d" (q_nr), "K" (DEV_RSQ_EXCEPTION)
	 :"cc","0","1","2","memory");
#endif
	return ccode;
}

static inline int
sen(int msg_len, unsigned char *msg_ext, struct ap_status_word *stat)
{
	int ccode;

	asm volatile
#ifdef __s390x__
	("	lgr	6,%3		\n"
	 "	llgfr	7,%2		\n"
	 "	llgt	0,0(6)		\n"
	 "	lghi	1,64		\n"
	 "	sll	1,24		\n"
	 "	or	0,1		\n"
	 "	la	6,4(6)		\n"
	 "	llgt	2,0(6)		\n"
	 "	llgt	3,4(6)		\n"
	 "	la	6,8(6)		\n"
	 "	slr	1,1		\n"
	 "0:	.long	0xb2ad0026	\n"
	 "1:	brc	2,0b		\n"
	 "	ipm	%0		\n"
	 "	srl	%0,28		\n"
	 "	iihh	%0,0		\n"
	 "	iihl	%0,0		\n"
	 "	lgr	%1,1		\n"
	 "2:				\n"
	 ".section .fixup,\"ax\"	\n"
	 "3:				\n"
	 "	lhi	%0,%h4		\n"
	 "	jg	2b		\n"
	 ".previous			\n"
	 ".section __ex_table,\"a\"	\n"
	 "	.align	8		\n"
	 "	.quad	0b,3b		\n"
	 "	.quad	1b,3b		\n"
	 ".previous"
	 :"=d" (ccode),"=d" (*stat)
	 :"d" (msg_len),"a" (msg_ext), "K" (DEV_SEN_EXCEPTION)
	 :"cc","0","1","2","3","6","7","memory");
#else
	("	lr	6,%3		\n"
	 "	lr	7,%2		\n"
	 "	l	0,0(6)		\n"
	 "	lhi	1,64		\n"
	 "	sll	1,24		\n"
	 "	or	0,1		\n"
	 "	la	6,4(6)		\n"
	 "	l	2,0(6)		\n"
	 "	l	3,4(6)		\n"
	 "	la	6,8(6)		\n"
	 "	slr	1,1		\n"
	 "0:	.long	0xb2ad0026	\n"
	 "1:	brc	2,0b		\n"
	 "	ipm	%0		\n"
	 "	srl	%0,28		\n"
	 "	lr	%1,1		\n"
	 "2:				\n"
	 ".section .fixup,\"ax\"	\n"
	 "3:				\n"
	 "	lhi	%0,%h4		\n"
	 "	bras	1,4f		\n"
	 "	.long	2b		\n"
	 "4:				\n"
	 "	l	1,0(1)		\n"
	 "	br	1		\n"
	 ".previous			\n"
	 ".section __ex_table,\"a\"	\n"
	 "	.align	4		\n"
	 "	.long	0b,3b		\n"
	 "	.long	1b,3b		\n"
	 ".previous"
	 :"=d" (ccode),"=d" (*stat)
	 :"d" (msg_len),"a" (msg_ext), "K" (DEV_SEN_EXCEPTION)
	 :"cc","0","1","2","3","6","7","memory");
#endif
	return ccode;
}

static inline int
rec(int q_nr, int buff_l, unsigned char *rsp, unsigned char *id,
    struct ap_status_word *st)
{
	int ccode;

	asm volatile
#ifdef __s390x__
	("	llgfr	0,%2		\n"
	 "	lgr	3,%4		\n"
	 "	lgr	6,%3		\n"
	 "	llgfr	7,%5		\n"
	 "	lghi	1,128		\n"
	 "	sll	1,24		\n"
	 "	or	0,1		\n"
	 "	slgr	1,1		\n"
	 "	lgr	2,1		\n"
	 "	lgr	4,1		\n"
	 "	lgr	5,1		\n"
	 "0:	.long	0xb2ae0046	\n"
	 "1:	brc	2,0b		\n"
	 "	brc	4,0b		\n"
	 "	ipm	%0		\n"
	 "	srl	%0,28		\n"
	 "	iihh	%0,0		\n"
	 "	iihl	%0,0		\n"
	 "	lgr	%1,1		\n"
	 "	st	4,0(3)		\n"
	 "	st	5,4(3)		\n"
	 "2:				\n"
	 ".section .fixup,\"ax\"	\n"
	 "3:				\n"
	 "	lhi   %0,%h6		\n"
	 "	jg    2b		\n"
	 ".previous			\n"
	 ".section __ex_table,\"a\"	\n"
	 "   .align	8		\n"
	 "   .quad	0b,3b		\n"
	 "   .quad	1b,3b		\n"
	 ".previous"
	 :"=d"(ccode),"=d"(*st)
	 :"d" (q_nr), "d" (rsp), "d" (id), "d" (buff_l), "K" (DEV_REC_EXCEPTION)
	 :"cc","0","1","2","3","4","5","6","7","memory");
#else
	("	lr	0,%2		\n"
	 "	lr	3,%4		\n"
	 "	lr	6,%3		\n"
	 "	lr	7,%5		\n"
	 "	lhi	1,128		\n"
	 "	sll	1,24		\n"
	 "	or	0,1		\n"
	 "	slr	1,1		\n"
	 "	lr	2,1		\n"
	 "	lr	4,1		\n"
	 "	lr	5,1		\n"
	 "0:	.long	0xb2ae0046	\n"
	 "1:	brc	2,0b		\n"
	 "	brc	4,0b		\n"
	 "	ipm	%0		\n"
	 "	srl	%0,28		\n"
	 "	lr	%1,1		\n"
	 "	st	4,0(3)		\n"
	 "	st	5,4(3)		\n"
	 "2:				\n"
	 ".section .fixup,\"ax\"	\n"
	 "3:				\n"
	 "	lhi   %0,%h6		\n"
	 "	bras  1,4f		\n"
	 "	.long 2b		\n"
	 "4:				\n"
	 "	l     1,0(1)		\n"
	 "	br    1			\n"
	 ".previous			\n"
	 ".section __ex_table,\"a\"	\n"
	 "   .align	4		\n"
	 "   .long	0b,3b		\n"
	 "   .long	1b,3b		\n"
	 ".previous"
	 :"=d"(ccode),"=d"(*st)
	 :"d" (q_nr), "d" (rsp), "d" (id), "d" (buff_l), "K" (DEV_REC_EXCEPTION)
	 :"cc","0","1","2","3","4","5","6","7","memory");
#endif
	return ccode;
}

static inline void
itoLe2(int *i_p, unsigned char *lechars)
{
	*lechars       = *((unsigned char *) i_p + sizeof(int) - 1);
	*(lechars + 1) = *((unsigned char *) i_p + sizeof(int) - 2);
}

static inline void
le2toI(unsigned char *lechars, int *i_p)
{
	unsigned char *ic_p;
	*i_p = 0;
	ic_p = (unsigned char *) i_p;
	*(ic_p + 2) = *(lechars + 1);
	*(ic_p + 3) = *(lechars);
}

static inline int
is_empty(unsigned char *ptr, int len)
{
	return !memcmp(ptr, (unsigned char *) &static_pvt_me_key+60, len);
}

enum hdstat
query_online(int deviceNr, int cdx, int resetNr, int *q_depth, int *dev_type)
{
	int q_nr, i, t_depth, t_dev_type;
	enum devstat ccode;
	struct ap_status_word stat_word;
	enum hdstat stat;
	int break_out;

	q_nr = (deviceNr << SKIP_BITL) + cdx;
	stat = HD_BUSY;
	ccode = testq(q_nr, &t_depth, &t_dev_type, &stat_word);
	PDEBUG("ccode %d response_code %02X\n", ccode, stat_word.response_code);
	break_out = 0;
	for (i = 0; i < resetNr; i++) {
		if (ccode > 3) {
			PRINTKC("Exception testing device %d\n", i);
			return HD_TSQ_EXCEPTION;
		}
		switch (ccode) {
		case 0:
			PDEBUG("t_dev_type %d\n", t_dev_type);
			break_out = 1;
			stat = HD_ONLINE;
			*q_depth = t_depth + 1;
			switch (t_dev_type) {
			case OTHER_HW:
				stat = HD_NOT_THERE;
				*dev_type = NILDEV;
				break;
			case PCICA_HW:
				*dev_type = PCICA;
				break;
			case PCICC_HW:
				*dev_type = PCICC;
				break;
			case PCIXCC_HW:
				*dev_type = PCIXCC_UNK;
				break;
			case CEX2C_HW:
				*dev_type = CEX2C;
				break;
			default:
				*dev_type = NILDEV;
				break;
			}
			PDEBUG("available device %d: Q depth = %d, dev "
			       "type = %d, stat = %02X%02X%02X%02X\n",
			       deviceNr, *q_depth, *dev_type,
			       stat_word.q_stat_flags,
			       stat_word.response_code,
			       stat_word.reserved[0],
			       stat_word.reserved[1]);
			break;
		case 3:
			switch (stat_word.response_code) {
			case AP_RESPONSE_NORMAL:
				stat = HD_ONLINE;
				break_out = 1;
				*q_depth = t_depth + 1;
				*dev_type = t_dev_type;
				PDEBUG("cc3, available device "
				       "%d: Q depth = %d, dev "
				       "type = %d, stat = "
				       "%02X%02X%02X%02X\n",
				       deviceNr, *q_depth,
				       *dev_type,
				       stat_word.q_stat_flags,
				       stat_word.response_code,
				       stat_word.reserved[0],
				       stat_word.reserved[1]);
				break;
			case AP_RESPONSE_Q_NOT_AVAIL:
				stat = HD_NOT_THERE;
				break_out = 1;
				break;
			case AP_RESPONSE_RESET_IN_PROGRESS:
				PDEBUG("device %d in reset\n",
				       deviceNr);
				break;
			case AP_RESPONSE_DECONFIGURED:
				stat = HD_DECONFIGURED;
				break_out = 1;
				break;
			case AP_RESPONSE_CHECKSTOPPED:
				stat = HD_CHECKSTOPPED;
				break_out = 1;
				break;
			case AP_RESPONSE_BUSY:
				PDEBUG("device %d busy\n",
				       deviceNr);
				break;
			default:
				break;
			}
			break;
		default:
			stat = HD_NOT_THERE;
			break_out = 1;
			break;
		}
		if (break_out)
			break;

		udelay(5);

		ccode = testq(q_nr, &t_depth, &t_dev_type, &stat_word);
	}
	return stat;
}

enum devstat
reset_device(int deviceNr, int cdx, int resetNr)
{
	int q_nr, ccode = 0, dummy_qdepth, dummy_devType, i;
	struct ap_status_word stat_word;
	enum devstat stat;
	int break_out;