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📄 longhaul.c

📁 linux-2.6.15.6
💻 C
📖 第 1 页 / 共 2 页
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/* *  (C) 2001-2004  Dave Jones. <davej@codemonkey.org.uk> *  (C) 2002  Padraig Brady. <padraig@antefacto.com> * *  Licensed under the terms of the GNU GPL License version 2. *  Based upon datasheets & sample CPUs kindly provided by VIA. * *  VIA have currently 3 different versions of Longhaul. *  Version 1 (Longhaul) uses the BCR2 MSR at 0x1147. *   It is present only in Samuel 1 (C5A), Samuel 2 (C5B) stepping 0. *  Version 2 of longhaul is the same as v1, but adds voltage scaling. *   Present in Samuel 2 (steppings 1-7 only) (C5B), and Ezra (C5C) *   voltage scaling support has currently been disabled in this driver *   until we have code that gets it right. *  Version 3 of longhaul got renamed to Powersaver and redesigned *   to use the POWERSAVER MSR at 0x110a. *   It is present in Ezra-T (C5M), Nehemiah (C5X) and above. *   It's pretty much the same feature wise to longhaul v2, though *   there is provision for scaling FSB too, but this doesn't work *   too well in practice so we don't even try to use this. * *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous* */#include <linux/kernel.h>#include <linux/module.h>#include <linux/moduleparam.h>#include <linux/init.h>#include <linux/cpufreq.h>#include <linux/slab.h>#include <linux/string.h>#include <linux/pci.h>#include <asm/msr.h>#include <asm/timex.h>#include <asm/io.h>#include "longhaul.h"#define PFX "longhaul: "#define TYPE_LONGHAUL_V1	1#define TYPE_LONGHAUL_V2	2#define TYPE_POWERSAVER		3#define	CPU_SAMUEL	1#define	CPU_SAMUEL2	2#define	CPU_EZRA	3#define	CPU_EZRA_T	4#define	CPU_NEHEMIAH	5static int cpu_model;static unsigned int numscales=16, numvscales;static unsigned int fsb;static int minvid, maxvid;static unsigned int minmult, maxmult;static int can_scale_voltage;static int vrmrev;/* Module parameters */static int dont_scale_voltage;#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "longhaul", msg)/* Clock ratios multiplied by 10 */static int clock_ratio[32];static int eblcr_table[32];static int voltage_table[32];static unsigned int highest_speed, lowest_speed; /* kHz */static int longhaul_version;static struct cpufreq_frequency_table *longhaul_table;#ifdef CONFIG_CPU_FREQ_DEBUGstatic char speedbuffer[8];static char *print_speed(int speed){	if (speed > 1000) {		if (speed%1000 == 0)			sprintf (speedbuffer, "%dGHz", speed/1000);		else			sprintf (speedbuffer, "%d.%dGHz", speed/1000, (speed%1000)/100);	} else		sprintf (speedbuffer, "%dMHz", speed);	return speedbuffer;}#endifstatic unsigned int calc_speed(int mult){	int khz;	khz = (mult/10)*fsb;	if (mult%10)		khz += fsb/2;	khz *= 1000;	return khz;}static int longhaul_get_cpu_mult(void){	unsigned long invalue=0,lo, hi;	rdmsr (MSR_IA32_EBL_CR_POWERON, lo, hi);	invalue = (lo & (1<<22|1<<23|1<<24|1<<25)) >>22;	if (longhaul_version==TYPE_LONGHAUL_V2 || longhaul_version==TYPE_POWERSAVER) {		if (lo & (1<<27))			invalue+=16;	}	return eblcr_table[invalue];}static void do_powersaver(union msr_longhaul *longhaul,			unsigned int clock_ratio_index){	struct pci_dev *dev;	unsigned long flags;	unsigned int tmp_mask;	int version;	int i;	u16 pci_cmd;	u16 cmd_state[64];	switch (cpu_model) {	case CPU_EZRA_T:		version = 3;		break;	case CPU_NEHEMIAH:		version = 0xf;		break;	default:		return;	}	rdmsrl(MSR_VIA_LONGHAUL, longhaul->val);	longhaul->bits.SoftBusRatio = clock_ratio_index & 0xf;	longhaul->bits.SoftBusRatio4 = (clock_ratio_index & 0x10) >> 4;	longhaul->bits.EnableSoftBusRatio = 1;	longhaul->bits.RevisionKey = 0;	preempt_disable();	local_irq_save(flags);	/*	 * get current pci bus master state for all devices	 * and clear bus master bit	 */	dev = NULL;	i = 0;	do {		dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);		if (dev != NULL) {			pci_read_config_word(dev, PCI_COMMAND, &pci_cmd);			cmd_state[i++] = pci_cmd;			pci_cmd &= ~PCI_COMMAND_MASTER;			pci_write_config_word(dev, PCI_COMMAND, pci_cmd);		}	} while (dev != NULL);	tmp_mask=inb(0x21);	/* works on C3. save mask. */	outb(0xFE,0x21);	/* TMR0 only */	outb(0xFF,0x80);	/* delay */	safe_halt();	wrmsrl(MSR_VIA_LONGHAUL, longhaul->val);	halt();	local_irq_disable();	outb(tmp_mask,0x21);	/* restore mask */	/* restore pci bus master state for all devices */	dev = NULL;	i = 0;	do {		dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);		if (dev != NULL) {			pci_cmd = cmd_state[i++];			pci_write_config_byte(dev, PCI_COMMAND, pci_cmd);		}	} while (dev != NULL);	local_irq_restore(flags);	preempt_enable();	/* disable bus ratio bit */	rdmsrl(MSR_VIA_LONGHAUL, longhaul->val);	longhaul->bits.EnableSoftBusRatio = 0;	longhaul->bits.RevisionKey = version;	wrmsrl(MSR_VIA_LONGHAUL, longhaul->val);}/** * longhaul_set_cpu_frequency() * @clock_ratio_index : bitpattern of the new multiplier. * * Sets a new clock ratio. */static void longhaul_setstate(unsigned int clock_ratio_index){	int speed, mult;	struct cpufreq_freqs freqs;	union msr_longhaul longhaul;	union msr_bcr2 bcr2;	static unsigned int old_ratio=-1;	if (old_ratio == clock_ratio_index)		return;	old_ratio = clock_ratio_index;	mult = clock_ratio[clock_ratio_index];	if (mult == -1)		return;	speed = calc_speed(mult);	if ((speed > highest_speed) || (speed < lowest_speed))		return;	freqs.old = calc_speed(longhaul_get_cpu_mult());	freqs.new = speed;	freqs.cpu = 0; /* longhaul.c is UP only driver */	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);	dprintk ("Setting to FSB:%dMHz Mult:%d.%dx (%s)\n",			fsb, mult/10, mult%10, print_speed(speed/1000));	switch (longhaul_version) {	/*	 * Longhaul v1. (Samuel[C5A] and Samuel2 stepping 0[C5B])	 * Software controlled multipliers only.	 *	 * *NB* Until we get voltage scaling working v1 & v2 are the same code.	 * Longhaul v2 appears in Samuel2 Steppings 1->7 [C5b] and Ezra [C5C]	 */	case TYPE_LONGHAUL_V1:	case TYPE_LONGHAUL_V2:		rdmsrl (MSR_VIA_BCR2, bcr2.val);		/* Enable software clock multiplier */		bcr2.bits.ESOFTBF = 1;		bcr2.bits.CLOCKMUL = clock_ratio_index;		local_irq_disable();		wrmsrl (MSR_VIA_BCR2, bcr2.val);		safe_halt();		/* Disable software clock multiplier */		rdmsrl (MSR_VIA_BCR2, bcr2.val);		bcr2.bits.ESOFTBF = 0;		local_irq_disable();		wrmsrl (MSR_VIA_BCR2, bcr2.val);		local_irq_enable();		break;	/*	 * Longhaul v3 (aka Powersaver). (Ezra-T [C5M] & Nehemiah [C5N])	 * We can scale voltage with this too, but that's currently	 * disabled until we come up with a decent 'match freq to voltage'	 * algorithm.	 * When we add voltage scaling, we will also need to do the	 * voltage/freq setting in order depending on the direction	 * of scaling (like we do in powernow-k7.c)	 * Nehemiah can do FSB scaling too, but this has never been proven	 * to work in practice.	 */	case TYPE_POWERSAVER:		do_powersaver(&longhaul, clock_ratio_index);		break;	}	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);}/* * Centaur decided to make life a little more tricky. * Only longhaul v1 is allowed to read EBLCR BSEL[0:1]. * Samuel2 and above have to try and guess what the FSB is. * We do this by assuming we booted at maximum multiplier, and interpolate * between that value multiplied by possible FSBs and cpu_mhz which * was calculated at boot time. Really ugly, but no other way to do this. */#define ROUNDING	0xfstatic int _guess(int guess){	int target;	target = ((maxmult/10)*guess);	if (maxmult%10 != 0)		target += (guess/2);	target += ROUNDING/2;	target &= ~ROUNDING;	return target;}static int guess_fsb(void){	int speed = (cpu_khz/1000);	int i;	int speeds[3] = { 66, 100, 133 };	speed += ROUNDING/2;	speed &= ~ROUNDING;	for (i=0; i<3; i++) {		if (_guess(speeds[i]) == speed)			return speeds[i];	}	return 0;}static int __init longhaul_get_ranges(void){	unsigned long invalue;	unsigned int multipliers[32]= {		50,30,40,100,55,35,45,95,90,70,80,60,120,75,85,65,		-1,110,120,-1,135,115,125,105,130,150,160,140,-1,155,-1,145 };	unsigned int j, k = 0;	union msr_longhaul longhaul;	unsigned long lo, hi;	unsigned int eblcr_fsb_table_v1[] = { 66, 133, 100, -1 };	unsigned int eblcr_fsb_table_v2[] = { 133, 100, -1, 66 };	switch (longhaul_version) {	case TYPE_LONGHAUL_V1:	case TYPE_LONGHAUL_V2:		/* Ugh, Longhaul v1 didn't have the min/max MSRs.		   Assume min=3.0x & max = whatever we booted at. */		minmult = 30;		maxmult = longhaul_get_cpu_mult();		rdmsr (MSR_IA32_EBL_CR_POWERON, lo, hi);		invalue = (lo & (1<<18|1<<19)) >>18;		if (cpu_model==CPU_SAMUEL || cpu_model==CPU_SAMUEL2)			fsb = eblcr_fsb_table_v1[invalue];		else			fsb = guess_fsb();		break;	case TYPE_POWERSAVER:		/* Ezra-T */		if (cpu_model==CPU_EZRA_T) {			rdmsrl (MSR_VIA_LONGHAUL, longhaul.val);			invalue = longhaul.bits.MaxMHzBR;

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