📄 time.c
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data1 = mostek_read(regs + MOSTEK_EEPROM); /* Read some data. */ mostek_write(regs + MOSTEK_EEPROM, ~data1); /* Write back the complement. */ data2 = mostek_read(regs + MOSTEK_EEPROM); /* Read back the complement. */ mostek_write(regs + MOSTEK_EEPROM, data1); /* Restore original value. */ spin_unlock_irq(&mostek_lock); return (data1 == data2); /* Was the write blocked? */}/* Probe for the real time clock chip. */static void __init set_system_time(void){ unsigned int year, mon, day, hour, min, sec; void __iomem *mregs = mstk48t02_regs;#ifdef CONFIG_PCI unsigned long dregs = ds1287_regs;#else unsigned long dregs = 0UL;#endif u8 tmp; if (!mregs && !dregs) { prom_printf("Something wrong, clock regs not mapped yet.\n"); prom_halt(); } if (mregs) { spin_lock_irq(&mostek_lock); /* Traditional Mostek chip. */ tmp = mostek_read(mregs + MOSTEK_CREG); tmp |= MSTK_CREG_READ; mostek_write(mregs + MOSTEK_CREG, tmp); sec = MSTK_REG_SEC(mregs); min = MSTK_REG_MIN(mregs); hour = MSTK_REG_HOUR(mregs); day = MSTK_REG_DOM(mregs); mon = MSTK_REG_MONTH(mregs); year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) ); } else { int i; /* Dallas 12887 RTC chip. */ /* Stolen from arch/i386/kernel/time.c, see there for * credits and descriptive comments. */ for (i = 0; i < 1000000; i++) { if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP) break; udelay(10); } for (i = 0; i < 1000000; i++) { if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)) break; udelay(10); } do { sec = CMOS_READ(RTC_SECONDS); min = CMOS_READ(RTC_MINUTES); hour = CMOS_READ(RTC_HOURS); day = CMOS_READ(RTC_DAY_OF_MONTH); mon = CMOS_READ(RTC_MONTH); year = CMOS_READ(RTC_YEAR); } while (sec != CMOS_READ(RTC_SECONDS)); if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { BCD_TO_BIN(sec); BCD_TO_BIN(min); BCD_TO_BIN(hour); BCD_TO_BIN(day); BCD_TO_BIN(mon); BCD_TO_BIN(year); } if ((year += 1900) < 1970) year += 100; } xtime.tv_sec = mktime(year, mon, day, hour, min, sec); xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec); if (mregs) { tmp = mostek_read(mregs + MOSTEK_CREG); tmp &= ~MSTK_CREG_READ; mostek_write(mregs + MOSTEK_CREG, tmp); spin_unlock_irq(&mostek_lock); }}void __init clock_probe(void){ struct linux_prom_registers clk_reg[2]; char model[128]; int node, busnd = -1, err; unsigned long flags; struct linux_central *cbus;#ifdef CONFIG_PCI struct linux_ebus *ebus = NULL; struct sparc_isa_bridge *isa_br = NULL;#endif static int invoked; if (invoked) return; invoked = 1; if (this_is_starfire) { /* davem suggests we keep this within the 4M locked kernel image */ static char obp_gettod[256]; static u32 unix_tod; sprintf(obp_gettod, "h# %08x unix-gettod", (unsigned int) (long) &unix_tod); prom_feval(obp_gettod); xtime.tv_sec = unix_tod; xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec); return; } local_irq_save(flags); cbus = central_bus; if (cbus != NULL) busnd = central_bus->child->prom_node; /* Check FHC Central then EBUSs then ISA bridges then SBUSs. * That way we handle the presence of multiple properly. * * As a special case, machines with Central must provide the * timer chip there. */#ifdef CONFIG_PCI if (ebus_chain != NULL) { ebus = ebus_chain; if (busnd == -1) busnd = ebus->prom_node; } if (isa_chain != NULL) { isa_br = isa_chain; if (busnd == -1) busnd = isa_br->prom_node; }#endif if (sbus_root != NULL && busnd == -1) busnd = sbus_root->prom_node; if (busnd == -1) { prom_printf("clock_probe: problem, cannot find bus to search.\n"); prom_halt(); } node = prom_getchild(busnd); while (1) { if (!node) model[0] = 0; else prom_getstring(node, "model", model, sizeof(model)); if (strcmp(model, "mk48t02") && strcmp(model, "mk48t08") && strcmp(model, "mk48t59") && strcmp(model, "m5819") && strcmp(model, "m5819p") && strcmp(model, "m5823") && strcmp(model, "ds1287")) { if (cbus != NULL) { prom_printf("clock_probe: Central bus lacks timer chip.\n"); prom_halt(); } if (node != 0) node = prom_getsibling(node);#ifdef CONFIG_PCI while ((node == 0) && ebus != NULL) { ebus = ebus->next; if (ebus != NULL) { busnd = ebus->prom_node; node = prom_getchild(busnd); } } while ((node == 0) && isa_br != NULL) { isa_br = isa_br->next; if (isa_br != NULL) { busnd = isa_br->prom_node; node = prom_getchild(busnd); } }#endif if (node == 0) { prom_printf("clock_probe: Cannot find timer chip\n"); prom_halt(); } continue; } err = prom_getproperty(node, "reg", (char *)clk_reg, sizeof(clk_reg)); if(err == -1) { prom_printf("clock_probe: Cannot get Mostek reg property\n"); prom_halt(); } if (cbus != NULL) { apply_fhc_ranges(central_bus->child, clk_reg, 1); apply_central_ranges(central_bus, clk_reg, 1); }#ifdef CONFIG_PCI else if (ebus != NULL) { struct linux_ebus_device *edev; for_each_ebusdev(edev, ebus) if (edev->prom_node == node) break; if (edev == NULL) { if (isa_chain != NULL) goto try_isa_clock; prom_printf("%s: Mostek not probed by EBUS\n", __FUNCTION__); prom_halt(); } if (!strcmp(model, "ds1287") || !strcmp(model, "m5819") || !strcmp(model, "m5819p") || !strcmp(model, "m5823")) { ds1287_regs = edev->resource[0].start; } else { mstk48t59_regs = (void __iomem *) edev->resource[0].start; mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02; } break; } else if (isa_br != NULL) { struct sparc_isa_device *isadev;try_isa_clock: for_each_isadev(isadev, isa_br) if (isadev->prom_node == node) break; if (isadev == NULL) { prom_printf("%s: Mostek not probed by ISA\n"); prom_halt(); } if (!strcmp(model, "ds1287") || !strcmp(model, "m5819") || !strcmp(model, "m5819p") || !strcmp(model, "m5823")) { ds1287_regs = isadev->resource.start; } else { mstk48t59_regs = (void __iomem *) isadev->resource.start; mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02; } break; }#endif else { if (sbus_root->num_sbus_ranges) { int nranges = sbus_root->num_sbus_ranges; int rngc; for (rngc = 0; rngc < nranges; rngc++) if (clk_reg[0].which_io == sbus_root->sbus_ranges[rngc].ot_child_space) break; if (rngc == nranges) { prom_printf("clock_probe: Cannot find ranges for " "clock regs.\n"); prom_halt(); } clk_reg[0].which_io = sbus_root->sbus_ranges[rngc].ot_parent_space; clk_reg[0].phys_addr += sbus_root->sbus_ranges[rngc].ot_parent_base; } } if(model[5] == '0' && model[6] == '2') { mstk48t02_regs = (void __iomem *) (((u64)clk_reg[0].phys_addr) | (((u64)clk_reg[0].which_io)<<32UL)); } else if(model[5] == '0' && model[6] == '8') { mstk48t08_regs = (void __iomem *) (((u64)clk_reg[0].phys_addr) | (((u64)clk_reg[0].which_io)<<32UL)); mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02; } else { mstk48t59_regs = (void __iomem *) (((u64)clk_reg[0].phys_addr) | (((u64)clk_reg[0].which_io)<<32UL)); mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02; } break; } if (mstk48t02_regs != NULL) { /* Report a low battery voltage condition. */ if (has_low_battery()) prom_printf("NVRAM: Low battery voltage!\n"); /* Kick start the clock if it is completely stopped. */ if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP) kick_start_clock(); } set_system_time(); local_irq_restore(flags);}/* This is gets the master TICK_INT timer going. */static unsigned long sparc64_init_timers(void){ unsigned long clock; int node;#ifdef CONFIG_SMP extern void smp_tick_init(void);#endif if (tlb_type == spitfire) { unsigned long ver, manuf, impl; __asm__ __volatile__ ("rdpr %%ver, %0" : "=&r" (ver)); manuf = ((ver >> 48) & 0xffff); impl = ((ver >> 32) & 0xffff); if (manuf == 0x17 && impl == 0x13) { /* Hummingbird, aka Ultra-IIe */ tick_ops = &hbtick_operations; node = prom_root_node; clock = prom_getint(node, "stick-frequency"); } else { tick_ops = &tick_operations; cpu_find_by_instance(0, &node, NULL); clock = prom_getint(node, "clock-frequency"); } } else { tick_ops = &stick_operations; node = prom_root_node; clock = prom_getint(node, "stick-frequency"); } timer_tick_offset = clock / HZ;#ifdef CONFIG_SMP smp_tick_init();#endif return clock;}static void sparc64_start_timers(irqreturn_t (*cfunc)(int, void *, struct pt_regs *)){ unsigned long pstate; int err; /* Register IRQ handler. */ err = request_irq(build_irq(0, 0, 0UL, 0UL), cfunc, 0, "timer", NULL); if (err) { prom_printf("Serious problem, cannot register TICK_INT\n"); prom_halt(); } /* Guarantee that the following sequences execute * uninterrupted. */ __asm__ __volatile__("rdpr %%pstate, %0\n\t" "wrpr %0, %1, %%pstate" : "=r" (pstate) : "i" (PSTATE_IE)); tick_ops->init_tick(timer_tick_offset); /* Restore PSTATE_IE. */ __asm__ __volatile__("wrpr %0, 0x0, %%pstate" : /* no outputs */ : "r" (pstate)); local_irq_enable();}struct freq_table { unsigned long udelay_val_ref; unsigned long clock_tick_ref; unsigned int ref_freq;};static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0, 0 };unsigned long sparc64_get_clock_tick(unsigned int cpu){ struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu); if (ft->clock_tick_ref) return ft->clock_tick_ref; return cpu_data(cpu).clock_tick;}#ifdef CONFIG_CPU_FREQstatic int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val, void *data){ struct cpufreq_freqs *freq = data; unsigned int cpu = freq->cpu; struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu); if (!ft->ref_freq) { ft->ref_freq = freq->old; ft->udelay_val_ref = cpu_data(cpu).udelay_val; ft->clock_tick_ref = cpu_data(cpu).clock_tick; } if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) || (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) || (val == CPUFREQ_RESUMECHANGE)) { cpu_data(cpu).udelay_val = cpufreq_scale(ft->udelay_val_ref, ft->ref_freq, freq->new); cpu_data(cpu).clock_tick = cpufreq_scale(ft->clock_tick_ref, ft->ref_freq, freq->new); } return 0;}static struct notifier_block sparc64_cpufreq_notifier_block = { .notifier_call = sparc64_cpufreq_notifier};#endif /* CONFIG_CPU_FREQ */static struct time_interpolator sparc64_cpu_interpolator = { .source = TIME_SOURCE_CPU, .shift = 16, .mask = 0xffffffffffffffffLL};/* The quotient formula is taken from the IA64 port. */#define SPARC64_NSEC_PER_CYC_SHIFT 30ULvoid __init time_init(void){ unsigned long clock = sparc64_init_timers(); sparc64_cpu_interpolator.frequency = clock; register_time_interpolator(&sparc64_cpu_interpolator); /* Now that the interpolator is registered, it is * safe to start the timer ticking. */ sparc64_start_timers(timer_interrupt); timer_ticks_per_nsec_quotient = (((NSEC_PER_SEC << SPARC64_NSEC_PER_CYC_SHIFT) + (clock / 2)) / clock);#ifdef CONFIG_CPU_FREQ cpufreq_register_notifier(&sparc64_cpufreq_notifier_block, CPUFREQ_TRANSITION_NOTIFIER);#endif}unsigned long long sched_clock(void){ unsigned long ticks = tick_ops->get_tick(); return (ticks * timer_ticks_per_nsec_quotient) >> SPARC64_NSEC_PER_CYC_SHIFT;}static int set_rtc_mmss(unsigned long nowtime){ int real_seconds, real_minutes, chip_minutes; void __iomem *mregs = mstk48t02_regs;#ifdef CONFIG_PCI unsigned long dregs = ds1287_regs;#else unsigned long dregs = 0UL;#endif unsigned long flags; u8 tmp; /* * Not having a register set can lead to trouble. * Also starfire doesn't have a tod clock. */ if (!mregs && !dregs) return -1; if (mregs) { spin_lock_irqsave(&mostek_lock, flags); /* Read the current RTC minutes. */ tmp = mostek_read(mregs + MOSTEK_CREG); tmp |= MSTK_CREG_READ; mostek_write(mregs + MOSTEK_CREG, tmp); chip_minutes = MSTK_REG_MIN(mregs); tmp = mostek_read(mregs + MOSTEK_CREG); tmp &= ~MSTK_CREG_READ; mostek_write(mregs + MOSTEK_CREG, tmp); /* * since we're only adjusting minutes and seconds, * don't interfere with hour overflow. This avoids * messing with unknown time zones but requires your * RTC not to be off by more than 15 minutes */ real_seconds = nowtime % 60; real_minutes = nowtime / 60; if (((abs(real_minutes - chip_minutes) + 15)/30) & 1) real_minutes += 30; /* correct for half hour time zone */ real_minutes %= 60; if (abs(real_minutes - chip_minutes) < 30) { tmp = mostek_read(mregs + MOSTEK_CREG); tmp |= MSTK_CREG_WRITE; mostek_write(mregs + MOSTEK_CREG, tmp); MSTK_SET_REG_SEC(mregs,real_seconds); MSTK_SET_REG_MIN(mregs,real_minutes); tmp = mostek_read(mregs + MOSTEK_CREG); tmp &= ~MSTK_CREG_WRITE; mostek_write(mregs + MOSTEK_CREG, tmp); spin_unlock_irqrestore(&mostek_lock, flags); return 0; } else { spin_unlock_irqrestore(&mostek_lock, flags); return -1; } } else { int retval = 0; unsigned char save_control, save_freq_select; /* Stolen from arch/i386/kernel/time.c, see there for * credits and descriptive comments. */ spin_lock_irqsave(&rtc_lock, flags); save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */ CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL); save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */ CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT); chip_minutes = CMOS_READ(RTC_MINUTES); if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) BCD_TO_BIN(chip_minutes); real_seconds = nowtime % 60; real_minutes = nowtime / 60; if (((abs(real_minutes - chip_minutes) + 15)/30) & 1) real_minutes += 30; real_minutes %= 60; if (abs(real_minutes - chip_minutes) < 30) { if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { BIN_TO_BCD(real_seconds); BIN_TO_BCD(real_minutes); } CMOS_WRITE(real_seconds,RTC_SECONDS); CMOS_WRITE(real_minutes,RTC_MINUTES); } else { printk(KERN_WARNING "set_rtc_mmss: can't update from %d to %d\n", chip_minutes, real_minutes); retval = -1; } CMOS_WRITE(save_control, RTC_CONTROL); CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); spin_unlock_irqrestore(&rtc_lock, flags); return retval; }}
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