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📄 feature.c

📁 linux-2.6.15.6
💻 C
📖 第 1 页 / 共 5 页
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	return 0;}#ifdef CONFIG_SMPstatic long g5_reset_cpu(struct device_node *node, long param, long value){	unsigned int reset_io = 0;	unsigned long flags;	struct macio_chip *macio;	struct device_node *np;	macio = &macio_chips[0];	if (macio->type != macio_keylargo2)		return -ENODEV;	np = find_path_device("/cpus");	if (np == NULL)		return -ENODEV;	for (np = np->child; np != NULL; np = np->sibling) {		u32 *num = (u32 *)get_property(np, "reg", NULL);		u32 *rst = (u32 *)get_property(np, "soft-reset", NULL);		if (num == NULL || rst == NULL)			continue;		if (param == *num) {			reset_io = *rst;			break;		}	}	if (np == NULL || reset_io == 0)		return -ENODEV;	LOCK(flags);	MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);	(void)MACIO_IN8(reset_io);	udelay(1);	MACIO_OUT8(reset_io, 0);	(void)MACIO_IN8(reset_io);	UNLOCK(flags);	return 0;}#endif /* CONFIG_SMP *//* * This can be called from pmac_smp so isn't static * * This takes the second CPU off the bus on dual CPU machines * running UP */void g5_phy_disable_cpu1(void){	UN_OUT(U3_API_PHY_CONFIG_1, 0);}#endif /* CONFIG_POWER4 */#ifndef CONFIG_POWER4static voidkeylargo_shutdown(struct macio_chip *macio, int sleep_mode){	u32 temp;	if (sleep_mode) {		mdelay(1);		MACIO_BIS(KEYLARGO_FCR0, KL0_USB_REF_SUSPEND);		(void)MACIO_IN32(KEYLARGO_FCR0);		mdelay(1);	}	MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |				KL0_SCC_CELL_ENABLE |				KL0_IRDA_ENABLE | KL0_IRDA_CLK32_ENABLE |				KL0_IRDA_CLK19_ENABLE);	MACIO_BIC(KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK);	MACIO_BIS(KEYLARGO_MBCR, KL_MBCR_MB0_IDE_ENABLE);	MACIO_BIC(KEYLARGO_FCR1,		KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |		KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |		KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |		KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |		KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |		KL1_EIDE0_ENABLE | KL1_EIDE0_RESET_N |		KL1_EIDE1_ENABLE | KL1_EIDE1_RESET_N |		KL1_UIDE_ENABLE);	MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);	MACIO_BIC(KEYLARGO_FCR2, KL2_IOBUS_ENABLE);	temp = MACIO_IN32(KEYLARGO_FCR3);	if (macio->rev >= 2) {		temp |= KL3_SHUTDOWN_PLL2X;		if (sleep_mode)			temp |= KL3_SHUTDOWN_PLL_TOTAL;	}	temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |		KL3_SHUTDOWN_PLLKW35;	if (sleep_mode)		temp |= KL3_SHUTDOWN_PLLKW12;	temp &= ~(KL3_CLK66_ENABLE | KL3_CLK49_ENABLE | KL3_CLK45_ENABLE		| KL3_CLK31_ENABLE | KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);	if (sleep_mode)		temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_VIA_CLK16_ENABLE);	MACIO_OUT32(KEYLARGO_FCR3, temp);	/* Flush posted writes & wait a bit */	(void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);}static voidpangea_shutdown(struct macio_chip *macio, int sleep_mode){	u32 temp;	MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |				KL0_SCC_CELL_ENABLE |				KL0_USB0_CELL_ENABLE | KL0_USB1_CELL_ENABLE);	MACIO_BIC(KEYLARGO_FCR1,		KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |		KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |		KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |		KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |		KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |		KL1_UIDE_ENABLE);	if (pmac_mb.board_flags & PMAC_MB_MOBILE)		MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);	MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);	temp = MACIO_IN32(KEYLARGO_FCR3);	temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |		KL3_SHUTDOWN_PLLKW35;	temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE | KL3_CLK31_ENABLE		| KL3_I2S0_CLK18_ENABLE | KL3_I2S1_CLK18_ENABLE);	if (sleep_mode)		temp &= ~(KL3_VIA_CLK16_ENABLE | KL3_TIMER_CLK18_ENABLE);	MACIO_OUT32(KEYLARGO_FCR3, temp);	/* Flush posted writes & wait a bit */	(void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);}static voidintrepid_shutdown(struct macio_chip *macio, int sleep_mode){	u32 temp;	MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |		  KL0_SCC_CELL_ENABLE);	MACIO_BIC(KEYLARGO_FCR1,		  /*KL1_USB2_CELL_ENABLE |*/		KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |		KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |		KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE);	if (pmac_mb.board_flags & PMAC_MB_MOBILE)		MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);	temp = MACIO_IN32(KEYLARGO_FCR3);	temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE |		  KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);	if (sleep_mode)		temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_IT_VIA_CLK32_ENABLE);	MACIO_OUT32(KEYLARGO_FCR3, temp);	/* Flush posted writes & wait a bit */	(void)MACIO_IN32(KEYLARGO_FCR0);	mdelay(10);}void pmac_tweak_clock_spreading(int enable){	struct macio_chip *macio = &macio_chips[0];	/* Hack for doing clock spreading on some machines PowerBooks and	 * iBooks. This implements the "platform-do-clockspreading" OF	 * property as decoded manually on various models. For safety, we also	 * check the product ID in the device-tree in cases we'll whack the i2c	 * chip to make reasonably sure we won't set wrong values in there	 *	 * Of course, ultimately, we have to implement a real parser for	 * the platform-do-* stuff...	 */	if (macio->type == macio_intrepid) {		struct device_node *clock =			of_find_node_by_path("/uni-n@f8000000/hw-clock");		if (clock && get_property(clock, "platform-do-clockspreading",					  NULL)) {			printk(KERN_INFO "%sabling clock spreading on Intrepid"			       " ASIC\n", enable ? "En" : "Dis");			if (enable)				UN_OUT(UNI_N_CLOCK_SPREADING, 2);			else				UN_OUT(UNI_N_CLOCK_SPREADING, 0);			mdelay(40);		}		of_node_put(clock);	}	while (machine_is_compatible("PowerBook5,2") ||	       machine_is_compatible("PowerBook5,3") ||	       machine_is_compatible("PowerBook6,2") ||	       machine_is_compatible("PowerBook6,3")) {		struct device_node *ui2c = of_find_node_by_type(NULL, "i2c");		struct device_node *dt = of_find_node_by_name(NULL, "device-tree");		u8 buffer[9];		u32 *productID;		int i, rc, changed = 0;		if (dt == NULL)			break;		productID = (u32 *)get_property(dt, "pid#", NULL);		if (productID == NULL)			break;		while(ui2c) {			struct device_node *p = of_get_parent(ui2c);			if (p && !strcmp(p->name, "uni-n"))				break;			ui2c = of_find_node_by_type(ui2c, "i2c");		}		if (ui2c == NULL)			break;		DBG("Trying to bump clock speed for PID: %08x...\n", *productID);		rc = pmac_low_i2c_open(ui2c, 1);		if (rc != 0)			break;		pmac_low_i2c_setmode(ui2c, pmac_low_i2c_mode_combined);		rc = pmac_low_i2c_xfer(ui2c, 0xd2 | pmac_low_i2c_read, 0x80, buffer, 9);		DBG("read result: %d,", rc);		if (rc != 0) {			pmac_low_i2c_close(ui2c);			break;		}		for (i=0; i<9; i++)			DBG(" %02x", buffer[i]);		DBG("\n");		switch(*productID) {		case 0x1182:	/* AlBook 12" rev 2 */		case 0x1183:	/* iBook G4 12" */			buffer[0] = (buffer[0] & 0x8f) | 0x70;			buffer[2] = (buffer[2] & 0x7f) | 0x00;			buffer[5] = (buffer[5] & 0x80) | 0x31;			buffer[6] = (buffer[6] & 0x40) | 0xb0;			buffer[7] = (buffer[7] & 0x00) | (enable ? 0xc0 : 0xba);			buffer[8] = (buffer[8] & 0x00) | 0x30;			changed = 1;			break;		case 0x3142:	/* AlBook 15" (ATI M10) */		case 0x3143:	/* AlBook 17" (ATI M10) */			buffer[0] = (buffer[0] & 0xaf) | 0x50;			buffer[2] = (buffer[2] & 0x7f) | 0x00;			buffer[5] = (buffer[5] & 0x80) | 0x31;			buffer[6] = (buffer[6] & 0x40) | 0xb0;			buffer[7] = (buffer[7] & 0x00) | (enable ? 0xd0 : 0xc0);			buffer[8] = (buffer[8] & 0x00) | 0x30;			changed = 1;			break;		default:			DBG("i2c-hwclock: Machine model not handled\n");			break;		}		if (!changed) {			pmac_low_i2c_close(ui2c);			break;		}		printk(KERN_INFO "%sabling clock spreading on i2c clock chip\n",		       enable ? "En" : "Dis");		pmac_low_i2c_setmode(ui2c, pmac_low_i2c_mode_stdsub);		rc = pmac_low_i2c_xfer(ui2c, 0xd2 | pmac_low_i2c_write, 0x80, buffer, 9);		DBG("write result: %d,", rc);		pmac_low_i2c_setmode(ui2c, pmac_low_i2c_mode_combined);		rc = pmac_low_i2c_xfer(ui2c, 0xd2 | pmac_low_i2c_read, 0x80, buffer, 9);		DBG("read result: %d,", rc);		if (rc != 0) {			pmac_low_i2c_close(ui2c);			break;		}		for (i=0; i<9; i++)			DBG(" %02x", buffer[i]);		pmac_low_i2c_close(ui2c);		break;	}}static intcore99_sleep(void){	struct macio_chip *macio;	int i;	macio = &macio_chips[0];	if (macio->type != macio_keylargo && macio->type != macio_pangea &&	    macio->type != macio_intrepid)		return -ENODEV;	/* We power off the wireless slot in case it was not done	 * by the driver. We don't power it on automatically however	 */	if (macio->flags & MACIO_FLAG_AIRPORT_ON)		core99_airport_enable(macio->of_node, 0, 0);	/* We power off the FW cable. Should be done by the driver... */	if (macio->flags & MACIO_FLAG_FW_SUPPORTED) {		core99_firewire_enable(NULL, 0, 0);		core99_firewire_cable_power(NULL, 0, 0);	}	/* We make sure int. modem is off (in case driver lost it) */	if (macio->type == macio_keylargo)		core99_modem_enable(macio->of_node, 0, 0);	else		pangea_modem_enable(macio->of_node, 0, 0);	/* We make sure the sound is off as well */	core99_sound_chip_enable(macio->of_node, 0, 0);	/*	 * Save various bits of KeyLargo	 */	/* Save the state of the various GPIOs */	save_gpio_levels[0] = MACIO_IN32(KEYLARGO_GPIO_LEVELS0);	save_gpio_levels[1] = MACIO_IN32(KEYLARGO_GPIO_LEVELS1);	for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)		save_gpio_extint[i] = MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+i);	for (i=0; i<KEYLARGO_GPIO_CNT; i++)		save_gpio_normal[i] = MACIO_IN8(KEYLARGO_GPIO_0+i);	/* Save the FCRs */	if (macio->type == macio_keylargo)		save_mbcr = MACIO_IN32(KEYLARGO_MBCR);	save_fcr[0] = MACIO_IN32(KEYLARGO_FCR0);	save_fcr[1] = MACIO_IN32(KEYLARGO_FCR1);	save_fcr[2] = MACIO_IN32(KEYLARGO_FCR2);	save_fcr[3] = MACIO_IN32(KEYLARGO_FCR3);	save_fcr[4] = MACIO_IN32(KEYLARGO_FCR4);	if (macio->type == macio_pangea || macio->type == macio_intrepid)		save_fcr[5] = MACIO_IN32(KEYLARGO_FCR5);	/* Save state & config of DBDMA channels */	dbdma_save(macio, save_dbdma);	/*	 * Turn off as much as we can	 */	if (macio->type == macio_pangea)		pangea_shutdown(macio, 1);	else if (macio->type == macio_intrepid)		intrepid_shutdown(macio, 1);	else if (macio->type == macio_keylargo)		keylargo_shutdown(macio, 1);	/*	 * Put the host bridge to sleep	 */	save_unin_clock_ctl = UN_IN(UNI_N_CLOCK_CNTL);	/* Note: do not switch GMAC off, driver does it when necessary, WOL must keep it	 * enabled !	 */	UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl &	       ~(/*UNI_N_CLOCK_CNTL_GMAC|*/UNI_N_CLOCK_CNTL_FW/*|UNI_N_CLOCK_CNTL_PCI*/));	udelay(100);	UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);	UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_SLEEP);	mdelay(10);	/*	 * FIXME: A bit of black magic with OpenPIC (don't ask me why)	 */	if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {		MACIO_BIS(0x506e0, 0x00400000);		MACIO_BIS(0x506e0, 0x80000000);	}	return 0;}static intcore99_wake_up(void){	struct macio_chip *macio;	int i;	macio = &macio_chips[0];	if (macio->type != macio_keylargo && macio->type != macio_pangea &&	    macio->type != macio_intrepid)		return -ENODEV;	/*	 * Wakeup the host bridge	 */	UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);	udelay(10);	UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);	udelay(10);	/*	 * Restore KeyLargo	 */	if (macio->type == macio_keylargo) {		MACIO_OUT32(KEYLARGO_MBCR, save_mbcr);		(void)MACIO_IN32(KEYLARGO_MBCR); udelay(10);	}	MACIO_OUT32(KEYLARGO_FCR0, save_fcr[0]);	(void)MACIO_IN32(KEYLARGO_FCR0); udelay(10);	MACIO_OUT32(KEYLARGO_FCR1, save_fcr[1]);	(void)MACIO_IN32(KEYLARGO_FCR1); udelay(10);	MACIO_OUT32(KEYLARGO_FCR2, save_fcr[2]);	(void)MACIO_IN32(KEYLARGO_FCR2); udelay(10);	MACIO_OUT32(KEYLARGO_FCR3, save_fcr[3]);	(void)MACIO_IN32(KEYLARGO_FCR3); udelay(10);	MACIO_OUT32(KEYLARGO_FCR4, save_fcr[4]);	(void)MACIO_IN32(KEYLARGO_FCR4); udelay(10);	if (macio->type == macio_pangea || macio->type == macio_intrepid) {		MACIO_OUT32(KEYLARGO_FCR5, save_fcr[5]);		(void)MACIO_IN32(KEYLARGO_FCR5); udelay(10);	}	dbdma_restore(macio, save_dbdma);	MACIO_OUT32(KEYLARGO_GPIO_LEVELS0, save_gpio_levels[0]);	MACIO_OUT32(KEYLARGO_GPIO_LEVELS1, save_gpio_levels[1]);	for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)		MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+i, save_gpio_extint[i]);	for (i=0; i<KEYLARGO_GPIO_CNT; i++)		MACIO_OUT8(KEYLARGO_GPIO_0+i, save_gpio_normal[i]);	/* FIXME more black magic with OpenPIC ... */	if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {		MACIO_BIC(0x506e0, 0x00400000);		MACIO_BIC(0x506e0, 0x80000000);	}	UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl);	udelay(100);	return 0;}static longcore99_sleep_state(struct device_node *node, long param, long value){	/* Param == 1 means to enter the "fake sleep" mode that is	 * used for CPU speed switch	 */	if (param == 1) {		if (value == 1) {			UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);			UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_IDLE2);		} else {			UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);			udelay(10);			UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);			udelay(10);		}		return 0;	}	if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)		return -EPERM;	if (value == 1)		return core99_sleep();	else if (value == 0)		return core99_wake_up();	return 0;}#endif /* CONFIG_POWER4 */static longgeneric_dev_can_wake(struct device_node *node, long param, long value){	/* Todo: eventually check we are really dealing with on-board	 * video device ...	 */

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