📄 setup.c
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p += 4; boot_target = simple_strtoul(p, NULL, 10); p = strchr(p, ':'); if (p != NULL) boot_part = simple_strtoul(p + 1, NULL, 10); } }}EXPORT_SYMBOL(note_scsi_host);#endif#if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC)static dev_t __init find_ide_boot(void){ char *p; int n; dev_t __init pmac_find_ide_boot(char *bootdevice, int n); if (bootdevice == NULL) return 0; p = strrchr(bootdevice, '/'); if (p == NULL) return 0; n = p - bootdevice; return pmac_find_ide_boot(bootdevice, n);}#endif /* CONFIG_BLK_DEV_IDE && CONFIG_BLK_DEV_IDE_PMAC */static void __init find_boot_device(void){#if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC) boot_dev = find_ide_boot();#endif}/* TODO: Merge the suspend-to-ram with the common code !!! * currently, this is a stub implementation for suspend-to-disk * only */#ifdef CONFIG_SOFTWARE_SUSPENDstatic int pmac_pm_prepare(suspend_state_t state){ printk(KERN_DEBUG "%s(%d)\n", __FUNCTION__, state); return 0;}static int pmac_pm_enter(suspend_state_t state){ printk(KERN_DEBUG "%s(%d)\n", __FUNCTION__, state); /* Giveup the lazy FPU & vec so we don't have to back them * up from the low level code */ enable_kernel_fp();#ifdef CONFIG_ALTIVEC if (cur_cpu_spec->cpu_features & CPU_FTR_ALTIVEC) enable_kernel_altivec();#endif /* CONFIG_ALTIVEC */ return 0;}static int pmac_pm_finish(suspend_state_t state){ printk(KERN_DEBUG "%s(%d)\n", __FUNCTION__, state); /* Restore userland MMU context */ set_context(current->active_mm->context, current->active_mm->pgd); return 0;}static struct pm_ops pmac_pm_ops = { .pm_disk_mode = PM_DISK_SHUTDOWN, .prepare = pmac_pm_prepare, .enter = pmac_pm_enter, .finish = pmac_pm_finish,};#endif /* CONFIG_SOFTWARE_SUSPEND */static int initializing = 1;static int pmac_late_init(void){ initializing = 0;#ifdef CONFIG_SOFTWARE_SUSPEND pm_set_ops(&pmac_pm_ops);#endif /* CONFIG_SOFTWARE_SUSPEND */ return 0;}late_initcall(pmac_late_init);/* can't be __init - can be called whenever a disk is first accessed */void note_bootable_part(dev_t dev, int part, int goodness){ static int found_boot = 0; char *p; if (!initializing) return; if ((goodness <= current_root_goodness) && ROOT_DEV != DEFAULT_ROOT_DEVICE) return; p = strstr(saved_command_line, "root="); if (p != NULL && (p == saved_command_line || p[-1] == ' ')) return; if (!found_boot) { find_boot_device(); found_boot = 1; } if (!boot_dev || dev == boot_dev) { ROOT_DEV = dev + part; boot_dev = 0; current_root_goodness = goodness; }}#ifdef CONFIG_ADB_CUDAstatic void cuda_restart(void){ struct adb_request req; cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_RESET_SYSTEM); for (;;) cuda_poll();}static void cuda_shutdown(void){ struct adb_request req; cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_POWERDOWN); for (;;) cuda_poll();}#else#define cuda_restart()#define cuda_shutdown()#endif#ifndef CONFIG_ADB_PMU#define pmu_restart()#define pmu_shutdown()#endif#ifndef CONFIG_PMAC_SMU#define smu_restart()#define smu_shutdown()#endifstatic void pmac_restart(char *cmd){ switch (sys_ctrler) { case SYS_CTRLER_CUDA: cuda_restart(); break; case SYS_CTRLER_PMU: pmu_restart(); break; case SYS_CTRLER_SMU: smu_restart(); break; default: ; }}static void pmac_power_off(void){ switch (sys_ctrler) { case SYS_CTRLER_CUDA: cuda_shutdown(); break; case SYS_CTRLER_PMU: pmu_shutdown(); break; case SYS_CTRLER_SMU: smu_shutdown(); break; default: ; }}static voidpmac_halt(void){ pmac_power_off();}#ifdef CONFIG_PPC32void __init pmac_init(void){ /* isa_io_base gets set in pmac_pci_init */ isa_mem_base = PMAC_ISA_MEM_BASE; pci_dram_offset = PMAC_PCI_DRAM_OFFSET; ISA_DMA_THRESHOLD = ~0L; DMA_MODE_READ = 1; DMA_MODE_WRITE = 2; ppc_md = pmac_md;#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)#ifdef CONFIG_BLK_DEV_IDE_PMAC ppc_ide_md.ide_init_hwif = pmac_ide_init_hwif_ports; ppc_ide_md.default_io_base = pmac_ide_get_base;#endif /* CONFIG_BLK_DEV_IDE_PMAC */#endif /* defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) */ if (ppc_md.progress) ppc_md.progress("pmac_init(): exit", 0);}#endif/* * Early initialization. */static void __init pmac_init_early(void){#ifdef CONFIG_PPC64 /* Initialize hash table, from now on, we can take hash faults * and call ioremap */ hpte_init_native(); /* Init SCC */ if (strstr(cmd_line, "sccdbg")) { sccdbg = 1; udbg_init_scc(NULL); } /* Setup interrupt mapping options */ ppc64_interrupt_controller = IC_OPEN_PIC; iommu_init_early_u3();#endif}static void __init pmac_progress(char *s, unsigned short hex){#ifdef CONFIG_PPC64 if (sccdbg) { udbg_puts(s); udbg_puts("\n"); return; }#endif#ifdef CONFIG_BOOTX_TEXT if (boot_text_mapped) { btext_drawstring(s); btext_drawchar('\n'); }#endif /* CONFIG_BOOTX_TEXT */}/* * pmac has no legacy IO, anything calling this function has to * fail or bad things will happen */static int pmac_check_legacy_ioport(unsigned int baseport){ return -ENODEV;}static int __init pmac_declare_of_platform_devices(void){ struct device_node *np, *npp; np = find_devices("uni-n"); if (np) { for (np = np->child; np != NULL; np = np->sibling) if (strncmp(np->name, "i2c", 3) == 0) { of_platform_device_create(np, "uni-n-i2c", NULL); break; } } np = find_devices("valkyrie"); if (np) of_platform_device_create(np, "valkyrie", NULL); np = find_devices("platinum"); if (np) of_platform_device_create(np, "platinum", NULL); npp = of_find_node_by_name(NULL, "u3"); if (npp) { for (np = NULL; (np = of_get_next_child(npp, np)) != NULL;) { if (strncmp(np->name, "i2c", 3) == 0) { of_platform_device_create(np, "u3-i2c", NULL); of_node_put(np); break; } } of_node_put(npp); } np = of_find_node_by_type(NULL, "smu"); if (np) { of_platform_device_create(np, "smu", NULL); of_node_put(np); } return 0;}device_initcall(pmac_declare_of_platform_devices);/* * Called very early, MMU is off, device-tree isn't unflattened */static int __init pmac_probe(int platform){#ifdef CONFIG_PPC64 if (platform != PLATFORM_POWERMAC) return 0; /* * On U3, the DART (iommu) must be allocated now since it * has an impact on htab_initialize (due to the large page it * occupies having to be broken up so the DART itself is not * part of the cacheable linar mapping */ alloc_u3_dart_table();#endif#ifdef CONFIG_PMAC_SMU /* * SMU based G5s need some memory below 2Gb, at least the current * driver needs that. We have to allocate it now. We allocate 4k * (1 small page) for now. */ smu_cmdbuf_abs = lmb_alloc_base(4096, 4096, 0x80000000UL);#endif /* CONFIG_PMAC_SMU */ return 1;}#ifdef CONFIG_PPC64static int pmac_probe_mode(struct pci_bus *bus){ struct device_node *node = bus->sysdata; /* We need to use normal PCI probing for the AGP bus, since the device for the AGP bridge isn't in the tree. */ if (bus->self == NULL && device_is_compatible(node, "u3-agp")) return PCI_PROBE_NORMAL; return PCI_PROBE_DEVTREE;}#endifstruct machdep_calls __initdata pmac_md = {#if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64) .cpu_die = generic_mach_cpu_die,#endif .probe = pmac_probe, .setup_arch = pmac_setup_arch, .init_early = pmac_init_early, .show_cpuinfo = pmac_show_cpuinfo, .init_IRQ = pmac_pic_init, .get_irq = mpic_get_irq, /* changed later */ .pcibios_fixup = pmac_pcibios_fixup, .restart = pmac_restart, .power_off = pmac_power_off, .halt = pmac_halt, .time_init = pmac_time_init, .get_boot_time = pmac_get_boot_time, .set_rtc_time = pmac_set_rtc_time, .get_rtc_time = pmac_get_rtc_time, .calibrate_decr = pmac_calibrate_decr, .feature_call = pmac_do_feature_call, .check_legacy_ioport = pmac_check_legacy_ioport, .progress = pmac_progress,#ifdef CONFIG_PPC64 .pci_probe_mode = pmac_probe_mode, .idle_loop = native_idle, .enable_pmcs = power4_enable_pmcs,#endif#ifdef CONFIG_PPC32 .pcibios_enable_device_hook = pmac_pci_enable_device_hook, .pcibios_after_init = pmac_pcibios_after_init, .phys_mem_access_prot = pci_phys_mem_access_prot,#endif};
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