📄 time-acorn.c
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/* * linux/arch/arm/common/time-acorn.c * * Copyright (c) 1996-2000 Russell King. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * Changelog: * 24-Sep-1996 RMK Created * 10-Oct-1996 RMK Brought up to date with arch-sa110eval * 04-Dec-1997 RMK Updated for new arch/arm/time.c * 13=Jun-2004 DS Moved to arch/arm/common b/c shared w/CLPS7500 */#include <linux/timex.h>#include <linux/init.h>#include <linux/interrupt.h>#include <asm/hardware.h>#include <asm/io.h>#include <asm/hardware/ioc.h>#include <asm/mach/time.h>unsigned long ioc_timer_gettimeoffset(void){ unsigned int count1, count2, status; long offset; ioc_writeb (0, IOC_T0LATCH); barrier (); count1 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8); barrier (); status = ioc_readb(IOC_IRQREQA); barrier (); ioc_writeb (0, IOC_T0LATCH); barrier (); count2 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8); offset = count2; if (count2 < count1) { /* * We have not had an interrupt between reading count1 * and count2. */ if (status & (1 << 5)) offset -= LATCH; } else if (count2 > count1) { /* * We have just had another interrupt between reading * count1 and count2. */ offset -= LATCH; } offset = (LATCH - offset) * (tick_nsec / 1000); return (offset + LATCH/2) / LATCH;}void __init ioctime_init(void){ ioc_writeb(LATCH & 255, IOC_T0LTCHL); ioc_writeb(LATCH >> 8, IOC_T0LTCHH); ioc_writeb(0, IOC_T0GO);}static irqreturn_tioc_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs){ write_seqlock(&xtime_lock); timer_tick(regs); write_sequnlock(&xtime_lock); return IRQ_HANDLED;}static struct irqaction ioc_timer_irq = { .name = "timer", .flags = SA_INTERRUPT, .handler = ioc_timer_interrupt};/* * Set up timer interrupt. */static void __init ioc_timer_init(void){ ioctime_init(); setup_irq(IRQ_TIMER, &ioc_timer_irq);}struct sys_timer ioc_timer = { .init = ioc_timer_init, .offset = ioc_timer_gettimeoffset,};
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