📄 irq.c
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/* * linux/arch/arm/kernel/irq.c * * Copyright (C) 1992 Linus Torvalds * Modifications for ARM processor Copyright (C) 1995-2000 Russell King. * 'Borrowed' for ARM26 and (C) 2003 Ian Molton. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * This file contains the code used by various IRQ handling routines: * asking for different IRQ's should be done through these routines * instead of just grabbing them. Thus setups with different IRQ numbers * shouldn't result in any weird surprises, and installing new handlers * should be easier. * * IRQ's are in fact implemented a bit like signal handlers for the kernel. * Naturally it's not a 1:1 relation, but there are similarities. */#include <linux/config.h>#include <linux/module.h>#include <linux/ptrace.h>#include <linux/kernel_stat.h>#include <linux/signal.h>#include <linux/sched.h>#include <linux/ioport.h>#include <linux/interrupt.h>#include <linux/slab.h>#include <linux/random.h>#include <linux/smp.h>#include <linux/init.h>#include <linux/seq_file.h>#include <linux/errno.h>#include <asm/irq.h>#include <asm/system.h>#include <asm/irqchip.h>//FIXME - this ought to be in a header IMOvoid __init arc_init_irq(void);/* * Maximum IRQ count. Currently, this is arbitary. However, it should * not be set too low to prevent false triggering. Conversely, if it * is set too high, then you could miss a stuck IRQ. * * FIXME Maybe we ought to set a timer and re-enable the IRQ at a later time? */#define MAX_IRQ_CNT 100000static volatile unsigned long irq_err_count;static DEFINE_SPINLOCK(irq_controller_lock);struct irqdesc irq_desc[NR_IRQS];/* * Dummy mask/unmask handler */void dummy_mask_unmask_irq(unsigned int irq){}void do_bad_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs){ irq_err_count += 1; printk(KERN_ERR "IRQ: spurious interrupt %d\n", irq);}static struct irqchip bad_chip = { .ack = dummy_mask_unmask_irq, .mask = dummy_mask_unmask_irq, .unmask = dummy_mask_unmask_irq,};static struct irqdesc bad_irq_desc = { .chip = &bad_chip, .handle = do_bad_IRQ, .depth = 1,};/** * disable_irq - disable an irq and wait for completion * @irq: Interrupt to disable * * Disable the selected interrupt line. We do this lazily. * * This function may be called from IRQ context. */void disable_irq(unsigned int irq){ struct irqdesc *desc = irq_desc + irq; unsigned long flags; spin_lock_irqsave(&irq_controller_lock, flags); if (!desc->depth++) desc->enabled = 0; spin_unlock_irqrestore(&irq_controller_lock, flags);}/** * enable_irq - enable interrupt handling on an irq * @irq: Interrupt to enable * * Re-enables the processing of interrupts on this IRQ line. * Note that this may call the interrupt handler, so you may * get unexpected results if you hold IRQs disabled. * * This function may be called from IRQ context. */void enable_irq(unsigned int irq){ struct irqdesc *desc = irq_desc + irq; unsigned long flags; int pending = 0; spin_lock_irqsave(&irq_controller_lock, flags); if (unlikely(!desc->depth)) { printk("enable_irq(%u) unbalanced from %p\n", irq, __builtin_return_address(0)); //FIXME bum addresses reported - why? } else if (!--desc->depth) { desc->probing = 0; desc->enabled = 1; desc->chip->unmask(irq); pending = desc->pending; desc->pending = 0; /* * If the interrupt was waiting to be processed, * retrigger it. */ if (pending) desc->chip->rerun(irq); } spin_unlock_irqrestore(&irq_controller_lock, flags);}int show_interrupts(struct seq_file *p, void *v){ int i = *(loff_t *) v; struct irqaction * action; if (i < NR_IRQS) { action = irq_desc[i].action; if (!action) continue; seq_printf(p, "%3d: %10u ", i, kstat_irqs(i)); seq_printf(p, " %s", action->name); for (action = action->next; action; action = action->next) { seq_printf(p, ", %s", action->name); } seq_putc(p, '\n'); } else if (i == NR_IRQS) { show_fiq_list(p, v); seq_printf(p, "Err: %10lu\n", irq_err_count); } return 0;}/* * IRQ lock detection. * * Hopefully, this should get us out of a few locked situations. * However, it may take a while for this to happen, since we need * a large number if IRQs to appear in the same jiffie with the * same instruction pointer (or within 2 instructions). */static int check_irq_lock(struct irqdesc *desc, int irq, struct pt_regs *regs){ unsigned long instr_ptr = instruction_pointer(regs); if (desc->lck_jif == jiffies && desc->lck_pc >= instr_ptr && desc->lck_pc < instr_ptr + 8) { desc->lck_cnt += 1; if (desc->lck_cnt > MAX_IRQ_CNT) { printk(KERN_ERR "IRQ LOCK: IRQ%d is locking the system, disabled\n", irq); return 1; } } else { desc->lck_cnt = 0; desc->lck_pc = instruction_pointer(regs); desc->lck_jif = jiffies; } return 0;}static void__do_irq(unsigned int irq, struct irqaction *action, struct pt_regs *regs){ unsigned int status; int ret; spin_unlock(&irq_controller_lock); if (!(action->flags & SA_INTERRUPT)) local_irq_enable(); status = 0; do { ret = action->handler(irq, action->dev_id, regs); if (ret == IRQ_HANDLED) status |= action->flags; action = action->next; } while (action); if (status & SA_SAMPLE_RANDOM) add_interrupt_randomness(irq); spin_lock_irq(&irq_controller_lock);}/* * This is for software-decoded IRQs. The caller is expected to * handle the ack, clear, mask and unmask issues. */voiddo_simple_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs){ struct irqaction *action; const int cpu = smp_processor_id(); desc->triggered = 1; kstat_cpu(cpu).irqs[irq]++; action = desc->action; if (action) __do_irq(irq, desc->action, regs);}/* * Most edge-triggered IRQ implementations seem to take a broken * approach to this. Hence the complexity. */voiddo_edge_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs){ const int cpu = smp_processor_id(); desc->triggered = 1; /* * If we're currently running this IRQ, or its disabled, * we shouldn't process the IRQ. Instead, turn on the * hardware masks. */ if (unlikely(desc->running || !desc->enabled)) goto running; /* * Acknowledge and clear the IRQ, but don't mask it. */ desc->chip->ack(irq); /* * Mark the IRQ currently in progress. */ desc->running = 1; kstat_cpu(cpu).irqs[irq]++; do { struct irqaction *action; action = desc->action; if (!action) break; if (desc->pending && desc->enabled) { desc->pending = 0; desc->chip->unmask(irq); } __do_irq(irq, action, regs); } while (desc->pending); desc->running = 0; /* * If we were disabled or freed, shut down the handler. */ if (likely(desc->action && !check_irq_lock(desc, irq, regs))) return; running: /* * We got another IRQ while this one was masked or * currently running. Delay it. */ desc->pending = 1; desc->chip->mask(irq); desc->chip->ack(irq);}/* * Level-based IRQ handler. Nice and simple. */voiddo_level_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs){ struct irqaction *action; const int cpu = smp_processor_id(); desc->triggered = 1; /* * Acknowledge, clear _AND_ disable the interrupt. */ desc->chip->ack(irq); if (likely(desc->enabled)) { kstat_cpu(cpu).irqs[irq]++; /* * Return with this interrupt masked if no action */ action = desc->action; if (action) { __do_irq(irq, desc->action, regs); if (likely(desc->enabled && !check_irq_lock(desc, irq, regs))) desc->chip->unmask(irq); } }}/* * do_IRQ handles all hardware IRQ's. Decoded IRQs should not * come via this function. Instead, they should provide their * own 'handler' */asmlinkage void asm_do_IRQ(int irq, struct pt_regs *regs){ struct irqdesc *desc = irq_desc + irq; /* * Some hardware gives randomly wrong interrupts. Rather * than crashing, do something sensible. */ if (irq >= NR_IRQS) desc = &bad_irq_desc; irq_enter(); spin_lock(&irq_controller_lock); desc->handle(irq, desc, regs); spin_unlock(&irq_controller_lock); irq_exit();}void __set_irq_handler(unsigned int irq, irq_handler_t handle, int is_chained){ struct irqdesc *desc; unsigned long flags; if (irq >= NR_IRQS) { printk(KERN_ERR "Trying to install handler for IRQ%d\n", irq); return; } if (handle == NULL)
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