oemabort.s

针对Intel Xscale PXA255的WinCE boot loader源代码包！极具参考价值！

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;
; Header file for the data abort veneer
; =====================================
;
; This file selects options suitable for Windows CE's use of
; the data abort veneer.
;

    IF 0
;	IF _TGTCPU = "ARMV4"
		GBLS    AreaName
AreaName        SETS    "|.text|"

		GBLS    VeneerEntry
VeneerEntry     SETS    "OEMDataAbortHandler"

		GBLL    BaseUpdated
BaseUpdated     SETL    {TRUE}

		GBLL    BaseRestored
BaseRestored    SETL    {FALSE}

		GBLS    HandlerCallStd
HandlerCallStd  SETS    "APCS_MACRO"

		GBLS    HandlerName
HandlerName     SETS    "HandlerMacro"

		MACRO
		HandlerMacro
		CMP     R0,#DABORT_ERROR_NONE
		MOVEQ   R0,#DABORT_RETVAL_TONEXT
		MOVNE   R0,#DABORT_RETVAL_UNDEF
		MEND

		GBLS    ReturnUndef
ReturnUndef     SETS    "0xFFFF0004"

		GBLS    ReturnToNext
ReturnToNext    SETS    "DataAbortHandler"

		INCLUDE dabort.s

	ELSE

;TEST_DISPLAYING_MARKERS EQU 1

        OPT     2       ; disable listing
        INCLUDE kxarm.h
        INCLUDE XSC1.inc
      IF :DEF: TEST_DISPLAYING_MARKERS
        INCLUDE XSC1BD.inc
      ENDIF; :DEF: TEST_DISPLAYING_MARKERS
        OPT     1       ; reenable listing
        OPT     128     ; disable listing of macro expansions


        TEXTAREA
        IMPORT  DataAbortHandler
        IMPORT  Batt_FaultHandler

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; 
;;  OEMDataAbortHandler()
;;   - Subroutine implementation that is aware of Imprecise Data Abort
;;     due to power emergency.
;;
        LEAF_ENTRY OEMDataAbortHandler

PSFS_BIT_MASK EQU 0x20  ; in cp7, reg 4: (1<<5)


;; Do the imprecise data abort / Batt fault test 

    stmdb   sp!, {r0-r3}
    mrs     r0, cpsr
    str     r0, [sp, #-4]!       ; push r0

;; For testing, need to force IDAE bit here in CE .NET because that OS variant
;;  clears it as of 2002/04/01 
;        ldr     r2,  =PWR_BASE_U_VIRTUAL
            ; set the immediate sleep mode on batt/vdd fault
;        mov     r1, #1                       ; force Imprecise Data Abort on Fault
;        str     r1, [r2, #PMCR_OFFSET]


  IF :DEF: TEST_DISPLAYING_MARKERS
    IF PLAT_LUBBOCK = "1"
    ; development, just prove we got here.
        ldr r0, =(0x88800999)
        ldr     r1,  =(FPGA_REGS_BASE_U_VIRTUAL)
        str     r0,  [r1, #HEXLED_OFFSET]
        ldr     r1, =(0x1000)
11
        subs    r1, r1, #1
        bne     %B11
    ENDIF; PLAT_LUBBOCK = "1"
  ENDIF; :DEF: TEST_DISPLAYING_MARKERS

    ;; Get access to coprocessor
    mrc     p15, 0, r3, c15, c0, 0   ;Get Reg15 of CP15 for Access to CP7
    str     r0, [sp, #-4]!       ; push r0
    ldr     r2, =(0x03ff)
    mcr     p15, 0, r2, c15, c1, 0   ;Now set the value back into R15 of CP15
    CPWAIT  

    mrc     p7,0,r2,c4,c1,0     ; CP7, r4 data into processor r2
    CPWAIT  

    tst     r2, #PSFS_BIT_MASK  ; Power emergency?
    bne     Batt_FaultHandler   ; Yes, handle the battery fault.  Never return.

                                ; No power emergency, clean up and  return.
    ldr     r0, [sp], #4        ; pop r0
    mcr     p15, 0, r3, c15, c1, 0   ;Now set the value back into R15 of CP15
    CPWAIT  

    ; pop flags and r0 - going back to main path
    ldr     r0, [sp], #4        ; pop r0
    msr     cpsr_c, r0
    ldmia   sp!, {r0-r3} 

    b       DataAbortHandler        ; Jump to the main data abort handler

;;
;; End of OEMDataAbortHandler()
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	ENDIF

		END